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dkim=none X-RZG-AUTH: ":P3gBZUipdd93FF5ZZvYFPugejmSTVR2nRPhVOQ/OcYgojyw4j34+u267FZF9PwpcNKLUrKw7/aY=" X-RZG-CLASS-ID: mo00 Received: from gerhold.net by smtp.strato.de (RZmta 47.47.0 AUTH) with ESMTPSA id he04d0y6DJW34Nf (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 13 Jul 2022 21:32:03 +0200 (CEST) Date: Wed, 13 Jul 2022 21:31:50 +0200 From: Stephan Gerhold To: Sumit Garg Cc: u-boot@lists.denx.de, rfried.dev@gmail.com, peng.fan@nxp.com, jh80.chung@samsung.com, sjg@chromium.org, trini@konsulko.com, dsankouski@gmail.com, vinod.koul@linaro.org, nicolas.dechesne@linaro.org, mworsfold@impinj.com, daniel.thompson@linaro.org, pbrobinson@gmail.com Subject: Re: [PATCH v3 9/9] board: qualcomm: Add support for QCS404 EVB Message-ID: References: <20220712071212.2188390-1-sumit.garg@linaro.org> <20220712071212.2188390-10-sumit.garg@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220712071212.2188390-10-sumit.garg@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Sumit, On Tue, Jul 12, 2022 at 12:42:12PM +0530, Sumit Garg wrote: > Add support for Qualcomm QCS404 SoC based evaluation board. > > Features: > - Qualcomm Snapdragon QCS404 SoC > - 1GiB RAM > - 8GiB eMMC, uSD slot > > U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. > For detailed build and boot instructions, refer to > doc/board/qualcomm/qcs404.rst. > > Signed-off-by: Sumit Garg > --- > arch/arm/dts/Makefile | 1 + > arch/arm/dts/qcs404-evb-uboot.dtsi | 24 +++++++ > arch/arm/dts/qcs404-evb.dts | 81 ++++++++++++++++++++++++ > arch/arm/mach-snapdragon/Kconfig | 11 ++++ > arch/arm/mach-snapdragon/Makefile | 2 + > arch/arm/mach-snapdragon/sysmap-qcs404.c | 31 +++++++++ > board/qualcomm/qcs404-evb/Kconfig | 15 +++++ > board/qualcomm/qcs404-evb/MAINTAINERS | 6 ++ > board/qualcomm/qcs404-evb/Makefile | 6 ++ > board/qualcomm/qcs404-evb/qcs404-evb.c | 33 ++++++++++ > board/qualcomm/qcs404-evb/qcs404-evb.its | 64 +++++++++++++++++++ > configs/qcs404evb_defconfig | 39 ++++++++++++ > doc/board/qualcomm/index.rst | 1 + > doc/board/qualcomm/qcs404.rst | 79 +++++++++++++++++++++++ > include/configs/qcs404-evb.h | 27 ++++++++ > 15 files changed, 420 insertions(+) > create mode 100644 arch/arm/dts/qcs404-evb-uboot.dtsi > create mode 100644 arch/arm/dts/qcs404-evb.dts > create mode 100644 arch/arm/mach-snapdragon/sysmap-qcs404.c > create mode 100644 board/qualcomm/qcs404-evb/Kconfig > create mode 100644 board/qualcomm/qcs404-evb/MAINTAINERS > create mode 100644 board/qualcomm/qcs404-evb/Makefile > create mode 100644 board/qualcomm/qcs404-evb/qcs404-evb.c > create mode 100644 board/qualcomm/qcs404-evb/qcs404-evb.its > create mode 100644 configs/qcs404evb_defconfig > create mode 100644 doc/board/qualcomm/qcs404.rst > create mode 100644 include/configs/qcs404-evb.h > > [...] > diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts > new file mode 100644 > index 0000000000..4f0ae20bdb > --- /dev/null > +++ b/arch/arm/dts/qcs404-evb.dts > @@ -0,0 +1,81 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Qualcomm QCS404 based evaluation board device tree source > + * > + * (C) Copyright 2022 Sumit Garg > + */ > + > +/dts-v1/; > + > +#include "skeleton64.dtsi" > +#include > +#include > +#include > + > +/ { > + model = "Qualcomm Technologies, Inc. QCS404 EVB"; > + compatible = "qcom,qcs404-evb", "qcom,qcs404"; > + #address-cells = <0x2>; > + #size-cells = <0x2>; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + aliases { > + serial0 = &debug_uart; > + }; > + > + memory { > + device_type = "memory"; > + reg = <0 0x80000000 0 0x40000000>; > + }; > + > + soc { > + #address-cells = <0x1>; > + #size-cells = <0x1>; > + ranges = <0x0 0x0 0x0 0xffffffff>; > + compatible = "simple-bus"; > + > + pinctrl_north@1300000 { > + compatible = "qcom,tlmm-qcs404"; > + reg = <0x1300000 0x200000>; > + > + blsp1_uart2: uart { > + pins = "GPIO_17", "GPIO_18"; > + function = "blsp_uart2"; > + }; > + }; > + I know you're just following the example of the existing Qualcomm boards here but I think we should really avoid adding any more custom device trees that are inconsistent with the official (upstream) Linux bindings. Many other boards in U-Boot have moved to using the upstream Linux DTs as-is (with some additions in -u-boot.dtsi) and I think we should do the same for the Qualcomm boards. Judging from Tom's comments on other patches (e.g. [1]), this might even be a requirement now? The SPMI fix I just sent for DB410c/DB820c [2] is a good example why it is important to have bindings consistent with Linux. Looking at your patch reminded me that I never sent this fix (thanks!). Can you check how hard it would be to reuse the upstream QCS404 DT? Thanks! Stephan [1]: https://lore.kernel.org/u-boot/20220601152800.GJ25375@bill-the-cat/ [2]: https://lore.kernel.org/u-boot/20220713191711.4155-1-stephan@gerhold.net/