Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/mtl: Add MeteorLake platform info

[Matt Roper <matthew.d.roper@intel.com>]

On Thu, Jul 07, 2022 at 01:26:09PM -0700, Radhakrishna Sripada wrote:
> MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP
> (version = 12.70), and Xe_LPM+ media IP (version = 13).
> 
> Bspec: 55413
> Bspec: 55416
> Bspec: 55417
> Bspec: 55418
> Bspec: 55726
> Bspec: 45544
> Bspec: 65380
> 
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          |  1 +
>  drivers/gpu/drm/i915/i915_pci.c          | 25 ++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_device_info.c |  1 +
>  drivers/gpu/drm/i915/intel_device_info.h |  1 +
>  4 files changed, 28 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c22f29c3faa0..00998a78a2ba 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1018,6 +1018,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  	IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
>  #define IS_ADLP_RPLP(dev_priv) \
>  	IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
> +#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
>  #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
>  				    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
>  #define IS_BDW_ULT(dev_priv) \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 0cdd6513fbb7..82895ecb25ba 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1107,6 +1107,31 @@ static const struct intel_device_info pvc_info = {
>  	.require_force_probe = 1,
>  };
>  
> +#define XE_LPDP_FEATURES	\
> +	XE_LPD_FEATURES,	\
> +	.display.ver = 14,	\
> +	.display.has_cdclk_crawl = 1
> +
> +__maybe_unused
> +static const struct intel_device_info mtl_info = {
> +	XE_HP_FEATURES,
> +	XE_LPDP_FEATURES,
> +	/*
> +	 * Real graphics IP version will be obtained from hardware GMD_ID
> +	 * register.  Value provided here is just for sanity checking.
> +	 */
> +	.graphics.ver = 12,
> +	.graphics.rel = 70,
> +	.media.ver = 13,
> +	.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
> +	PLATFORM(INTEL_METEORLAKE),
> +	.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
> +	.require_force_probe = 1,
> +	.has_flat_ccs = 0,
> +	.has_snoop = 1,
> +	.display.has_modular_fia = 1,

Not a huge deal, but the ordering here is a bit non-standard.  On other
platforms we tend to order things as:

        *_FEATURES
        IP version values
        PLATFORM(FOO)
        everything else, sorted alphabetically


Matt

> +};
> +
>  #undef PLATFORM
>  
>  /*
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index f0bf23726ed8..27c343316afa 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -73,6 +73,7 @@ static const char * const platform_names[] = {
>  	PLATFORM_NAME(XEHPSDV),
>  	PLATFORM_NAME(DG2),
>  	PLATFORM_NAME(PONTEVECCHIO),
> +	PLATFORM_NAME(METEORLAKE),
>  };
>  #undef PLATFORM_NAME
>  
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 1c150cd7dceb..7ba9663213f4 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -89,6 +89,7 @@ enum intel_platform {
>  	INTEL_XEHPSDV,
>  	INTEL_DG2,
>  	INTEL_PONTEVECCHIO,
> +	INTEL_METEORLAKE,
>  	INTEL_MAX_PLATFORMS
>  };
>  
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation