From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C18C2C433EF for ; Mon, 11 Jul 2022 11:11:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=E8NYnYqKkGrKOlT2rFbJLPdJCb6Xbc20fHq5F4Lhnkw=; b=KLkgkdSjqIojQo HSDU6cDdh/SkWg5qA6Fz9MgBkOimRJcDxfaLK89ceyhxfC7NbwdwodvcXaHa9bopfPa899jHLDywT hHahYbQdw1nteYXuynrHrKj4LJEJLaVQ8iq8jy4z+LvnSSye6Rqv3wD1bOQzsMFbfq+9FpRpZ2/YZ lg2j//uYLbRM+UY/IBoS1Emb+/QTeXcbKLyYdtGo0HsJmltYmBrisi1qWSiYQbdU8qYxEPF68BzH/ ECw1u3PzYdVnCV6CUiZe9/LeBqNGs9+uIKHb+a5Czz9tAIOpxVJuArThoQoXUlITwjFTW+t0aCN1p rcrvh8850YkX0CE2+I+Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oArJG-000xeZ-7d; Mon, 11 Jul 2022 11:10:38 +0000 Received: from mail-ej1-x62a.google.com ([2a00:1450:4864:20::62a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oArJ3-000xXv-LB for linux-arm-kernel@lists.infradead.org; Mon, 11 Jul 2022 11:10:27 +0000 Received: by mail-ej1-x62a.google.com with SMTP id j22so8243789ejs.2 for ; Mon, 11 Jul 2022 04:10:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=zkANRKcZbCaKSgW3zgTNeMUMr8X2SBwRfvqFLff+8ZA=; b=ZBgFbOgBqk32UIWTND6ietHkpJ9TJrOwwXtkzswaVpoU8cqklMCFk81fOuqvtO9b9+ 193XC1MSSCbyeRCTelx7Em66ORq+FmDBSYBVSERNcNEchxozN6pHqlwerTuLzywh1PJ7 PPr5INbdvszlJtgdHO6XhLDVfxRYSD+EpLfYzREdWmvAqfTXb1AYuMVQyzz+UgfSKZsT OipXrh2/XOdyT0NtEXhNWLcAzerxjK/m2z7jd3nRq6uX7U+n5jKV+w1Tq89vDB1ZQFIh KjdKi2LPGjl7/fc3L/TZkwDsVRLWhTZ+cQonFNbttvBLHusUdIQosAAUe4FLvsRMbyrB i/ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=zkANRKcZbCaKSgW3zgTNeMUMr8X2SBwRfvqFLff+8ZA=; b=rNRbGWpFCqVTKleGrtzgVo2fInakUc9pnVkQV21f11ELz4I9BNhf7NooE+zaeMTynp 0974dXVajNdbC9lwO/p+heQXA4+GjA6G1Y1m0Fuw+iDthvJeas8VFZAtkMgE2pzUHWe2 fG4KQJUpsuXltHD+1GQcM/H0eYDTaqXSrmqtVqM6/15L332FoGG4+6rr7/EyYI4MFO8c sPf0+qRdAdm3HRta0H5W5OcrjoZYQzYuYjs8u6QvE6SSBkKxV24nH+J39FBWkNI55nJt TNOrVpYq39jeAWcHbrB9DFvlFxxGnU5yarDKBPs4sb5VLLK5gqoyewsHZuQ/m3pV7i56 DTQw== X-Gm-Message-State: AJIora/JfNQLc7SEjIWI5++Zan7+XtkogcAb00sPdJ1UDclTezzn0HYn OZJVDPyIydUikKb86Y+0XkAEM18s8K5psA== X-Google-Smtp-Source: AGRyM1uSmvI2XhE/U0vJsp/yH6sycrVAD/rDP9hVX00y91ePkUQ92JzvhV0TAf2kqlLOX6iymV68bw== X-Received: by 2002:a17:907:6ea3:b0:726:ca39:5d98 with SMTP id sh35-20020a1709076ea300b00726ca395d98mr17992224ejc.400.1657537822607; Mon, 11 Jul 2022 04:10:22 -0700 (PDT) Received: from linaro.org ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id gx16-20020a170906f1d000b0072b1bb3cc08sm2562448ejb.120.2022.07.11.04.10.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 04:10:22 -0700 (PDT) Date: Mon, 11 Jul 2022 14:10:19 +0300 From: Abel Vesa To: "Viorel Suman (OSS)" Cc: Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Dmitry Torokhov , Srinivas Kandagatla , Dong Aisheng , Fabio Estevam , Shawn Guo , Stefan Agner , Pengutronix Kernel Team , Linus Walleij , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Oliver Graute , Peng Fan , Liu Ying , Shijie Qin , Ming Qian , Mirela Rabulea , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v8 01/15] dt-bindings: clk: imx: Add fsl,scu-clk yaml file Message-ID: References: <20220707125022.1156498-1-viorel.suman@oss.nxp.com> <20220707125022.1156498-2-viorel.suman@oss.nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220707125022.1156498-2-viorel.suman@oss.nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220711_041025_721667_A66E6CF7 X-CRM114-Status: GOOD ( 25.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 22-07-07 15:50:08, Viorel Suman (OSS) wrote: > From: Abel Vesa > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'clock' child node of the SCU main node. > > Signed-off-by: Abel Vesa > Signed-off-by: Viorel Suman > Acked-by: Stephen Boyd > Reviewed-by: Krzysztof Kozlowski Shawn, I'm assuming you're going to pick this up through your tree, right? > --- > .../bindings/arm/freescale/fsl,scu.txt | 31 ------------- > .../bindings/clock/fsl,scu-clk.yaml | 43 +++++++++++++++++++ > 2 files changed, 43 insertions(+), 31 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml > > diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > index a87ec15e28d2..ef7f5222ac48 100644 > --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > @@ -79,29 +79,6 @@ Required properties: > See detailed Resource ID list from: > include/dt-bindings/firmware/imx/rsrc.h > > -Clock bindings based on SCU Message Protocol > ------------------------------------------------------------- > - > -This binding uses the common clock binding[1]. > - > -Required properties: > -- compatible: Should be one of: > - "fsl,imx8dxl-clk" > - "fsl,imx8qm-clk" > - "fsl,imx8qxp-clk" > - followed by "fsl,scu-clk" > -- #clock-cells: Should be 2. > - Contains the Resource and Clock ID value. > -- clocks: List of clock specifiers, must contain an entry for > - each required entry in clock-names > -- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz" > - > -The clock consumer should specify the desired clock by having the clock > -ID in its "clocks" phandle cell. > - > -See the full list of clock IDs from: > -include/dt-bindings/clock/imx8qxp-clock.h > - > Pinctrl bindings based on SCU Message Protocol > ------------------------------------------------------------ > > @@ -127,7 +104,6 @@ Required properties for Pinctrl sub nodes: > Please refer to i.MX8QXP Reference Manual for detailed > CONFIG settings. > > -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt > [2] Documentation/devicetree/bindings/power/power-domain.yaml > [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt > > @@ -208,11 +184,6 @@ firmware { > &lsio_mu1 1 3 > &lsio_mu1 3 3>; > > - clk: clk { > - compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; > - #clock-cells = <2>; > - }; > - > iomuxc { > compatible = "fsl,imx8qxp-iomuxc"; > > @@ -265,7 +236,5 @@ serial@5a060000 { > ... > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_lpuart0>; > - clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; > - clock-names = "ipg"; > power-domains = <&pd IMX_SC_R_UART_0>; > }; > diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml > new file mode 100644 > index 000000000000..f2c48460a399 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml > @@ -0,0 +1,43 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol > + > +maintainers: > + - Abel Vesa > + > +description: i.MX SCU Client Device Node > + Client nodes are maintained as children of the relevant IMX-SCU device node. > + This binding uses the common clock binding. > + (Documentation/devicetree/bindings/clock/clock-bindings.txt) > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See the full list of clock IDs from > + include/dt-bindings/clock/imx8qxp-clock.h > + > +properties: > + compatible: > + items: > + - enum: > + - fsl,imx8dxl-clk > + - fsl,imx8qm-clk > + - fsl,imx8qxp-clk > + - const: fsl,scu-clk > + > + '#clock-cells': > + const: 2 > + > +required: > + - compatible > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + - | > + clock-controller { > + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; > + #clock-cells = <2>; > + }; > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB7EEC433EF for ; Mon, 11 Jul 2022 11:29:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230440AbiGKL3a (ORCPT ); Mon, 11 Jul 2022 07:29:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231363AbiGKL25 (ORCPT ); Mon, 11 Jul 2022 07:28:57 -0400 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B0172717D for ; Mon, 11 Jul 2022 04:10:24 -0700 (PDT) Received: by mail-ej1-x62b.google.com with SMTP id oy13so3345548ejb.1 for ; Mon, 11 Jul 2022 04:10:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=zkANRKcZbCaKSgW3zgTNeMUMr8X2SBwRfvqFLff+8ZA=; b=ZBgFbOgBqk32UIWTND6ietHkpJ9TJrOwwXtkzswaVpoU8cqklMCFk81fOuqvtO9b9+ 193XC1MSSCbyeRCTelx7Em66ORq+FmDBSYBVSERNcNEchxozN6pHqlwerTuLzywh1PJ7 PPr5INbdvszlJtgdHO6XhLDVfxRYSD+EpLfYzREdWmvAqfTXb1AYuMVQyzz+UgfSKZsT OipXrh2/XOdyT0NtEXhNWLcAzerxjK/m2z7jd3nRq6uX7U+n5jKV+w1Tq89vDB1ZQFIh KjdKi2LPGjl7/fc3L/TZkwDsVRLWhTZ+cQonFNbttvBLHusUdIQosAAUe4FLvsRMbyrB i/ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=zkANRKcZbCaKSgW3zgTNeMUMr8X2SBwRfvqFLff+8ZA=; b=SnO6PEQWzgrLjs+4MGK3kZF58fq8YPtTkaz0booRvBXGs3Zu+FVsXcfRc9Jxn1DQG/ 5AscfpvLXDHAi3ekinTjB9nrmIH0BGCzOiMgNUblaFgmZc1fRsKnrCzRZ1Xhk4JSK9N9 B8DzqfvNpR0KMSCIw+T5QC0gFi5nS4OdjMTHfOgbx+kOXPC4pvu+0Jf7ugRpGyQ29xim sIOfvv2Q2RwdPlVe+zL2DR6f8upW4tBwLhGl9o1keLdibmnFI2KmH7cH6V/GbxmnSwhw kE/L5CQNk95IQ1uF0vBuVWpCUsq6MS07qj4K4Y61HFLzjB3DJZk1WRNapuL43XSgGXrs a/5Q== X-Gm-Message-State: AJIora+YcyuG3d3DZOQnKZZjk+eog/zb7VXqoEEmN14VpfvDcyQC1t+m 5BwA/ndM2taUBXiuKkOELtxrxw== X-Google-Smtp-Source: AGRyM1uSmvI2XhE/U0vJsp/yH6sycrVAD/rDP9hVX00y91ePkUQ92JzvhV0TAf2kqlLOX6iymV68bw== X-Received: by 2002:a17:907:6ea3:b0:726:ca39:5d98 with SMTP id sh35-20020a1709076ea300b00726ca395d98mr17992224ejc.400.1657537822607; Mon, 11 Jul 2022 04:10:22 -0700 (PDT) Received: from linaro.org ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id gx16-20020a170906f1d000b0072b1bb3cc08sm2562448ejb.120.2022.07.11.04.10.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 04:10:22 -0700 (PDT) Date: Mon, 11 Jul 2022 14:10:19 +0300 From: Abel Vesa To: "Viorel Suman (OSS)" Cc: Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Dmitry Torokhov , Srinivas Kandagatla , Dong Aisheng , Fabio Estevam , Shawn Guo , Stefan Agner , Pengutronix Kernel Team , Linus Walleij , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Wim Van Sebroeck , Guenter Roeck , Sascha Hauer , NXP Linux Team , Abel Vesa , Viorel Suman , Oliver Graute , Peng Fan , Liu Ying , Shijie Qin , Ming Qian , Mirela Rabulea , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-input@vger.kernel.org, linux-gpio@vger.kernel.org, linux-rtc@vger.kernel.org, linux-pm@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v8 01/15] dt-bindings: clk: imx: Add fsl,scu-clk yaml file Message-ID: References: <20220707125022.1156498-1-viorel.suman@oss.nxp.com> <20220707125022.1156498-2-viorel.suman@oss.nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220707125022.1156498-2-viorel.suman@oss.nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 22-07-07 15:50:08, Viorel Suman (OSS) wrote: > From: Abel Vesa > > In order to replace the fsl,scu txt file from bindings/arm/freescale, > we need to split it between the right subsystems. This patch documents > separately the 'clock' child node of the SCU main node. > > Signed-off-by: Abel Vesa > Signed-off-by: Viorel Suman > Acked-by: Stephen Boyd > Reviewed-by: Krzysztof Kozlowski Shawn, I'm assuming you're going to pick this up through your tree, right? > --- > .../bindings/arm/freescale/fsl,scu.txt | 31 ------------- > .../bindings/clock/fsl,scu-clk.yaml | 43 +++++++++++++++++++ > 2 files changed, 43 insertions(+), 31 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml > > diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > index a87ec15e28d2..ef7f5222ac48 100644 > --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > @@ -79,29 +79,6 @@ Required properties: > See detailed Resource ID list from: > include/dt-bindings/firmware/imx/rsrc.h > > -Clock bindings based on SCU Message Protocol > ------------------------------------------------------------- > - > -This binding uses the common clock binding[1]. > - > -Required properties: > -- compatible: Should be one of: > - "fsl,imx8dxl-clk" > - "fsl,imx8qm-clk" > - "fsl,imx8qxp-clk" > - followed by "fsl,scu-clk" > -- #clock-cells: Should be 2. > - Contains the Resource and Clock ID value. > -- clocks: List of clock specifiers, must contain an entry for > - each required entry in clock-names > -- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz" > - > -The clock consumer should specify the desired clock by having the clock > -ID in its "clocks" phandle cell. > - > -See the full list of clock IDs from: > -include/dt-bindings/clock/imx8qxp-clock.h > - > Pinctrl bindings based on SCU Message Protocol > ------------------------------------------------------------ > > @@ -127,7 +104,6 @@ Required properties for Pinctrl sub nodes: > Please refer to i.MX8QXP Reference Manual for detailed > CONFIG settings. > > -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt > [2] Documentation/devicetree/bindings/power/power-domain.yaml > [3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt > > @@ -208,11 +184,6 @@ firmware { > &lsio_mu1 1 3 > &lsio_mu1 3 3>; > > - clk: clk { > - compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; > - #clock-cells = <2>; > - }; > - > iomuxc { > compatible = "fsl,imx8qxp-iomuxc"; > > @@ -265,7 +236,5 @@ serial@5a060000 { > ... > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_lpuart0>; > - clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; > - clock-names = "ipg"; > power-domains = <&pd IMX_SC_R_UART_0>; > }; > diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml > new file mode 100644 > index 000000000000..f2c48460a399 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml > @@ -0,0 +1,43 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol > + > +maintainers: > + - Abel Vesa > + > +description: i.MX SCU Client Device Node > + Client nodes are maintained as children of the relevant IMX-SCU device node. > + This binding uses the common clock binding. > + (Documentation/devicetree/bindings/clock/clock-bindings.txt) > + The clock consumer should specify the desired clock by having the clock > + ID in its "clocks" phandle cell. See the full list of clock IDs from > + include/dt-bindings/clock/imx8qxp-clock.h > + > +properties: > + compatible: > + items: > + - enum: > + - fsl,imx8dxl-clk > + - fsl,imx8qm-clk > + - fsl,imx8qxp-clk > + - const: fsl,scu-clk > + > + '#clock-cells': > + const: 2 > + > +required: > + - compatible > + - '#clock-cells' > + > +additionalProperties: false > + > +examples: > + - | > + clock-controller { > + compatible = "fsl,imx8qxp-clk", "fsl,scu-clk"; > + #clock-cells = <2>; > + }; > -- > 2.25.1 >