From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE152C6FA8E for ; Wed, 28 Sep 2022 12:01:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233418AbiI1MB3 (ORCPT ); Wed, 28 Sep 2022 08:01:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231301AbiI1MB1 (ORCPT ); Wed, 28 Sep 2022 08:01:27 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 947E46CD0E; Wed, 28 Sep 2022 05:01:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=yG3EO7bhQAbZBMVLnUELpWW5SoVX+r5MbUkq+fTPHdk=; b=zsDIjoZXxhbZwwH4RSzziY+y8Z OxaIAz/ND+ZwVJSocwu9+lnHXhP0FBbqaoV5C6o2OPPNKFCOnJ8osRNJ3NJ510QANPFaBytU1XkIS WCQ6VnrUsfXPRdFEK/rbIzimAo7pjRzz/5hn15H+yfI0VV7o3i81vdsbuZeiI001v9Qw=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1odVkP-000VTF-66; Wed, 28 Sep 2022 14:01:05 +0200 Date: Wed, 28 Sep 2022 14:01:05 +0200 From: Andrew Lunn To: Yoshihiro Shimoda Cc: "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" Subject: Re: [PATCH v3 2/3] net: ethernet: renesas: Add Ethernet Switch driver Message-ID: References: <20220922052803.3442561-1-yoshihiro.shimoda.uh@renesas.com> <20220922052803.3442561-3-yoshihiro.shimoda.uh@renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > > How do you direct a frame from the > > CPU out a specific user port? Via the DMA ring you place it into, or > > do you need a tag on the frame to indicate its egress port? > > Via the DMA ring. Are there bits in the ring descriptor which indicate the user port? Can you set these bits to some other value which causes the switch to use its MAC table to determine the egress interface? > > > The PHY is 88E2110 on my environment, so Linux has a driver in > > > drivers/net/phy/marvell10g.c. However, I guess this is related to > > > configuration of the PHY chip on the board, it needs to change > > > the host 7interface mode, but the driver doesn't support it for now. > > > > Please give us more details. The marvell10g driver will change its > > host side depending on the result of the line side negotiation. It > > changes the value of phydev->interface to indicate what is it doing on > > its host side, and you have some control over what modes it will use > > on the host side. You can probably define its initial host side mode > > via phy-mode in DT. > > I'm sorry, my explanation was completely wrong. > My environment needs to change default MAC speed from 2.5G/5G to 1000M. > The register of 88E2110 is 31.F000.7:6. And sets the register to "10" (1000 Mbps). > (Default value of the register is "11" (Speed controlled by other register).) Is this the host side speed? The speed of the SERDES between the switch and the PHY? Normally, the PHY determines this from the line side. If the line side is using 2.5G, it will set the host side to 2500BaseX. If the line side is 1G, the host side is likely to be SGMII. You have already removed speeds you don't support. So the PHY will not negotiate 2.5G or 5G. It is limited to 1G. So it should always have the host side as SGMII. This should be enough to make it work. Andrew