Re: [PATCH] net: phy: return EPROBE_DEFER if PHY is not accessible

From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: "Buzarra, Arturo" <Arturo.Buzarra@digi.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Andrew Lunn <andrew@lunn.ch>
Subject: Re: [PATCH] net: phy: return EPROBE_DEFER if PHY is not accessible
Date: Mon, 20 Mar 2023 10:12:10 +0000	[thread overview]
Message-ID: <ZBgxel31tqJGD1j2@shell.armlinux.org.uk> (raw)
In-Reply-To: <DS7PR10MB4926EBB7DAA389E69A4E2FC1FA809@DS7PR10MB4926.namprd10.prod.outlook.com>

On Mon, Mar 20, 2023 at 09:45:38AM +0000, Buzarra, Arturo wrote:
> Hi,
> 
> I will try to answer all your questions:
> 
> - "We need more specifics here, what type of PHY device are you seeing this with?"
> - " So best start with some details about your use case, which MAC, which PHY, etc"
> I'm using a LAN8720A PHY (10/100 on RMII mode) with a ST MAC ( in particular is a stm32mp1 processor).

I can only find:

arch/arm/boot/dts/rk3066a-marsboard.dts:        lan8720a {
arch/arm/boot/dts/rk3188-radxarock.dts: lan8720a  {
arch/arm/boot/dts/imx6sx-softing-vining-2000.dts:                       /* LAN8720 PHY Reset */
arch/arm/boot/dts/imx6sx-softing-vining-2000.dts:                       /* LAN8720 PHY Reset */
arch/mips/boot/dts/ingenic/cu1000-neo.dts:      phy-handle = <&lan8720a>;
arch/mips/boot/dts/ingenic/cu1000-neo.dts:      lan8720a: ethernet-phy@0 {

using this PHY in the mainline kernel, none of them look like a stm32mp1
processor.

Please can you give details of how the MDIO bus is connected to this
PHY, in particular the hardware setup, and which driver is being used?

> We have two PHYs one is a Gigabit PHY (RGMII mode) and the another one is a 10/100 (RMII mode).
> In the boot process, I think that there is a race condition between configuring the Ethernet MACs and the two PHYs. At same point the RGMII Ethernet MAC is configured and starts the PHY probes.
> When the 10/100 PHY starts the probe, it tries to read the genphy_read_abilities() and always reads 0xFFFF ( I assume that this is the default electrical values for that lines before it are configured).
> At that point, the PHY initialization assumes like a valid value 0xFFFF and obviously it reports capabilities that the LAN8720A PHY does not have, like for example gigabit support.

So the questions that need to be asked are:

  What is causing 0xffff to be returned?

and two sub-questions on that which may help you answer it in a way
that is most relevant:

  Is it the PHY itself that is not responding?

  Is the MDIO driver not functional because the MAC or some resource it
  needs hasn't been setup, and thus is returning 0xffff?

-- 
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