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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Paul Durrant <paul@xen.org>, Wei Liu <wl@xen.org>
Subject: Re: [PATCH v6] x86: detect CMOS aliasing on ports other than 0x70/0x71
Date: Wed, 19 Apr 2023 17:55:29 +0200	[thread overview]
Message-ID: <ZEAO8e9iTjmi86fr@Air-de-Roger> (raw)
In-Reply-To: <c736271f-96ad-dfdb-48ae-b8e9cc002d9b@suse.com>

On Wed, Apr 19, 2023 at 03:58:10PM +0200, Jan Beulich wrote:
> On 18.04.2023 13:35, Roger Pau Monné wrote:
> > On Tue, Apr 18, 2023 at 11:24:19AM +0200, Jan Beulich wrote:
> >> ... in order to also intercept Dom0 accesses through the alias ports.
> >>
> >> Also stop intercepting accesses to the CMOS ports if we won't ourselves
> >> use the CMOS RTC, because of there being none.
> >>
> >> Note that rtc_init() deliberately uses 16 as the upper loop bound,
> >> despite probe_cmos_alias() using 8: The higher bound is benign now, but
> >> would save us touching the code (or, worse, missing to touch it) in case
> >> the lower one was doubled.
> >>
> >> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> > 
> > Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
> 
> Before committing I went back to read through doc and earlier comments,
> in particular regarding the NMI disable. As a result I'm now inclined
> to follow your earlier request and fold in the change below. Thoughts?

It was unclear to me whether port 0x70 also had this NMI disabling
behavior when the RTC/CMOS is not present but it seems that port is
shared between the RTC index and the NMI logic, so lack of RTC doesn't
imply lack of the NMI bit.

> Jan
> 
> --- a/xen/arch/x86/time.c
> +++ b/xen/arch/x86/time.c
> @@ -1305,6 +1305,13 @@ bool is_cmos_port(unsigned int port, uns
>  {
>      unsigned int offs;
>  
> +    /*
> +     * While not really CMOS-related, port 0x70 always needs intercepting
> +     * to deal with the NMI disable bit.
> +     */
> +    if ( port <= RTC_PORT(0) && port + bytes > RTC_PORT(0) )
> +        return true;

It might make it clearer to move this after the !is_hardware_domain(d)
check, as non-hardware domains don't get access to that port anyway?

> +
>      if ( !is_hardware_domain(d) )
>          return port <= RTC_PORT(1) && port + bytes > RTC_PORT(0);
>  
> @@ -1342,6 +1349,17 @@ unsigned int rtc_guest_read(unsigned int
>           * underlying hardware would permit doing so.
>           */
>          data = currd->arch.cmos_idx & (0xff >> (port == RTC_PORT(0)));
> +
> +        /*
> +         * When there's (supposedly) no RTC/CMOS, we don't intercept the other
> +         * ports. While reading the index register isn't normally possible,
> +         * play safe and return back whatever can be read (just in case a value
> +         * written through an alias would be attempted to be read back here).
> +         */
> +        if ( port == RTC_PORT(0) &&
> +             (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) &&
> +             ioports_access_permitted(currd, port, port) )
> +            data = inb(port) & 0x7f;

Do we really need to mask the high bit here?  We don't allow setting
that bit in the first place.

Thanks, Roger.


  reply	other threads:[~2023-04-19 15:56 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-15 11:54 [PATCH v3 0/2] x86: RTC handling adjustments Jan Beulich
2020-07-15 11:56 ` [PATCH v3 1/2] x86: restore pv_rtc_handler() invocation Jan Beulich
2020-07-15 12:13   ` Roger Pau Monné
2020-07-15 12:36     ` Jan Beulich
2020-07-15 13:32       ` Roger Pau Monné
2020-07-15 13:51         ` Jan Beulich
2020-07-15 14:51           ` Roger Pau Monné
2020-07-16 10:06             ` Jan Beulich
2020-07-16 10:31               ` Roger Pau Monné
2020-07-16 10:52                 ` Jan Beulich
2020-07-20 15:28               ` Andrew Cooper
2020-07-20 16:27                 ` Jan Beulich
2020-07-21  6:36                   ` Jan Beulich
2020-07-15 12:31   ` Paul Durrant
2020-07-15 11:57 ` [PATCH v3 2/2] x86: detect CMOS aliasing on ports other than 0x70/0x71 Jan Beulich
2020-07-20 11:11   ` Roger Pau Monné
2023-03-17 16:12     ` Roger Pau Monné
2023-03-20  8:32 ` [PATCH v4] " Jan Beulich
2023-03-21 14:12   ` Roger Pau Monné
2023-03-22  9:55     ` Jan Beulich
2023-03-23 12:29       ` Roger Pau Monné
2023-03-23 14:26         ` Jan Beulich
2023-03-27 15:44     ` Jan Beulich
2023-03-23 14:49   ` Roger Pau Monné
2023-03-23 16:08     ` Jan Beulich
2023-03-23 16:40       ` Roger Pau Monné
2023-03-27 15:46         ` Jan Beulich
2023-03-27 15:44     ` Jan Beulich
2023-03-30 10:40 ` [PATCH v5] " Jan Beulich
2023-04-03 11:09   ` Roger Pau Monné
2023-04-03 11:26     ` Jan Beulich
2023-04-03 11:44       ` Roger Pau Monné
2023-04-03 12:24         ` Jan Beulich
2023-04-18  9:24 ` [PATCH v6] " Jan Beulich
2023-04-18 11:35   ` Roger Pau Monné
2023-04-19  7:56     ` Jan Beulich
2023-04-19 10:45       ` Roger Pau Monné
2023-04-19 13:58     ` Jan Beulich
2023-04-19 15:55       ` Roger Pau Monné [this message]
2023-04-20  8:31         ` Jan Beulich
2023-04-20 14:31           ` Roger Pau Monné
2023-04-20 14:55             ` Jan Beulich

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