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Fri, 05 May 2023 10:03:57 -0700 (PDT) Received: from p14s ([2604:3d09:148c:c800:fd16:b4b6:ee7c:e4e5]) by smtp.gmail.com with ESMTPSA id c13-20020a170902d48d00b001994fc55998sm2013388plg.217.2023.05.05.10.03.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 May 2023 10:03:57 -0700 (PDT) Date: Fri, 5 May 2023 11:03:54 -0600 From: Mathieu Poirier To: Arnaud Pouliquen Cc: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Alexandre Torgue , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/4] remoteproc: stm32: Allow hold boot management by the SCMI reset controller Message-ID: References: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> <20230504094641.870378-3-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230504094641.870378-3-arnaud.pouliquen@foss.st.com> Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Hi Arnaud, On Thu, May 04, 2023 at 11:46:39AM +0200, Arnaud Pouliquen wrote: > The hold boot can be managed by the SCMI controller as a reset. > If the "hold_boot" reset is defined in the device tree, use it. > Else use the syscon controller directly to access to the register. > The support of the SMC call is deprecated but kept for legacy support. > > Signed-off-by: Arnaud Pouliquen > --- > Updates vs previous version > - keep support of the "st,syscfg-tz" property for legacy compatibility > - rename secured_soc in hold_boot_smc for readability > - add comments to explain hold boot management. > - update commit message > --- > drivers/remoteproc/stm32_rproc.c | 78 +++++++++++++++++++++++--------- > 1 file changed, 57 insertions(+), 21 deletions(-) > > diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c > index 7d782ed9e589..e9cf24274345 100644 > --- a/drivers/remoteproc/stm32_rproc.c > +++ b/drivers/remoteproc/stm32_rproc.c > @@ -79,6 +79,7 @@ struct stm32_mbox { > > struct stm32_rproc { > struct reset_control *rst; > + struct reset_control *hold_boot_rst; > struct stm32_syscon hold_boot; > struct stm32_syscon pdds; > struct stm32_syscon m4_state; > @@ -88,7 +89,7 @@ struct stm32_rproc { > struct stm32_rproc_mem *rmems; > struct stm32_mbox mb[MBOX_NB_MBX]; > struct workqueue_struct *workqueue; > - bool secured_soc; > + bool hold_boot_smc; > void __iomem *rsc_va; > }; > > @@ -401,13 +402,28 @@ static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold) > struct arm_smccc_res smc_res; > int val, err; > > + /* > + * Three ways to manage the hold boot > + * - using SCMI: the hold boot is managed as a reset, > + * - using Linux(no SCMI): the hold boot is managed as a syscon register > + * - using SMC call (deprecated): use SMC reset interface > + */ > + > val = hold ? HOLD_BOOT : RELEASE_BOOT; > > - if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) { > + if (ddata->hold_boot_rst) { > + /* Use the SCMI reset controller */ > + if (!hold) > + err = reset_control_deassert(ddata->hold_boot_rst); > + else > + err = reset_control_assert(ddata->hold_boot_rst); > + } else if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->hold_boot_smc) { > + /* Use the SMC call */ > arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE, > hold_boot.reg, val, 0, 0, 0, 0, &smc_res); > err = smc_res.a0; > } else { > + /* Use syscon */ > err = regmap_update_bits(hold_boot.map, hold_boot.reg, > hold_boot.mask, val); > } > @@ -705,34 +721,54 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev, > dev_info(dev, "wdg irq registered\n"); > } > > - ddata->rst = devm_reset_control_get_by_index(dev, 0); > + ddata->rst = devm_reset_control_get_optional(dev, "mcu_rst"); > + if (!ddata->rst) { > + /* Try legacy fallback method: get it by index */ > + ddata->rst = devm_reset_control_get_by_index(dev, 0); > + } > if (IS_ERR(ddata->rst)) > return dev_err_probe(dev, PTR_ERR(ddata->rst), > "failed to get mcu_reset\n"); > > /* > - * if platform is secured the hold boot bit must be written by > - * smc call and read normally. > - * if not secure the hold boot bit could be read/write normally > + * Three ways to manage the hold boot > + * - using SCMI: the hold boot is managed as a reset > + * The DT "reset-mames" property should be defined with 2 items: > + * reset-names = "mcu_rst", "hold_boot"; > + * - using SMC call (deprecated): use SMC reset interface > + * The DT "reset-mames" property is optional, "st,syscfg-tz" is required > + * - default(no SCMI, no SMC): the hold boot is managed as a syscon register > + * The DT "reset-mames" property is optional, "st,syscfg-holdboot" is required > */ > - err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); > - if (err) { > - dev_err(dev, "failed to get tz syscfg\n"); > - return err; > - } > > - err = regmap_read(tz.map, tz.reg, &tzen); > - if (err) { > - dev_err(dev, "failed to read tzen\n"); > - return err; > + ddata->hold_boot_rst = devm_reset_control_get_optional(dev, "hold_boot"); > + if (IS_ERR(ddata->hold_boot_rst)) { > + if (PTR_ERR(ddata->hold_boot_rst) == -EPROBE_DEFER) > + return PTR_ERR(ddata->hold_boot_rst); Here we know that devm_reset_control_get_optional() has returned an error that is not -EPROBE_DEFER and as such, I think we should return that error instead of continuing on with the probing. Calling dev_err_probe() should be just fine. Otherwise I'm good with this set. Many thanks for the enhanced explanation. Mathieu > + ddata->hold_boot_rst = NULL; > + } > + > + if (!ddata->hold_boot_rst && IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)) { > + /* Manage the MCU_BOOT using SMC call */ > + err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); > + if (!err) { > + err = regmap_read(tz.map, tz.reg, &tzen); > + if (err) { > + dev_err(dev, "failed to read tzen\n"); > + return err; > + } > + ddata->hold_boot_smc = tzen & tz.mask; > + } > } > - ddata->secured_soc = tzen & tz.mask; > > - err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", > - &ddata->hold_boot); > - if (err) { > - dev_err(dev, "failed to get hold boot\n"); > - return err; > + if (!ddata->hold_boot_rst && !ddata->hold_boot_smc) { > + /* Default: hold boot manage it through the syscon controller */ > + err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", > + &ddata->hold_boot); > + if (err) { > + dev_err(dev, "failed to get hold boot\n"); > + return err; > + } > } > > err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds); > -- > 2.25.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6CED8C77B75 for ; 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Fri, 05 May 2023 10:03:57 -0700 (PDT) Date: Fri, 5 May 2023 11:03:54 -0600 From: Mathieu Poirier To: Arnaud Pouliquen Cc: Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Alexandre Torgue , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/4] remoteproc: stm32: Allow hold boot management by the SCMI reset controller Message-ID: References: <20230504094641.870378-1-arnaud.pouliquen@foss.st.com> <20230504094641.870378-3-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230504094641.870378-3-arnaud.pouliquen@foss.st.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230505_100400_880029_0CB52B0D X-CRM114-Status: GOOD ( 35.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Arnaud, On Thu, May 04, 2023 at 11:46:39AM +0200, Arnaud Pouliquen wrote: > The hold boot can be managed by the SCMI controller as a reset. > If the "hold_boot" reset is defined in the device tree, use it. > Else use the syscon controller directly to access to the register. > The support of the SMC call is deprecated but kept for legacy support. > > Signed-off-by: Arnaud Pouliquen > --- > Updates vs previous version > - keep support of the "st,syscfg-tz" property for legacy compatibility > - rename secured_soc in hold_boot_smc for readability > - add comments to explain hold boot management. > - update commit message > --- > drivers/remoteproc/stm32_rproc.c | 78 +++++++++++++++++++++++--------- > 1 file changed, 57 insertions(+), 21 deletions(-) > > diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c > index 7d782ed9e589..e9cf24274345 100644 > --- a/drivers/remoteproc/stm32_rproc.c > +++ b/drivers/remoteproc/stm32_rproc.c > @@ -79,6 +79,7 @@ struct stm32_mbox { > > struct stm32_rproc { > struct reset_control *rst; > + struct reset_control *hold_boot_rst; > struct stm32_syscon hold_boot; > struct stm32_syscon pdds; > struct stm32_syscon m4_state; > @@ -88,7 +89,7 @@ struct stm32_rproc { > struct stm32_rproc_mem *rmems; > struct stm32_mbox mb[MBOX_NB_MBX]; > struct workqueue_struct *workqueue; > - bool secured_soc; > + bool hold_boot_smc; > void __iomem *rsc_va; > }; > > @@ -401,13 +402,28 @@ static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold) > struct arm_smccc_res smc_res; > int val, err; > > + /* > + * Three ways to manage the hold boot > + * - using SCMI: the hold boot is managed as a reset, > + * - using Linux(no SCMI): the hold boot is managed as a syscon register > + * - using SMC call (deprecated): use SMC reset interface > + */ > + > val = hold ? HOLD_BOOT : RELEASE_BOOT; > > - if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) { > + if (ddata->hold_boot_rst) { > + /* Use the SCMI reset controller */ > + if (!hold) > + err = reset_control_deassert(ddata->hold_boot_rst); > + else > + err = reset_control_assert(ddata->hold_boot_rst); > + } else if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->hold_boot_smc) { > + /* Use the SMC call */ > arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE, > hold_boot.reg, val, 0, 0, 0, 0, &smc_res); > err = smc_res.a0; > } else { > + /* Use syscon */ > err = regmap_update_bits(hold_boot.map, hold_boot.reg, > hold_boot.mask, val); > } > @@ -705,34 +721,54 @@ static int stm32_rproc_parse_dt(struct platform_device *pdev, > dev_info(dev, "wdg irq registered\n"); > } > > - ddata->rst = devm_reset_control_get_by_index(dev, 0); > + ddata->rst = devm_reset_control_get_optional(dev, "mcu_rst"); > + if (!ddata->rst) { > + /* Try legacy fallback method: get it by index */ > + ddata->rst = devm_reset_control_get_by_index(dev, 0); > + } > if (IS_ERR(ddata->rst)) > return dev_err_probe(dev, PTR_ERR(ddata->rst), > "failed to get mcu_reset\n"); > > /* > - * if platform is secured the hold boot bit must be written by > - * smc call and read normally. > - * if not secure the hold boot bit could be read/write normally > + * Three ways to manage the hold boot > + * - using SCMI: the hold boot is managed as a reset > + * The DT "reset-mames" property should be defined with 2 items: > + * reset-names = "mcu_rst", "hold_boot"; > + * - using SMC call (deprecated): use SMC reset interface > + * The DT "reset-mames" property is optional, "st,syscfg-tz" is required > + * - default(no SCMI, no SMC): the hold boot is managed as a syscon register > + * The DT "reset-mames" property is optional, "st,syscfg-holdboot" is required > */ > - err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); > - if (err) { > - dev_err(dev, "failed to get tz syscfg\n"); > - return err; > - } > > - err = regmap_read(tz.map, tz.reg, &tzen); > - if (err) { > - dev_err(dev, "failed to read tzen\n"); > - return err; > + ddata->hold_boot_rst = devm_reset_control_get_optional(dev, "hold_boot"); > + if (IS_ERR(ddata->hold_boot_rst)) { > + if (PTR_ERR(ddata->hold_boot_rst) == -EPROBE_DEFER) > + return PTR_ERR(ddata->hold_boot_rst); Here we know that devm_reset_control_get_optional() has returned an error that is not -EPROBE_DEFER and as such, I think we should return that error instead of continuing on with the probing. Calling dev_err_probe() should be just fine. Otherwise I'm good with this set. Many thanks for the enhanced explanation. Mathieu > + ddata->hold_boot_rst = NULL; > + } > + > + if (!ddata->hold_boot_rst && IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)) { > + /* Manage the MCU_BOOT using SMC call */ > + err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); > + if (!err) { > + err = regmap_read(tz.map, tz.reg, &tzen); > + if (err) { > + dev_err(dev, "failed to read tzen\n"); > + return err; > + } > + ddata->hold_boot_smc = tzen & tz.mask; > + } > } > - ddata->secured_soc = tzen & tz.mask; > > - err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", > - &ddata->hold_boot); > - if (err) { > - dev_err(dev, "failed to get hold boot\n"); > - return err; > + if (!ddata->hold_boot_rst && !ddata->hold_boot_smc) { > + /* Default: hold boot manage it through the syscon controller */ > + err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", > + &ddata->hold_boot); > + if (err) { > + dev_err(dev, "failed to get hold boot\n"); > + return err; > + } > } > > err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds); > -- > 2.25.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel