Re: [RFC] net: dsa: slave: Advertise correct EEE capabilities at slave PHY setup

From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Lukasz Majewski <lukma@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Vladimir Oltean <olteanv@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Jakub Kicinski <kuba@kernel.org>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC] net: dsa: slave: Advertise correct EEE capabilities at slave PHY setup
Date: Wed, 31 May 2023 09:37:46 +0100	[thread overview]
Message-ID: <ZHcHWqdWsZSkV6C1@shell.armlinux.org.uk> (raw)
In-Reply-To: <20230531101640.131fe934@wsk>

On Wed, May 31, 2023 at 10:16:40AM +0200, Lukasz Majewski wrote:
> Hi Russell,
> 
> > On Tue, May 30, 2023 at 04:26:49PM +0200, Andrew Lunn wrote:
> > > > So, I'm wondering what's actually going on here... can you give
> > > > any more details about the hardware setup?  
> > > 
> > > And what switch it actually is. I've not looked in too much detail,
> > > but i think different switch families have different EEE
> > > capabilities. But in general, as Russell pointed out, there is no
> > > MAC support for EEE in the mv88e6xxx driver.  
> > 
> > ... except for the built-in PHYs,
> 
> This is my case.
> 
> > which if they successfully negotiate
> > EEE, that status is communicated back to the MAC in that one sees
> > MV88E6352_PORT_STS_EEE
> 
> I cannot find this register in my documentation.

$ grep MV88E6352_PORT_STS_EEE drivers/net/dsa/mv88e6xxx/port.h

It's a register bit, not a register.

> > set, which results in the MAC being able to
> > signal LPI to the PHY... and I've stuck a 'scope on the PHY media-side
> > signals in the past and have seen that activity does stop without
> > there needing to be any help from the driver for this.
> > 
> > At least reading the information I have for the 88E6352, there is no
> > configuration of LPI timers, nor any seperate LPI enable. If EEE is
> > enabled at the MAC, then LPI will be signalled according to whatever
> > Marvell decided would be appropriate.
> 
> And this knowledge is not disclosed to public.
> 
> > 
> > For an external PHY that the PPU is not polling, the only way that
> > we'd have EEE functional is if we forced EEE in port control register
> > 1 on switches that support those bits. In other words setting both the
> > EEE and FORCE_EEE bits...
> > 
> 
> Are those bits available in c45 standard? Or are they SoC (IC) specific?

I'm talking about bits in the switch port control register, not in
the PHY. Again, grepping the above file will tell you which bits
and their location.

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