From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88CDEEB64D7 for ; Thu, 29 Jun 2023 02:56:00 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3944E863B0; Thu, 29 Jun 2023 04:55:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7E1AF8664F; Thu, 29 Jun 2023 04:55:56 +0200 (CEST) Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 28AF8863AE for ; Thu, 29 Jun 2023 04:55:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ycliang@andestech.com Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 35T2tOPp007979; Thu, 29 Jun 2023 10:55:24 +0800 (+08) (envelope-from ycliang@andestech.com) Received: from ubuntu01 (10.0.12.75) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 29 Jun 2023 10:55:20 +0800 Date: Thu, 29 Jun 2023 02:55:16 +0000 From: Leo Liang To: Yixun Lan CC: , Rick Chen , Wei Fu , Jisheng Zhang , Guo Ren Subject: Re: [RESEND PATCH v1 1/4] riscv: t-head: licheepi4a: initial support added Message-ID: References: <20230526124107.894-1-dlan@gentoo.org> <20230526124107.894-2-dlan@gentoo.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20230526124107.894-2-dlan@gentoo.org> User-Agent: Mutt/2.0.5 (2021-01-21) X-Originating-IP: [10.0.12.75] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 35T2tOPp007979 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Hi YiXun, On Fri, May 26, 2023 at 08:41:04PM +0800, Yixun Lan wrote: > Add support for Sipeed's Lichee Pi 4A board which based on > T-HEAD's TH1520 SoC, only minimal device tree and serial onsole are enabled, > so it's capable of chain booting from T-HEAD's vendor u-boot. > > Reviewed-by: Wei Fu > Signed-off-by: Yixun Lan > ... > diff --git a/board/thead/th1520_lpi4a/board.c b/board/thead/th1520_lpi4a/board.c > new file mode 100644 > index 0000000000..378bab098b > --- /dev/null > +++ b/board/thead/th1520_lpi4a/board.c > @@ -0,0 +1,14 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (c) 2023, Yixun Lan > + * > + */ > + > +#include > + > +int board_init(void) > +{ > + enable_caches(); There is a compilation warining here at "enable_caches" (probably due to cpu_func.h not being included to provide this function) Best regards, Leo > + > + return 0; > +}