From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCDADC43334 for ; Thu, 9 Jun 2022 11:37:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237248AbiFILhH (ORCPT ); Thu, 9 Jun 2022 07:37:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235928AbiFILhC (ORCPT ); Thu, 9 Jun 2022 07:37:02 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id B67C26394; Thu, 9 Jun 2022 04:36:59 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7534712FC; Thu, 9 Jun 2022 04:36:59 -0700 (PDT) Received: from [10.57.82.209] (unknown [10.57.82.209]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EF1433F73B; Thu, 9 Jun 2022 04:36:55 -0700 (PDT) Message-ID: Date: Thu, 9 Jun 2022 12:36:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH V5] arm64: perf: Make exporting of pmu events configurable Content-Language: en-GB To: Srinivasarao Pathipati , Will Deacon Cc: mark.rutland@arm.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <1653306574-20946-1-git-send-email-quic_c_spathi@quicinc.com> <20220609100247.GA2187@willie-the-truck> <4f5dbc00-e25b-f6ff-8585-31fc50f48a21@quicinc.com> From: Robin Murphy In-Reply-To: <4f5dbc00-e25b-f6ff-8585-31fc50f48a21@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022-06-09 11:35, Srinivasarao Pathipati wrote: > On our Qualcomm platforms, The X bit is getting set by firmware at early > bootup for Qualcomm use cases > and non-secure world is resetting it, that causing issue. I think you're going to have to clarify what exactly this "issue" is if we're ever going to make sense of it... I can't imagine that export from a disabled PMU would matter much, so my best guess is that EL2 firmware has reserved some counters via MDCR_EL2.HPMN which it's using to monitor the Non-Secure boot; if that also depends on PMCR.X remaining set, then as far as I can see it's really the firmware's own stupid fault for not using MDCR_EL2.TPMCR to prevent Linux from messing with its configuration. Or maybe something in the Secure world is trying to use the PMU independently and it's an EL3 bug where PMCR_EL0 isn't being context-switched properly? Robin. > On 6/9/2022 3:32 PM, Will Deacon wrote: >> On Mon, May 23, 2022 at 05:19:34PM +0530, Srinivasarao Pathipati wrote: >>> The PMU export bit (PMCR_EL0.X) is getting reset during pmu reset, >>> Make is configurable using sysctls to enable/disable at runtime. >>> It can also be enabled at early bootup with kernel arguments. >>> >>> Signed-off-by: Srinivasarao Pathipati >>> --- >>> Changes since V4: >>>     - Registering sysctls dynamically for only arm64 as suggested by >>> Will >>>     - Not removed the code to configure with kernel parameters >>>       as the sysctl's kernel parameter(sysctl.kernel.export_pmu_events) >>>       is not working at early bootup. pmu_reset() getting called before >>>       sysctl's kernel parameter is set. >> Why do you need this during early bootup? Perf won't program any events >> until much later and if somebody else is configuring the PMU before >> entering Linux then they can also set that X bit in the PMCR. >> >> Will > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D47F1C433EF for ; Thu, 9 Jun 2022 11:38:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 9 Jun 2022 04:36:55 -0700 (PDT) Message-ID: Date: Thu, 9 Jun 2022 12:36:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH V5] arm64: perf: Make exporting of pmu events configurable Content-Language: en-GB To: Srinivasarao Pathipati , Will Deacon Cc: mark.rutland@arm.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, alexander.shishkin@linux.intel.com, jolsa@kernel.org, namhyung@kernel.org, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <1653306574-20946-1-git-send-email-quic_c_spathi@quicinc.com> <20220609100247.GA2187@willie-the-truck> <4f5dbc00-e25b-f6ff-8585-31fc50f48a21@quicinc.com> From: Robin Murphy In-Reply-To: <4f5dbc00-e25b-f6ff-8585-31fc50f48a21@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220609_043705_326963_60AD6826 X-CRM114-Status: GOOD ( 16.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gMjAyMi0wNi0wOSAxMTozNSwgU3Jpbml2YXNhcmFvIFBhdGhpcGF0aSB3cm90ZToKPiBPbiBv dXIgUXVhbGNvbW0gcGxhdGZvcm1zLCBUaGUgWCBiaXQgaXMgZ2V0dGluZyBzZXQgYnkgZmlybXdh cmUgYXQgZWFybHkgCj4gYm9vdHVwIGZvciBRdWFsY29tbSB1c2UgY2FzZXMKPiBhbmQgbm9uLXNl Y3VyZSB3b3JsZCBpcyByZXNldHRpbmcgaXQsIHRoYXQgY2F1c2luZyBpc3N1ZS4KCkkgdGhpbmsg eW91J3JlIGdvaW5nIHRvIGhhdmUgdG8gY2xhcmlmeSB3aGF0IGV4YWN0bHkgdGhpcyAiaXNzdWUi IGlzIGlmIAp3ZSdyZSBldmVyIGdvaW5nIHRvIG1ha2Ugc2Vuc2Ugb2YgaXQuLi4KCkkgY2FuJ3Qg aW1hZ2luZSB0aGF0IGV4cG9ydCBmcm9tIGEgZGlzYWJsZWQgUE1VIHdvdWxkIG1hdHRlciBtdWNo LCBzbyBteSAKYmVzdCBndWVzcyBpcyB0aGF0IEVMMiBmaXJtd2FyZSBoYXMgcmVzZXJ2ZWQgc29t ZSBjb3VudGVycyB2aWEgCk1EQ1JfRUwyLkhQTU4gd2hpY2ggaXQncyB1c2luZyB0byBtb25pdG9y IHRoZSBOb24tU2VjdXJlIGJvb3Q7IGlmIHRoYXQgCmFsc28gZGVwZW5kcyBvbiBQTUNSLlggcmVt YWluaW5nIHNldCwgdGhlbiBhcyBmYXIgYXMgSSBjYW4gc2VlIGl0J3MgCnJlYWxseSB0aGUgZmly bXdhcmUncyBvd24gc3R1cGlkIGZhdWx0IGZvciBub3QgdXNpbmcgTURDUl9FTDIuVFBNQ1IgdG8g CnByZXZlbnQgTGludXggZnJvbSBtZXNzaW5nIHdpdGggaXRzIGNvbmZpZ3VyYXRpb24uIE9yIG1h eWJlIHNvbWV0aGluZyBpbiAKdGhlIFNlY3VyZSB3b3JsZCBpcyB0cnlpbmcgdG8gdXNlIHRoZSBQ TVUgaW5kZXBlbmRlbnRseSBhbmQgaXQncyBhbiBFTDMgCmJ1ZyB3aGVyZSBQTUNSX0VMMCBpc24n dCBiZWluZyBjb250ZXh0LXN3aXRjaGVkIHByb3Blcmx5PwoKUm9iaW4uCgo+IE9uIDYvOS8yMDIy IDM6MzIgUE0sIFdpbGwgRGVhY29uIHdyb3RlOgo+PiBPbiBNb24sIE1heSAyMywgMjAyMiBhdCAw NToxOTozNFBNICswNTMwLCBTcmluaXZhc2FyYW8gUGF0aGlwYXRpIHdyb3RlOgo+Pj4gVGhlIFBN VSBleHBvcnQgYml0IChQTUNSX0VMMC5YKSBpcyBnZXR0aW5nIHJlc2V0IGR1cmluZyBwbXUgcmVz ZXQsCj4+PiBNYWtlIGlzIGNvbmZpZ3VyYWJsZSB1c2luZyBzeXNjdGxzIHRvIGVuYWJsZS9kaXNh YmxlIGF0IHJ1bnRpbWUuCj4+PiBJdCBjYW4gYWxzbyBiZSBlbmFibGVkIGF0IGVhcmx5IGJvb3R1 cCB3aXRoIGtlcm5lbCBhcmd1bWVudHMuCj4+Pgo+Pj4gU2lnbmVkLW9mZi1ieTogU3Jpbml2YXNh cmFvIFBhdGhpcGF0aSA8cXVpY19jX3NwYXRoaUBxdWljaW5jLmNvbT4KPj4+IC0tLQo+Pj4gQ2hh bmdlcyBzaW5jZSBWNDoKPj4+IMKgwqDCoMKgLSBSZWdpc3RlcmluZyBzeXNjdGxzIGR5bmFtaWNh bGx5IGZvciBvbmx5IGFybTY0IGFzIHN1Z2dlc3RlZCBieSAKPj4+IFdpbGwKPj4+IMKgwqDCoMKg LSBOb3QgcmVtb3ZlZCB0aGUgY29kZSB0byBjb25maWd1cmUgd2l0aCBrZXJuZWwgcGFyYW1ldGVy cwo+Pj4gwqDCoMKgwqDCoCBhcyB0aGUgc3lzY3RsJ3Mga2VybmVsIHBhcmFtZXRlcihzeXNjdGwu a2VybmVsLmV4cG9ydF9wbXVfZXZlbnRzKQo+Pj4gwqDCoMKgwqDCoCBpcyBub3Qgd29ya2luZyBh dCBlYXJseSBib290dXAuIHBtdV9yZXNldCgpIGdldHRpbmcgY2FsbGVkIGJlZm9yZQo+Pj4gwqDC oMKgwqDCoCBzeXNjdGwncyBrZXJuZWwgcGFyYW1ldGVyIGlzIHNldC4KPj4gV2h5IGRvIHlvdSBu ZWVkIHRoaXMgZHVyaW5nIGVhcmx5IGJvb3R1cD8gUGVyZiB3b24ndCBwcm9ncmFtIGFueSBldmVu dHMKPj4gdW50aWwgbXVjaCBsYXRlciBhbmQgaWYgc29tZWJvZHkgZWxzZSBpcyBjb25maWd1cmlu ZyB0aGUgUE1VIGJlZm9yZQo+PiBlbnRlcmluZyBMaW51eCB0aGVuIHRoZXkgY2FuIGFsc28gc2V0 IHRoYXQgWCBiaXQgaW4gdGhlIFBNQ1IuCj4+Cj4+IFdpbGwKPiAKPiBfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IGxpbnV4LWFybS1rZXJuZWwgbWFpbGlu ZyBsaXN0Cj4gbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCj4gaHR0cDovL2xp c3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVsCgpfX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51eC1hcm0ta2Vy bmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0 cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51eC1hcm0ta2VybmVs Cg==