From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD8F0C43470 for ; Wed, 7 Apr 2021 13:21:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BD9061394 for ; Wed, 7 Apr 2021 13:21:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237725AbhDGNVk (ORCPT ); Wed, 7 Apr 2021 09:21:40 -0400 Received: from mail.kernel.org ([198.145.29.99]:58292 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232568AbhDGNVf (ORCPT ); Wed, 7 Apr 2021 09:21:35 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id B710D61394; Wed, 7 Apr 2021 13:21:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1617801684; bh=XkjqB4k89kzH7Hz/pSTicftDKmq2vGrJuSRaabOHNLA=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=YIGYQrRhls1qWBhJpF2h801AJGrYJ9BzgoePqfEB17MimVZ+cGfm/rpA/wj7gj5aE DKdp36LhqKaixMTAIug0EbSLJYOyNb+yoEPLLxFe8LWrc/vsIApgl+tAwWVO9KijJf lQ7rMnRyvbFFtWje539jDvfKSZ+n2YuXORTnI2rfPmcfJFVK8KPMiWR0Geh222sN6b Z6k56d8/eCdAlRV3/p4T/CNQTegEb8worziH/rZ4iQiRcb/StBRjUfKd8bsn7mRKkH vhSbX3MeRSquVdrdKkPcOCSUM3n1arkrRcgLyOEbqcg2Ru9XT0khPuix5q6WjLzbu4 sta+Imr3Klttw== Subject: Re: [PATCH 0/2] fdt: translate address if #size-cells = <0> To: Rob Herring , Dario Binacchi , Tony Lindgren Cc: "linux-kernel@vger.kernel.org" , Bin Meng , Frank Rowand , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-clk , linux-omap References: <20210402192054.7934-1-dariobin@libero.it> <1727466283.11523.1617746554330@mail1.libero.it> <1044574275.383115.1617779265390@mail1.libero.it> From: Tero Kristo Message-ID: Date: Wed, 7 Apr 2021 16:21:20 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/04/2021 15:52, Rob Herring wrote: > On Wed, Apr 7, 2021 at 2:07 AM Dario Binacchi wrote: >> >> >>> Il 07/04/2021 03:16 Rob Herring ha scritto: >>> >>> >>> On Tue, Apr 6, 2021 at 5:02 PM Dario Binacchi wrote: >>>> >>>> >>>>> Il 06/04/2021 16:06 Rob Herring ha scritto: >>>>> >>>>> >>>>> On Fri, Apr 2, 2021 at 2:21 PM Dario Binacchi wrote: >>>>>> >>>>>> >>>>>> The series comes from my commit in U-boot >>>>>> d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") >>>>>> and from the subsequent exchange of emails at the end of which I was >>>>>> suggested to send the patch to the linux kernel >>>>>> (https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/). >>>>> >>>>> It's 'ranges' that determines translatable which is missing from the >>>>> DT. This should have not had a 0 size either though maybe we could >>>>> support that. >>>> >>>> I have replied to the email you sent to the u-boot mailing list >>>> >>>>> >>>>> Does the DT have to be updated anyways for your spread spectrum support? >>>> >>>> The spread spectrum support patch does not need this patch to work. They belong >>>> to two different series. >>> >>> That's not what I asked. Is the spread spectrum support forcing a DT >>> update for users? >> >> Yes, the deltam and modfreq registers must be added to the DPLL clocks. > > That's a shame given this dts has been mostly untouched since 2013. > I think technically it would be possible to map these registers within the driver also, seeing there are like a handful of the DPLLs for both am3/am4 which are impacted. Just add a new compatible or something, or alternatively parse the register addresses and populate the deltam/modfreq registers based on that. >>> If the DT has to be changed anyways (not really >>> great policy), then you could fix this in the DT at the same time. >> >> I could put the fix to the device tree in that series, although I wouldn't >> create a single patch to fix and add the SSC registers. First the size-cells = <0> >> fix patch and then the SSC patch. >> Do you agree? > > By at the same time, I really just meant within 1 release. > > But I'd like to hear TI maintainers' thoughts on this. I did post a comment on patch #1 questioning the approach from TI clock driver perspective, imho I can't see why these two patches would be needed right now. -Tero