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[88.21.103.182]) by smtp.gmail.com with ESMTPSA id y6sm10931170wrr.19.2019.11.25.06.37.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 25 Nov 2019 06:37:53 -0800 (PST) Subject: Re: [PATCH] mos6522: update counters when timer interrupts are off To: Laurent Vivier , qemu-devel@nongnu.org References: <20191125141414.5015-1-laurent@vivier.eu> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Mon, 25 Nov 2019 15:37:52 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20191125141414.5015-1-laurent@vivier.eu> Content-Language: en-US X-MC-Unique: 0zmDW8fLPHCOyiCbkUIekg-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=WINDOWS-1252; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Mark Cave-Ayland , Andrew Randrianasulu , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/25/19 3:14 PM, Laurent Vivier wrote: > Even if the interrupts are off, counters must be updated because > they are running anyway and kernel can try to read them > (it's the case with g3beige kernel). >=20 > Reported-by: Andrew Randrianasulu > Signed-off-by: Laurent Vivier > --- > hw/misc/mos6522.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) >=20 > diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c > index aa3bfe1afd..cecf0be59e 100644 > --- a/hw/misc/mos6522.c > +++ b/hw/misc/mos6522.c > @@ -113,6 +113,10 @@ static int64_t get_next_irq_time(MOS6522State *s, MO= S6522Timer *ti, > int64_t d, next_time; > unsigned int counter; > =20 Can you add a comment here such "Clock disabled. This is the longest=20 time before expiration" or better? Reviewed-by: Philippe Mathieu-Daud=E9 > + if (ti->frequency =3D=3D 0) { > + return INT64_MAX; > + } > + > /* current counter value */ > d =3D muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - ti->load_tim= e, > ti->frequency, NANOSECONDS_PER_SECOND); > @@ -149,10 +153,10 @@ static void mos6522_timer1_update(MOS6522State *s, = MOS6522Timer *ti, > if (!ti->timer) { > return; > } > + ti->next_irq_time =3D get_next_irq_time(s, ti, current_time); > if ((s->ier & T1_INT) =3D=3D 0 || (s->acr & T1MODE) !=3D T1MODE_CON= T) { > timer_del(ti->timer); > } else { > - ti->next_irq_time =3D get_next_irq_time(s, ti, current_time); > timer_mod(ti->timer, ti->next_irq_time); > } > } > @@ -163,10 +167,10 @@ static void mos6522_timer2_update(MOS6522State *s, = MOS6522Timer *ti, > if (!ti->timer) { > return; > } > + ti->next_irq_time =3D get_next_irq_time(s, ti, current_time); > if ((s->ier & T2_INT) =3D=3D 0) { > timer_del(ti->timer); > } else { > - ti->next_irq_time =3D get_next_irq_time(s, ti, current_time); > timer_mod(ti->timer, ti->next_irq_time); > } > } >=20