All of lore.kernel.org
 help / color / mirror / Atom feed
From: Zhou Yanjie <zhouyanjie@wanyeetech.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: linus.walleij@linaro.org, robh+dt@kernel.org,
	linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	hns@goldelico.com, paul@boddie.org.uk, andy.shevchenko@gmail.com,
	dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com,
	sernia.zhou@foxmail.com
Subject: Re: [PATCH v3 02/10] pinctrl: Ingenic: Add support for read the pin configuration of X1830.
Date: Thu, 25 Mar 2021 15:38:28 +0800	[thread overview]
Message-ID: <a278847d-da2d-eeec-98d0-4bbca0b90cee@wanyeetech.com> (raw)
In-Reply-To: <YXTDQQ.OYIQVLSUOAPB3@crapouillou.net>

Hi,

On 2021/3/23 上午1:58, Paul Cercueil wrote:
>
>
> Le mer. 17 mars 2021 à 17:57, 周琰杰 (Zhou Yanjie) 
> <zhouyanjie@wanyeetech.com> a écrit :
>> Add X1830 support in "ingenic_pinconf_get()", so that it can read the
>> configuration of X1830 SoC correctly.
>>
>> Fixes: d7da2a1e4e08 ("pinctrl: Ingenic: Add pinctrl driver for X1830.")
>>
>> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
>> ---
>>
>> Notes:
>>     v2:
>>     New patch.
>>
>>     v2->v3:
>>     1.Add fixes tag.
>>     2.Adjust the code, simplify the ingenic_pinconf_get() function.
>>
>>  drivers/pinctrl/pinctrl-ingenic.c | 38 
>> ++++++++++++++++++++++++++++++--------
>>  1 file changed, 30 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-ingenic.c 
>> b/drivers/pinctrl/pinctrl-ingenic.c
>> index 05dfa0a..1d43b98 100644
>> --- a/drivers/pinctrl/pinctrl-ingenic.c
>> +++ b/drivers/pinctrl/pinctrl-ingenic.c
>> @@ -2109,26 +2109,48 @@ static int ingenic_pinconf_get(struct 
>> pinctrl_dev *pctldev,
>>      enum pin_config_param param = pinconf_to_config_param(*config);
>>      unsigned int idx = pin % PINS_PER_GPIO_CHIP;
>>      unsigned int offt = pin / PINS_PER_GPIO_CHIP;
>> -    bool pull;
>> +    unsigned int bias;
>> +    bool pull, pullup, pulldown;
>>
>> -    if (jzpc->info->version >= ID_JZ4770)
>> -        pull = !ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PEN);
>> -    else
>> -        pull = !ingenic_get_pin_config(jzpc, pin, 
>> JZ4740_GPIO_PULL_DIS);
>> +    if (jzpc->info->version >= ID_X1830) {
>> +        unsigned int half = PINS_PER_GPIO_CHIP / 2;
>> +        unsigned int idxh = pin % half * 2;
>
> I had to look up operator precedence in C, '*' and '%' have the same 
> priority so this reads left-to-right.
>
> I'd suggest adding parentheses around the '%' to make it more obvious.
>

Sure.


> With that:
>
> Reviewed-by: Paul Cercueil <paul@crapouillou.net>
>
> Cheers,
> -Paul
>
>> +
>> +        if (idx < half)
>> +            regmap_read(jzpc->map, offt * jzpc->info->reg_offset +
>> +                    X1830_GPIO_PEL, &bias);
>> +        else
>> +            regmap_read(jzpc->map, offt * jzpc->info->reg_offset +
>> +                    X1830_GPIO_PEH, &bias);
>> +
>> +        bias = (bias >> idxh) & (GPIO_PULL_UP | GPIO_PULL_DOWN);
>> +
>> +        pullup = (bias == GPIO_PULL_UP) && 
>> (jzpc->info->pull_ups[offt] & BIT(idx));
>> +        pulldown = (bias == GPIO_PULL_DOWN) && 
>> (jzpc->info->pull_downs[offt] & BIT(idx));
>> +
>> +    } else {
>> +        if (jzpc->info->version >= ID_JZ4770)
>> +            pull = !ingenic_get_pin_config(jzpc, pin, JZ4770_GPIO_PEN);
>> +        else
>> +            pull = !ingenic_get_pin_config(jzpc, pin, 
>> JZ4740_GPIO_PULL_DIS);
>> +
>> +        pullup = pull && (jzpc->info->pull_ups[offt] & BIT(idx));
>> +        pulldown = pull && (jzpc->info->pull_downs[offt] & BIT(idx));
>> +    }
>>
>>      switch (param) {
>>      case PIN_CONFIG_BIAS_DISABLE:
>> -        if (pull)
>> +        if (pullup || pulldown)
>>              return -EINVAL;
>>          break;
>>
>>      case PIN_CONFIG_BIAS_PULL_UP:
>> -        if (!pull || !(jzpc->info->pull_ups[offt] & BIT(idx)))
>> +        if (!pullup)
>>              return -EINVAL;
>>          break;
>>
>>      case PIN_CONFIG_BIAS_PULL_DOWN:
>> -        if (!pull || !(jzpc->info->pull_downs[offt] & BIT(idx)))
>> +        if (!pulldown)
>>              return -EINVAL;
>>          break;
>>
>> -- 
>> 2.7.4
>>
>

  reply	other threads:[~2021-03-25  7:39 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-17  9:57 [PATCH v3 00/10] Fix bugs and add support for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-17  9:57 ` [PATCH v3 01/10] pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group 周琰杰 (Zhou Yanjie)
2021-03-22 17:53   ` Paul Cercueil
2021-03-25  7:37     ` Zhou Yanjie
2021-03-17  9:57 ` [PATCH v3 02/10] pinctrl: Ingenic: Add support for read the pin configuration of X1830 周琰杰 (Zhou Yanjie)
2021-03-22 17:58   ` Paul Cercueil
2021-03-25  7:38     ` Zhou Yanjie [this message]
2021-03-17  9:57 ` [PATCH v3 03/10] pinctrl: Ingenic: Adjust the sequence of X1830 SSI pin groups 周琰杰 (Zhou Yanjie)
2021-03-17  9:57 ` [PATCH v3 04/10] pinctrl: Ingenic: Reformat the code 周琰杰 (Zhou Yanjie)
2021-03-17  9:57 ` [PATCH v3 05/10] dt-bindings: pinctrl: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-22 18:01   ` Paul Cercueil
2021-03-25  7:43     ` Zhou Yanjie
2021-03-26  0:18   ` Rob Herring
2021-03-17  9:58 ` [PATCH v3 06/10] pinctrl: Ingenic: Add pinctrl driver for JZ4730 周琰杰 (Zhou Yanjie)
2021-03-22 18:17   ` Paul Cercueil
2021-03-25  7:55     ` Zhou Yanjie
2021-03-17  9:58 ` [PATCH v3 07/10] pinctrl: Ingenic: Add pinctrl driver for JZ4750 周琰杰 (Zhou Yanjie)
2021-03-22 18:20   ` Paul Cercueil
2021-03-25  7:55     ` Zhou Yanjie
2021-03-17  9:58 ` [PATCH v3 08/10] pinctrl: Ingenic: Add pinctrl driver for JZ4755 周琰杰 (Zhou Yanjie)
2021-03-22 18:24   ` Paul Cercueil
2021-03-25  8:38     ` Zhou Yanjie
2021-03-27 18:30       ` Paul Cercueil
2021-03-29  9:15         ` Zhou Yanjie
2021-03-17  9:58 ` [PATCH v3 09/10] pinctrl: Ingenic: Add pinctrl driver for JZ4775 周琰杰 (Zhou Yanjie)
2021-03-22 18:25   ` Paul Cercueil
2021-03-25  8:39     ` Zhou Yanjie
2021-03-17  9:58 ` [PATCH v3 10/10] pinctrl: Ingenic: Add pinctrl driver for X2000 周琰杰 (Zhou Yanjie)
2021-03-22 18:39   ` Paul Cercueil
     [not found]     ` <fc1019bb-86c7-072a-b60c-3511c38858d2@wanyeetech.com>
2021-03-27 19:58       ` Paul Cercueil
2021-03-29  9:18         ` Zhou Yanjie

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a278847d-da2d-eeec-98d0-4bbca0b90cee@wanyeetech.com \
    --to=zhouyanjie@wanyeetech.com \
    --cc=andy.shevchenko@gmail.com \
    --cc=aric.pzqi@ingenic.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dongsheng.qiu@ingenic.com \
    --cc=hns@goldelico.com \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@vger.kernel.org \
    --cc=paul@boddie.org.uk \
    --cc=paul@crapouillou.net \
    --cc=robh+dt@kernel.org \
    --cc=sernia.zhou@foxmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.