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Thu, 5 May 2022 07:38:20 +0000 (UTC) Received: from starship (unknown [10.40.192.26]) by smtp.corp.redhat.com (Postfix) with ESMTP id 39E1540CF8FE; Thu, 5 May 2022 07:38:18 +0000 (UTC) Message-ID: Subject: Re: [PATCH v3 03/14] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support From: Maxim Levitsky To: Suravee Suthikulpanit , linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: pbonzini@redhat.com, seanjc@google.com, joro@8bytes.org, jon.grimm@amd.com, wei.huang2@amd.com, terry.bowman@amd.com Date: Thu, 05 May 2022 10:38:17 +0300 In-Reply-To: <3af75c05-40e9-2371-b5a9-c702853a974e@amd.com> References: <20220504073128.12031-1-suravee.suthikulpanit@amd.com> <20220504073128.12031-4-suravee.suthikulpanit@amd.com> <3af75c05-40e9-2371-b5a9-c702853a974e@amd.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.36.5 (3.36.5-2.fc32) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.84 on 10.11.54.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2022-05-05 at 11:07 +0700, Suravee Suthikulpanit wrote: > Maxim, > > On 5/4/22 7:12 PM, Maxim Levitsky wrote: > > > diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c > > > index a8f514212b87..fc3ba6071482 100644 > > > --- a/arch/x86/kvm/svm/avic.c > > > +++ b/arch/x86/kvm/svm/avic.c > > > @@ -40,6 +40,15 @@ > > > #define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK) > > > #define AVIC_GATAG_TO_VCPUID(x) (x & AVIC_VCPU_ID_MASK) > > > > > > +enum avic_modes { > > > + AVIC_MODE_NONE = 0, > > > + AVIC_MODE_X1, > > > + AVIC_MODE_X2, > > > +}; > > > + > > > +static bool force_avic; > > > +module_param_unsafe(force_avic, bool, 0444); > > > + > > > /* Note: > > > * This hash table is used to map VM_ID to a struct kvm_svm, > > > * when handling AMD IOMMU GALOG notification to schedule in > > > @@ -50,6 +59,7 @@ static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS); > > > static u32 next_vm_id = 0; > > > static bool next_vm_id_wrapped = 0; > > > static DEFINE_SPINLOCK(svm_vm_data_hash_lock); > > > +static enum avic_modes avic_mode; > > > > > > /* > > > * This is a wrapper of struct amd_iommu_ir_data. > > > @@ -1077,3 +1087,33 @@ void avic_vcpu_unblocking(struct kvm_vcpu *vcpu) > > > > > > avic_vcpu_load(vcpu); > > > } > > > + > > > +/* > > > + * Note: > > > + * - The module param avic enable both xAPIC and x2APIC mode. > > > + * - Hypervisor can support both xAVIC and x2AVIC in the same guest. > > > + * - The mode can be switched at run-time. > > > + */ > > > +bool avic_hardware_setup(struct kvm_x86_ops *x86_ops) > > > +{ > > > + if (!npt_enabled) > > > + return false; > > > + > > > + if (boot_cpu_has(X86_FEATURE_AVIC)) { > > > + avic_mode = AVIC_MODE_X1; > > > + pr_info("AVIC enabled\n"); > > > + } else if (force_avic) { > > > + pr_warn("AVIC is not supported in CPUID but force enabled"); > > > + pr_warn("Your system might crash and burn"); > > I think in this case avic_mode should also be set to AVIC_MODE_X1 > > (Hopefully this won't be needed for systems that have x2avic enabled) > > You are right. My appology :( > > Actually, x2AVIC depends on both CPUID bits (i.e. X86_FEATURE_AVIC and X86_FEATURE_X2AVIC). > If the force_avic option is only applicable to only the X86_FEATURE_AVIC bit, we would > need to check for the following condition before enabling x2AVIC support in the driver: > > if ((X86_FEATURE_AVIC | avic_force) & X86_FEATURE_X2AVIC) > avic_mode = AVIC_MODE_X2 Let it be just for AVIC_MODE_X1, that is else if (force_avic) { pr_warn("AVIC is not supported in CPUID but force enabled"); pr_warn("Your system might crash and burn"); avic_mode = AVIC_MODE_X1; Best regards, Maxim Levitsky > > Regards, > Suravee > >