From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754452AbdDKJVc (ORCPT ); Tue, 11 Apr 2017 05:21:32 -0400 Received: from pegasos-out.vodafone.de ([80.84.1.38]:41231 "EHLO pegasos-out.vodafone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754227AbdDKJV0 (ORCPT ); Tue, 11 Apr 2017 05:21:26 -0400 X-Spam-Flag: NO X-Spam-Score: -0.045 Authentication-Results: rohrpostix1.prod.vfnet.de (amavisd-new); dkim=pass header.i=@vodafone.de X-DKIM: OpenDKIM Filter v2.6.8 pegasos-out.vodafone.de 62F25261ECA Subject: Re: [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors To: Andy Shevchenko References: <1489408896-25039-1-git-send-email-deathsimple@vodafone.de> <1489408896-25039-4-git-send-email-deathsimple@vodafone.de> Cc: helgaas@kernel.org, "linux-pci@vger.kernel.org" , dri-devel@lists.freedesktop.org, Platform Driver , amd-gfx@lists.freedesktop.org, "linux-kernel@vger.kernel.org" From: =?UTF-8?Q?Christian_K=c3=b6nig?= Message-ID: Date: Tue, 11 Apr 2017 11:21:19 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am 13.03.2017 um 17:49 schrieb Andy Shevchenko: > On Mon, Mar 13, 2017 at 2:41 PM, Christian König > wrote: > >> Most BIOS don't enable this because of compatibility reasons. >> >> Manually enable a 64bit BAR of 64GB size so that we have >> enough room for PCI devices. >> +static void pci_amd_enable_64bit_bar(struct pci_dev *dev) >> +{ >> + const uint64_t size = 64ULL * 1024 * 1024 * 1024; > Perhaps extend and use SZ_64G here? > > It would be nice to do, since some of the drivers already are using > sizes like 4GB and alike. Actually using 64GB here was just for testing and to get some initial feedback. I think we want to use all the remaining address space for PCIe, but for this we would need a new function in the resource management I think. Going to take a deeper look when I'm sure we actually want this. >> + if (i == 8) >> + return; >> + >> + res = kzalloc(sizeof(*res), GFP_KERNEL); >> + res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_MEM_64 | >> + IORESOURCE_WINDOW; >> + res->name = dev->bus->name; >> + r = allocate_resource(&iomem_resource, res, size, 0x100000000, >> + 0xfd00000000, size, NULL, NULL); >> + if (r) { >> + kfree(res); >> + return; >> + } >> + >> + base = ((res->start >> 8) & 0xffffff00) | 0x3; >> + limit = ((res->end + 1) >> 8) & 0xffffff00; >> + high = ((res->start >> 40) & 0xff) | >> + ((((res->end + 1) >> 40) & 0xff) << 16); > Perhaps some of constants can be replaced by defines (I think some of > them are already defined in ioport.h or somewhere else). Yeah, good idea. But that stuff is purely AMD CPU specific, so won't belong into ioport.h or similar common code. Does anybody have any idea where I could put this? Regards, Christian. From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?Q?Christian_K=c3=b6nig?= Subject: Re: [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors Date: Tue, 11 Apr 2017 11:21:19 +0200 Message-ID: References: <1489408896-25039-1-git-send-email-deathsimple@vodafone.de> <1489408896-25039-4-git-send-email-deathsimple@vodafone.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: Andy Shevchenko Cc: "linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Platform Driver , helgaas-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org List-Id: platform-driver-x86.vger.kernel.org QW0gMTMuMDMuMjAxNyB1bSAxNzo0OSBzY2hyaWViIEFuZHkgU2hldmNoZW5rbzoKPiBPbiBNb24s IE1hciAxMywgMjAxNyBhdCAyOjQxIFBNLCBDaHJpc3RpYW4gS8O2bmlnCj4gPGRlYXRoc2ltcGxl QHZvZGFmb25lLmRlPiB3cm90ZToKPgo+PiBNb3N0IEJJT1MgZG9uJ3QgZW5hYmxlIHRoaXMgYmVj YXVzZSBvZiBjb21wYXRpYmlsaXR5IHJlYXNvbnMuCj4+Cj4+IE1hbnVhbGx5IGVuYWJsZSBhIDY0 Yml0IEJBUiBvZiA2NEdCIHNpemUgc28gdGhhdCB3ZSBoYXZlCj4+IGVub3VnaCByb29tIGZvciBQ Q0kgZGV2aWNlcy4KPj4gK3N0YXRpYyB2b2lkIHBjaV9hbWRfZW5hYmxlXzY0Yml0X2JhcihzdHJ1 Y3QgcGNpX2RldiAqZGV2KQo+PiArewo+PiArICAgICAgIGNvbnN0IHVpbnQ2NF90IHNpemUgPSA2 NFVMTCAqIDEwMjQgKiAxMDI0ICogMTAyNDsKPiBQZXJoYXBzIGV4dGVuZCA8bGludXgvc2l6ZXMu aD4gYW5kIHVzZSBTWl82NEcgaGVyZT8KPgo+IEl0IHdvdWxkIGJlIG5pY2UgdG8gZG8sIHNpbmNl IHNvbWUgb2YgdGhlIGRyaXZlcnMgYWxyZWFkeSBhcmUgdXNpbmcKPiBzaXplcyBsaWtlIDRHQiBh bmQgYWxpa2UuCgpBY3R1YWxseSB1c2luZyA2NEdCIGhlcmUgd2FzIGp1c3QgZm9yIHRlc3Rpbmcg YW5kIHRvIGdldCBzb21lIGluaXRpYWwgCmZlZWRiYWNrLgoKSSB0aGluayB3ZSB3YW50IHRvIHVz ZSBhbGwgdGhlIHJlbWFpbmluZyBhZGRyZXNzIHNwYWNlIGZvciBQQ0llLCBidXQgZm9yIAp0aGlz IHdlIHdvdWxkIG5lZWQgYSBuZXcgZnVuY3Rpb24gaW4gdGhlIHJlc291cmNlIG1hbmFnZW1lbnQg SSB0aGluay4KCkdvaW5nIHRvIHRha2UgYSBkZWVwZXIgbG9vayB3aGVuIEknbSBzdXJlIHdlIGFj dHVhbGx5IHdhbnQgdGhpcy4KCj4+ICsgICAgICAgaWYgKGkgPT0gOCkKPj4gKyAgICAgICAgICAg ICAgIHJldHVybjsKPj4gKwo+PiArICAgICAgIHJlcyA9IGt6YWxsb2Moc2l6ZW9mKCpyZXMpLCBH RlBfS0VSTkVMKTsKPj4gKyAgICAgICByZXMtPmZsYWdzID0gSU9SRVNPVVJDRV9NRU0gfCBJT1JF U09VUkNFX1BSRUZFVENIIHwgSU9SRVNPVVJDRV9NRU1fNjQgfAo+PiArICAgICAgICAgICAgICAg SU9SRVNPVVJDRV9XSU5ET1c7Cj4+ICsgICAgICAgcmVzLT5uYW1lID0gZGV2LT5idXMtPm5hbWU7 Cj4+ICsgICAgICAgciA9IGFsbG9jYXRlX3Jlc291cmNlKCZpb21lbV9yZXNvdXJjZSwgcmVzLCBz aXplLCAweDEwMDAwMDAwMCwKPj4gKyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgMHhmZDAw MDAwMDAwLCBzaXplLCBOVUxMLCBOVUxMKTsKPj4gKyAgICAgICBpZiAocikgewo+PiArICAgICAg ICAgICAgICAga2ZyZWUocmVzKTsKPj4gKyAgICAgICAgICAgICAgIHJldHVybjsKPj4gKyAgICAg ICB9Cj4+ICsKPj4gKyAgICAgICBiYXNlID0gKChyZXMtPnN0YXJ0ID4+IDgpICYgMHhmZmZmZmYw MCkgfCAweDM7Cj4+ICsgICAgICAgbGltaXQgPSAoKHJlcy0+ZW5kICsgMSkgPj4gOCkgJiAweGZm ZmZmZjAwOwo+PiArICAgICAgIGhpZ2ggPSAoKHJlcy0+c3RhcnQgPj4gNDApICYgMHhmZikgfAo+ PiArICAgICAgICAgICAgICAgKCgoKHJlcy0+ZW5kICsgMSkgPj4gNDApICYgMHhmZikgPDwgMTYp Owo+IFBlcmhhcHMgc29tZSBvZiBjb25zdGFudHMgY2FuIGJlIHJlcGxhY2VkIGJ5IGRlZmluZXMg KEkgdGhpbmsgc29tZSBvZgo+IHRoZW0gYXJlIGFscmVhZHkgZGVmaW5lZCBpbiBpb3BvcnQuaCBv ciBzb21ld2hlcmUgZWxzZSkuCgpZZWFoLCBnb29kIGlkZWEuIEJ1dCB0aGF0IHN0dWZmIGlzIHB1 cmVseSBBTUQgQ1BVIHNwZWNpZmljLCBzbyB3b24ndCAKYmVsb25nIGludG8gaW9wb3J0Lmggb3Ig c2ltaWxhciBjb21tb24gY29kZS4KCkRvZXMgYW55Ym9keSBoYXZlIGFueSBpZGVhIHdoZXJlIEkg Y291bGQgcHV0IHRoaXM/CgpSZWdhcmRzLAoKQ2hyaXN0aWFuLgoKX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX18KYW1kLWdmeCBtYWlsaW5nIGxpc3QKYW1kLWdm eEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFp bG1hbi9saXN0aW5mby9hbWQtZ2Z4Cg==