From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Sergei Shtylyov Subject: [PATCH] arm64: dts: renesas: r8a779{7|8}0: add TMU support References: Message-ID: Date: Fri, 7 Sep 2018 23:14:40 +0300 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-MW Content-Transfer-Encoding: 7bit To: Simon Horman , Rob Herring , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: Magnus Damm , Mark Rutland List-ID: Describe TMUs in the R8A779{7|8}0 device trees. Based on the original (and large) patches by Vladimir Barinov. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov --- This patch is against the 'renesas-devel-20180906-v4.19-rc2' branch of Simon Horman's 'renesas.git' repo plus the R8A779{7|8}0 DT patch adding the CMT support). The R8A779{7|8}0 TMU DT binding update have been just posted... arch/arm64/boot/dts/renesas/r8a77970.dtsi | 66 ++++++++++++++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a77980.dtsi | 66 ++++++++++++++++++++++++++++++ 2 files changed, 132 insertions(+) Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -316,6 +316,72 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@e6fc0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe6fc0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 124>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 124>; + status = "disabled"; + }; + + tmu2: timer@e6fd0000 { + compatible = "renesas,tmu-r8a77970", "renesas,tmu"; + reg = <0 0xe6fd0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 123>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 123>; + status = "disabled"; + }; + + tmu3: timer@e6fe0000 { + compatible = "renesas,tmu-r8a7797", "renesas,tmu"; + reg = <0 0xe6fe0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu4: timer@ffc00000 { + compatible = "renesas,tmu-r8a7797", "renesas,tmu"; + reg = <0 0xffc00000 0 0x30>; + interrupts = , + , + , + ; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + i2c0: i2c@e6500000 { compatible = "renesas,i2c-r8a77970", "renesas,rcar-gen3-i2c"; Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -346,6 +346,72 @@ resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a77980", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@e6fc0000 { + compatible = "renesas,tmu-r8a77980", "renesas,tmu"; + reg = <0 0xe6fc0000 0 0x30>; + interrupts = , + , + , + ; + clocks = <&cpg CPG_MOD 124>; + clock-names = "fck"; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 124>; + status = "disabled"; + }; + + tmu2: timer@e6fd0000 { + compatible = "renesas,tmu-r8a77980", "renesas,tmu"; + reg = <0 0xe6fd0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 123>; + clock-names = "fck"; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 123>; + status = "disabled"; + }; + + tmu3: timer@e6fe0000 { + compatible = "renesas,tmu-r8a77980", "renesas,tmu"; + reg = <0 0xe6fe0000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu4: timer@ffc00000 { + compatible = "renesas,tmu-r8a77980", "renesas,tmu"; + reg = <0 0xffc00000 0 0x30>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + i2c0: i2c@e6500000 { compatible = "renesas,i2c-r8a77980", "renesas,rcar-gen3-i2c";