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[83.52.55.21]) by smtp.gmail.com with ESMTPSA id f1sm2689415wri.43.2021.09.11.15.31.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 11 Sep 2021 15:31:34 -0700 (PDT) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Subject: Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work() From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= To: Richard Henderson , David Gibson , =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Greg Kurz Cc: Peter Maydell , Chris Wulff , kvm@vger.kernel.org, David Hildenbrand , Bin Meng , Mark Cave-Ayland , qemu-devel@nongnu.org, Jiaxun Yang , Max Filippov , Taylor Simpson , haxm-team@intel.com, Colin Xu , Sunil Muthuswamy , Marek Vasut , Stefano Stabellini , Yoshinori Sato , Paul Durrant , Kamil Rytarowski , Reinoud Zandijk , Claudio Fontana , Marcel Apfelbaum , Anthony Perard , xen-devel@lists.xenproject.org, Artyom Tarasenko , Laurent Vivier , Thomas Huth , Eduardo Habkost , Cameron Esfahani , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Paolo Bonzini , qemu-ppc@nongnu.org, Stafford Horne , qemu-riscv@nongnu.org, Bastian Koppelmann , Cornelia Huck , Roman Bolshakov , Laurent Vivier , Palmer Dabbelt , Wenchao Wang , Alistair Francis , Aleksandar Rikalo , Aurelien Jarno References: <20210902161543.417092-1-f4bug@amsat.org> <20210902161543.417092-22-f4bug@amsat.org> Message-ID: Date: Sun, 12 Sep 2021 00:31:31 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 9/3/21 11:11 PM, Philippe Mathieu-Daudé wrote: > On 9/3/21 10:42 PM, Richard Henderson wrote: >> On 9/3/21 2:50 AM, David Gibson wrote: >>> On Thu, Sep 02, 2021 at 06:15:34PM +0200, Philippe Mathieu-Daudé wrote: >>>> Each POWER cpu has its own has_work() implementation. Instead of >>>> overloading CPUClass on each PowerPCCPUClass init, register the >>>> generic ppc_cpu_has_work() handler, and have it call the POWER >>>> specific has_work(). >>> >>> I don't quite see the rationale for introducing a second layer of >>> indirection here.  What's wrong with switching the base has_work for >>> each cpu variant? >> >> We're moving the hook from CPUState to TCGCPUOps. >> Phil was trying to avoid creating N versions of >> >> static const struct TCGCPUOps ppc_tcg_ops = { >>     ... >> }; > > Ah yes this is the reason! Too many context switching so > I forgot about it. > >> A plausible alternative is to remove the const from this struct and >> modify it, just as we do for CPUState, on the assumption that we cannot >> mix and match ppc cpu types in any one machine. > > I thought about this case and remembered how it works on the ARM arch, > i.e. ZynqMP machine uses both Cortex-R5F and Cortex-A53. Even if no > similar PPC machine exists, IMHO we should try to generally allow to > possibility to experiment machine with different CPUs. Restricting it > on PPC goes the other way around. Thoughts? I'm running out of ideas to do avoid the indirection and multiple copies of TCGCPUOps. I'm not giving up, I suppose I'm simply not seeing it... David, any suggestions? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21C6FC433EF for ; Sat, 11 Sep 2021 22:33:32 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9ABD761027 for ; Sat, 11 Sep 2021 22:33:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 9ABD761027 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:32916 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mPBYw-0004D5-O3 for qemu-devel@archiver.kernel.org; Sat, 11 Sep 2021 18:33:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42902) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mPBXD-0002Of-6e; Sat, 11 Sep 2021 18:31:43 -0400 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]:45872) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mPBX9-0007PR-21; Sat, 11 Sep 2021 18:31:42 -0400 Received: by mail-wr1-x434.google.com with SMTP id d21so584966wra.12; Sat, 11 Sep 2021 15:31:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:subject:from:to:cc:references:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=XT2R7gKOwJquO7Q7cTHp+dmuaUe/Pu9W6ODttpllYz4=; b=b2bJ2Px663Jyjjkb4rwi1aTGvhuL68k7L2E3bYKODogP2gfA7vnE94/Auh+BX5f7F7 IxAnhUJZds4iYuJFkhOWmjPofJSvqsbY6WrkuCnbGGERgS7cEZpOTBt8aGtsMphs3VdL OX7vLhAYsbzT1EtpdVSRJ+DsVngeojmqXv8cuod8qKxMs0MSJEIaY+EzM+woIw6H4XEE lBGZfspthJ6BKFB8kK12vVadMcMIRo8lSQ57dn2P6T17nDCFuA+vhJwv2Mz6IUmkb0Tm QO8w2SRNdXbcd+NxpGfvtUBJsh+DJxXGgeo6OTlxBvI3gYTGhzuF6QLiOvSlqJK2+8mh HKEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:subject:from:to:cc:references:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=XT2R7gKOwJquO7Q7cTHp+dmuaUe/Pu9W6ODttpllYz4=; b=I24j3Eo9ACkD9N2mSHal4DSYa8+wi0ow8Zhtk69TEj086l9PfFibuhtR8EWW1nWci7 0cmEHIB2RgbsnGRj7/ZvxHzWGccG1Taw7xlf4gNgWenqWlpewiH7N2RtIpkLfjzWbxk8 T/qgMUWY4E82FPALRFYm84womhaNR9eKdscdlChXHl37/8zSsKFtT+hE6mghLbMsu4Mo CFnA2Fm7cB9fgae0X+/M4ltFZyBcJrMGDTIObcvYI61yHDcC0FVmgfsjHR5hFdrmDaIx B34WgpFi6Ce+yNOlb621y0EwIdsDVCAgh6X/IkCGkl5YKZYj+MP65MJFM7g8ucRI2q7w KHWA== X-Gm-Message-State: AOAM530fK6S6yskBU/LyKMW//zzxkE0TXQ98KYckXAWQ27bfZ3r1IOTg evbCWZsX2UtapcKlbG9/sAo= X-Google-Smtp-Source: ABdhPJwCU/eok/l7PQWSv0uFfyt3OLV/3TdzjV/d32F7wAyFIbNaXVYENwr0FBRMDcjW3s4ZBOaI7w== X-Received: by 2002:adf:916f:: with SMTP id j102mr4796451wrj.422.1631399495458; Sat, 11 Sep 2021 15:31:35 -0700 (PDT) Received: from [192.168.1.36] (21.red-83-52-55.dynamicip.rima-tde.net. [83.52.55.21]) by smtp.gmail.com with ESMTPSA id f1sm2689415wri.43.2021.09.11.15.31.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 11 Sep 2021 15:31:34 -0700 (PDT) Subject: Re: [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work() From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= To: Richard Henderson , David Gibson , =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Greg Kurz References: <20210902161543.417092-1-f4bug@amsat.org> <20210902161543.417092-22-f4bug@amsat.org> Message-ID: Date: Sun, 12 Sep 2021 00:31:31 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Cornelia Huck , kvm@vger.kernel.org, David Hildenbrand , Bin Meng , Mark Cave-Ayland , qemu-devel@nongnu.org, Laurent Vivier , Max Filippov , Taylor Simpson , haxm-team@intel.com, Colin Xu , Stafford Horne , Marek Vasut , Stefano Stabellini , Yoshinori Sato , Paul Durrant , Kamil Rytarowski , Reinoud Zandijk , Claudio Fontana , Anthony Perard , xen-devel@lists.xenproject.org, Artyom Tarasenko , Laurent Vivier , Thomas Huth , Eduardo Habkost , Cameron Esfahani , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, Michael Rolnik , Sunil Muthuswamy , Palmer Dabbelt , qemu-riscv@nongnu.org, Bastian Koppelmann , Chris Wulff , Roman Bolshakov , qemu-ppc@nongnu.org, Wenchao Wang , Alistair Francis , Paolo Bonzini , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/3/21 11:11 PM, Philippe Mathieu-Daudé wrote: > On 9/3/21 10:42 PM, Richard Henderson wrote: >> On 9/3/21 2:50 AM, David Gibson wrote: >>> On Thu, Sep 02, 2021 at 06:15:34PM +0200, Philippe Mathieu-Daudé wrote: >>>> Each POWER cpu has its own has_work() implementation. Instead of >>>> overloading CPUClass on each PowerPCCPUClass init, register the >>>> generic ppc_cpu_has_work() handler, and have it call the POWER >>>> specific has_work(). >>> >>> I don't quite see the rationale for introducing a second layer of >>> indirection here.  What's wrong with switching the base has_work for >>> each cpu variant? >> >> We're moving the hook from CPUState to TCGCPUOps. >> Phil was trying to avoid creating N versions of >> >> static const struct TCGCPUOps ppc_tcg_ops = { >>     ... >> }; > > Ah yes this is the reason! Too many context switching so > I forgot about it. > >> A plausible alternative is to remove the const from this struct and >> modify it, just as we do for CPUState, on the assumption that we cannot >> mix and match ppc cpu types in any one machine. > > I thought about this case and remembered how it works on the ARM arch, > i.e. ZynqMP machine uses both Cortex-R5F and Cortex-A53. Even if no > similar PPC machine exists, IMHO we should try to generally allow to > possibility to experiment machine with different CPUs. Restricting it > on PPC goes the other way around. Thoughts? I'm running out of ideas to do avoid the indirection and multiple copies of TCGCPUOps. I'm not giving up, I suppose I'm simply not seeing it... David, any suggestions?