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([2001:a61:3456:4e01:6ae:b55a:bd1d:57fc]) by smtp.gmail.com with ESMTPSA id dd16-20020a0560001e9000b00332cc24a59bsm1760782wrb.109.2023.11.30.07.20.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 07:20:13 -0800 (PST) Message-ID: Subject: Re: [PATCH v2 2/2] hwmon: ltc4282: add support for the LTC4282 chip From: Nuno =?ISO-8859-1?Q?S=E1?= To: Andy Shevchenko Cc: Linus Walleij , nuno.sa@analog.com, linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, Jean Delvare , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Bartosz Golaszewski Date: Thu, 30 Nov 2023 16:20:13 +0100 In-Reply-To: References: <20231124-ltc4282-support-v2-0-952bf926f83c@analog.com> <20231124-ltc4282-support-v2-2-952bf926f83c@analog.com> <6384831c05b8ceeaf4a16cf9229770252989b762.camel@gmail.com> <971eb35068639ec404669ea5320c8183ea71a7d0.camel@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.48.4 (3.48.4-1.fc38) Precedence: bulk X-Mailing-List: linux-hwmon@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2023-11-30 at 15:36 +0200, Andy Shevchenko wrote: > On Thu, Nov 30, 2023 at 11:20:32AM +0100, Nuno S=C3=A1 wrote: > > On Wed, 2023-11-29 at 21:55 +0100, Linus Walleij wrote: > > > On Wed, Nov 29, 2023 at 5:08=E2=80=AFPM Nuno S=C3=A1 wrote: > > >=20 > > > > Cool, I actually thought that having the direction + get/set stuff = would be > > > > weird > > > > given the fact that we can only PULL_LOW or HIGH_Z the pins. > > >=20 > > > There are several drivers in the kernel that implement .set_config(), > > > it's existing and should be enabled if it has uses. > >=20 > > Yeah, it might make sense to support it specially for the input case. A= FAICT, if > > I > > use the .set_config() (but from a quick look I think we will need to ad= d support > > for > > it in gpiolib for the high-z configuration), then I can't use the gpio_= regmap > > stuff. > > As the driver stands I don't think I could do it anyways because settin= g gpio2-3 > > and > > alert requires to write 0 on the register rather than 1. But again, I'm= still > > very > > suspicious about the whole thing. The datasheet states: > >=20 > > "GPIO1-GPIO3 and ALERT all have comparators monitoring > > the voltage on these pins with a threshold of 1.28V even when > > the pins are configured as outputs." > >=20 > > But we can't really set the direction for gpio2-3 and the alert pins (o= nly > > getting > > the level and setting it as PULL_LOW or HIGH_Z. gpio1 is the only one w= here we > > can > > configure it as input or open drain ouput. Bah, I'll try to see if some= one > > internally > > can shed some light on this. >=20 > I have better proposal. If these GPIOs are not needed for the main > functionality of the hardware, can we just left it out for now and implem= ent > later if required? >=20 Well, I did spent some time on the gpio thing so I would like to have it in= but yeah, no hard feelings if it does not go in. So, I actually talk with some hw guys and the pull_low is not really like a= pull_low resistor. These pins are effectively an open drain. Which means, setting th= em as input means setting them in high-z (turning off the mosffet) - and I do hav= e a bug in my code regarding this - Or if you want them as outputs you can set the lev= el low (and it will always be low - just turn on the mosffet) or you can also set = high-z which means it will be either low or high depending on your external circui= try. The point is, you can still have your pin acting as a normal gpo if you accommo= date your circuitry for it (can also use these pins for things like buses). Also got me thinking if a gpi vs gpo devicetree property would make sense. = But I would likely leave it more generic/relaxed for now (even though I think you= would need to be creative and actually use more HW to have the possibility of usi= ng these pins as GPIs and GPOs at the same time). - Nuno S=C3=A1