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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: matthew.gerlach@linux.intel.com, dinguyen@kernel.org,
	robh+dt@kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org
Subject: Re: [PATCH v3 1/3] dt-bindings: soc: add bindings for Intel HPS Copy Engine
Date: Sat, 7 May 2022 13:52:16 +0200	[thread overview]
Message-ID: <a5b88103-16e2-1dda-3469-78887f91c88c@linaro.org> (raw)
In-Reply-To: <20220506154116.365235-2-matthew.gerlach@linux.intel.com>

On 06/05/2022 17:41, matthew.gerlach@linux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> 
> Add device tree bindings documentation for the Intel Hard
> Processor System (HPS) Copy Engine.
> 
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> ---
> v3:
>   - remove unused label
>   - move from misc to soc
>   - remove 0x from #address-cells/#size-cells values
>   - change hps_cp_eng@0 to dma-controller@0
>   - remote inaccurate 'items:' tag
> ---
>  .../bindings/soc/intel,hps-copy-engine.yaml   | 51 +++++++++++++++++++
>  1 file changed, 51 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/intel,hps-copy-engine.yaml

There are no files laying around in bindings/soc. Each is in its own
vendor subdirectory, so let's don't introduce inconsistencies. Intel
should not be different/special.

Best regards,
Krzysztof

  reply	other threads:[~2022-05-07 11:52 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-06 15:41 [PATCH v3 0/3] Add device tree for Intel n6000 matthew.gerlach
2022-05-06 15:41 ` [PATCH v3 1/3] dt-bindings: soc: add bindings for Intel HPS Copy Engine matthew.gerlach
2022-05-07 11:52   ` Krzysztof Kozlowski [this message]
2022-05-07 14:33     ` matthew.gerlach
2022-05-06 15:41 ` [PATCH v3 2/3] dt-bindings: intel: add binding for Intel n6000 matthew.gerlach
2022-05-06 15:41 ` [PATCH v3 3/3] arm64: dts: intel: add device tree for n6000 matthew.gerlach

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