From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751062AbdBBHQS (ORCPT ); Thu, 2 Feb 2017 02:16:18 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:14107 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750920AbdBBHQP (ORCPT ); Thu, 2 Feb 2017 02:16:15 -0500 X-AuditID: cbfec7f5-f79d06d000004445-f9-5892dcbb8e6b Subject: Re: [PATCH 03/11] [media] s5p-mfc: Use min scratch buffer size To: Smitha T Murthy , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Cc: kyungmin.park@samsung.com, kamil@wypas.org, jtp.park@samsung.com, mchehab@kernel.org, pankaj.dubey@samsung.com, krzk@kernel.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com From: Andrzej Hajda Message-id: Date: Thu, 02 Feb 2017 08:16:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-version: 1.0 In-reply-to: <1484733729-25371-4-git-send-email-smitha.t@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrJKsWRmVeSWpSXmKPExsWy7djPc7q770yKMHi+k83iyNqrTBYzT7Sz Wpw/v4Hd4mzTG3aLTY+vsVpc3jWHzaJnw1ZWi7VH7rJbLNv0h8li0dYv7BaH3wAV392zjdGB x2PTqk42j81L6j36tqxi9Pi8Sc7jypFG9gDWKC6blNSczLLUIn27BK6Mc08PsRYciK6YN/0O ewPjee8uRk4OCQETiXVLprBB2GISF+6tB7K5OIQEljJKrHkwnQXC+cwo0Xx4KjtMR8vbx6wg tpDAMkaJG9t5IYqeMUqsWrARLCEs4C7x4sIMdpCEiEA/o8SurbeYQRLMAjuBRp2oBLHZBDQl /m6+CbabV8BOYvLaHUA1HBwsAqoS+3c7gIRFBSIkDh27zQxRIijxY/I9FhCbU8BV4tbBlywQ Iw0kZkw5zARhy0tsXvOWGWSvhMA5doljB/eBzZQQkJXYdIAZ4gEXiW8Tr0O9LCzx6vgWqMdk JDo7DjJB9HYzSnzqP8EO4UxhlPj3YQZUt7XE4eMXWSG28UlM2jYdagGvREebEESJh8SEr6dY IMKOEpcaWSEBdJlRYvmu7YwTGOVnIflnFpIfZiH5YQEj8ypGkdTS4tz01GJTveLE3OLSvHS9 5PzcTYzABHT63/GvOxiXHrM6xCjAwajEw5shNilCiDWxrLgy9xCjBAezkgiv+g2gEG9KYmVV alF+fFFpTmrxIUZpDhYlcd49C66ECwmkJ5akZqemFqQWwWSZODilGhjzKk3WmZVPXaM+/86V 6bEbZUpW8F04cNS9gkEve2N3ksDp499udmqc5fqR/qJFZ/HnyMjGP0uU9hSW+r2bfO2pxq1Y E7Pq+QsUNBo3TZueqBU2L+CN/vvLxefSlv0wW3rvYFjazJIL+moZX6ed6+TdfrFAr7nh85Fv ez2+WE7PmrA79kLLdJF1SizFGYmGWsxFxYkA1z5YpjwDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrBIsWRmVeSWpSXmKPExsVy+t/xK7r/70yKMJiwysLiyNqrTBYzT7Sz Wpw/v4Hd4mzTG3aLTY+vsVpc3jWHzaJnw1ZWi7VH7rJbLNv0h8li0dYv7BaH3wAV392zjdGB x2PTqk42j81L6j36tqxi9Pi8Sc7jypFG9gDWKDebjNTElNQihdS85PyUzLx0W6XQEDddCyWF vMTcVFulCF3fkCAlhbLEnFIgz8gADTg4B7gHK+nbJbhlnHt6iLXgQHTFvOl32BsYz3t3MXJy SAiYSLS8fcwKYYtJXLi3nq2LkYtDSGAJo8SkxhvsEM4zRonXC34ygVQJC7hLvLgwAywhItDP KHHgfTtU1WVGiYdfNjGCOMwCOxkl7h6YzwLSwiagKfF38002EJtXwE5i8todzF2MHBwsAqoS +3c7gJiiAhESDYfTISoEJX5MvgfWySngKnHr4EsWkBJmAT2J+xe1QMLMAvISm9e8ZZ7AKDAL SccshKpZSKoWMDKvYhRJLS3OTc8tNtQrTswtLs1L10vOz93ECIzFbcd+bt7BeGlj8CFGAQ5G JR7eAxKTIoRYE8uKK3MPMUpwMCuJ8KrfAArxpiRWVqUW5ccXleakFh9iNAV6YCKzlGhyPjBN 5JXEG5oYmlsaGhlbWJgbGSmJ85Z8uBIuJJCeWJKanZpakFoE08fEwSnVwNiSW+uqfoh3s5TM fiaWSV5fWEQ/uztfX7bKbHvnoiP7XkSaSkvO+2qe0zx7yp1vVauzl+lclHmSJtb79VLB+TnN CQyp9qWNqm9Cz1+MeTtZ4NQxgYrCp3x7vZYfTbixxPTP8ZJVSaLSf6U67hove7y2f95+xytX Slh38DfufVDEfCams/TW1wwlluKMREMt5qLiRADX3puc2wIAAA== X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170202071610eucas1p2f16586d62c1aca4e27ece79cacf54a8d X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRvsgrw=?= =?UTF-8?B?7ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRtTYW1z?= =?UTF-8?B?dW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170118100726epcas1p2d443360ea389ccb0826a1b5c5512da55 X-RootMTR: 20170118100726epcas1p2d443360ea389ccb0826a1b5c5512da55 References: <1484733729-25371-1-git-send-email-smitha.t@samsung.com> <1484733729-25371-4-git-send-email-smitha.t@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 18.01.2017 11:02, Smitha T Murthy wrote: > After MFC v8.0, mfc f/w lets the driver know how much scratch buffer > size is required for decoder. If mfc f/w has the functionality, > E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size > is required for encoder too. Subject says "Use min scratch buffer size" but it is already used. Maybe it should be changed to sth like: Use min scratch buffer size provided by F/W > > Signed-off-by: Smitha T Murthy > --- > drivers/media/platform/s5p-mfc/regs-mfc-v8.h | 2 + > drivers/media/platform/s5p-mfc/s5p_mfc.c | 2 + > drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 + > drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 7 ++ > drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 4 + > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 +++++++++++++++++------ > 6 files changed, 67 insertions(+), 17 deletions(-) > > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h > index 4d1c375..2cd396b 100644 > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h > @@ -17,6 +17,7 @@ > > /* Additional registers for v8 */ > #define S5P_FIMV_D_MVC_NUM_VIEWS_V8 0xf104 > +#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108 > #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144 > #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148 > #define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150 > @@ -84,6 +85,7 @@ > > #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8 0xf78c > #define S5P_FIMV_E_VBV_INIT_DELAY_V8 0xf790 > +#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8 0xf894 > > #define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c > #define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50 > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c > index a043cce..b014038 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c > @@ -520,6 +520,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx, > dev); > ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count, > dev); > + ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, > + get_min_scratch_buf_size, dev); > if (ctx->img_width == 0 || ctx->img_height == 0) > ctx->state = MFCINST_ERROR; > else > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > index 1941c63..998e24b 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > @@ -724,6 +724,7 @@ struct mfc_control { > #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0) > #define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0) > #define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0) > +#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev)) > > #define MFC_V5_BIT BIT(0) > #define MFC_V6_BIT BIT(1) > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c > index 9042378..ef15831 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c > @@ -818,6 +818,13 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) > get_enc_dpb_count, dev); > if (ctx->pb_count < enc_pb_count) > ctx->pb_count = enc_pb_count; > + if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) { > + ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, > + get_e_min_scratch_buf_size, dev); > + ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > + S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); Do we really need to align it here? Does firmware return unaligned value? Even then the alignment (if necessary) should be moved rather to get_e_min_scratch_buf_size. > + ctx->bank1.size += ctx->scratch_buf_size; > + } > ctx->state = MFCINST_HEAD_PRODUCED; > } > > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h > index b6ac417..6478f70 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h > @@ -169,6 +169,7 @@ struct s5p_mfc_regs { > void __iomem *d_decoded_third_addr;/* only v7 */ > void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ > void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ > + void __iomem *d_min_scratch_buffer_size; /* v10 */ > > /* encoder registers */ > void __iomem *e_frame_width; > @@ -268,6 +269,7 @@ struct s5p_mfc_regs { > void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ > void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ > void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ > + void __iomem *e_min_scratch_buffer_size; /* v10 */ > }; > > struct s5p_mfc_hw_ops { > @@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops { > unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx); > unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx); > unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx); > + int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev); > + int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev); > }; > > void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev); > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c > index 63dce5a..faceee6 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c > @@ -110,7 +110,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > switch (ctx->codec_mode) { > case S5P_MFC_CODEC_H264_DEC: > case S5P_MFC_CODEC_H264_MVC_DEC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); Here and below you are adding empty case for MFCV10, this is wrong, patch subject says "Use min scratch buffer size", but you do nothing here. I see it is added in the next patch, probably it should be merged here, I will comment it more in the next patch. Regards Andrzej > + else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8( > mb_width, > @@ -127,7 +129,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > (ctx->mv_count * ctx->mv_size); > break; > case S5P_MFC_CODEC_MPEG4_DEC: > - if (IS_MFCV7_PLUS(dev)) { > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else if (IS_MFCV7_PLUS(dev)) { > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7( > mb_width, > @@ -145,10 +149,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > break; > case S5P_MFC_CODEC_VC1RCV_DEC: > case S5P_MFC_CODEC_VC1_DEC: > - ctx->scratch_buf_size = > - S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6( > - mb_width, > - mb_height); > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else > + ctx->scratch_buf_size = > + S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6( > + mb_width, > + mb_height); > + > ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); > ctx->bank1.size = ctx->scratch_buf_size; > @@ -158,16 +166,21 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > ctx->bank2.size = 0; > break; > case S5P_MFC_CODEC_H263_DEC: > - ctx->scratch_buf_size = > - S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6( > - mb_width, > - mb_height); > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else > + ctx->scratch_buf_size = > + S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6( > + mb_width, > + mb_height); > ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); > ctx->bank1.size = ctx->scratch_buf_size; > break; > case S5P_MFC_CODEC_VP8_DEC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8( > mb_width, > @@ -182,7 +195,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > ctx->bank1.size = ctx->scratch_buf_size; > break; > case S5P_MFC_CODEC_H264_ENC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) { > + mfc_debug(2, "Use min scratch buffer size\n"); > + } else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8( > mb_width, > @@ -202,10 +217,13 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > break; > case S5P_MFC_CODEC_MPEG4_ENC: > case S5P_MFC_CODEC_H263_ENC: > - ctx->scratch_buf_size = > - S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6( > - mb_width, > - mb_height); > + if (IS_MFCV10(dev)) { > + mfc_debug(2, "Use min scratch buffer size\n"); > + } else > + ctx->scratch_buf_size = > + S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6( > + mb_width, > + mb_height); > ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); > ctx->bank1.size = > @@ -215,7 +233,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > ctx->bank2.size = 0; > break; > case S5P_MFC_CODEC_VP8_ENC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) { > + mfc_debug(2, "Use min scratch buffer size\n"); > + } else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8( > mb_width, > @@ -1911,6 +1931,16 @@ static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev) > return readl(dev->mfc_regs->d_min_num_mv); > } > > +static int s5p_mfc_get_min_scratch_buf_size(struct s5p_mfc_dev *dev) > +{ > + return readl(dev->mfc_regs->d_min_scratch_buffer_size); > +} > + > +static int s5p_mfc_get_e_min_scratch_buf_size(struct s5p_mfc_dev *dev) > +{ > + return readl(dev->mfc_regs->e_min_scratch_buffer_size); > +} > + > static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev) > { > return readl(dev->mfc_regs->ret_instance_id); > @@ -2169,6 +2199,7 @@ static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) > R(d_ret_picture_tag_bot, S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8); > R(d_display_crop_info1, S5P_FIMV_D_DISPLAY_CROP_INFO1_V8); > R(d_display_crop_info2, S5P_FIMV_D_DISPLAY_CROP_INFO2_V8); > + R(d_min_scratch_buffer_size, S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8); > > /* encoder registers */ > R(e_padding_ctrl, S5P_FIMV_E_PADDING_CTRL_V8); > @@ -2184,6 +2215,7 @@ static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) > R(e_aspect_ratio, S5P_FIMV_E_ASPECT_RATIO_V8); > R(e_extended_sar, S5P_FIMV_E_EXTENDED_SAR_V8); > R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8); > + R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8); > > done: > return &mfc_regs; > @@ -2232,6 +2264,8 @@ static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) > .get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6, > .get_crop_info_h = s5p_mfc_get_crop_info_h_v6, > .get_crop_info_v = s5p_mfc_get_crop_info_v_v6, > + .get_min_scratch_buf_size = s5p_mfc_get_min_scratch_buf_size, > + .get_e_min_scratch_buf_size = s5p_mfc_get_e_min_scratch_buf_size, > }; > > struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void) From mboxrd@z Thu Jan 1 00:00:00 1970 From: a.hajda@samsung.com (Andrzej Hajda) Date: Thu, 02 Feb 2017 08:16:09 +0100 Subject: [PATCH 03/11] [media] s5p-mfc: Use min scratch buffer size In-Reply-To: <1484733729-25371-4-git-send-email-smitha.t@samsung.com> References: <1484733729-25371-1-git-send-email-smitha.t@samsung.com> <1484733729-25371-4-git-send-email-smitha.t@samsung.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 18.01.2017 11:02, Smitha T Murthy wrote: > After MFC v8.0, mfc f/w lets the driver know how much scratch buffer > size is required for decoder. If mfc f/w has the functionality, > E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size > is required for encoder too. Subject says "Use min scratch buffer size" but it is already used. Maybe it should be changed to sth like: Use min scratch buffer size provided by F/W > > Signed-off-by: Smitha T Murthy > --- > drivers/media/platform/s5p-mfc/regs-mfc-v8.h | 2 + > drivers/media/platform/s5p-mfc/s5p_mfc.c | 2 + > drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 + > drivers/media/platform/s5p-mfc/s5p_mfc_enc.c | 7 ++ > drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 4 + > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 68 +++++++++++++++++------ > 6 files changed, 67 insertions(+), 17 deletions(-) > > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h > index 4d1c375..2cd396b 100644 > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v8.h > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v8.h > @@ -17,6 +17,7 @@ > > /* Additional registers for v8 */ > #define S5P_FIMV_D_MVC_NUM_VIEWS_V8 0xf104 > +#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108 > #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144 > #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148 > #define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150 > @@ -84,6 +85,7 @@ > > #define S5P_FIMV_E_VBV_BUFFER_SIZE_V8 0xf78c > #define S5P_FIMV_E_VBV_INIT_DELAY_V8 0xf790 > +#define S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8 0xf894 > > #define S5P_FIMV_E_ASPECT_RATIO_V8 0xfb4c > #define S5P_FIMV_E_EXTENDED_SAR_V8 0xfb50 > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c > index a043cce..b014038 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c > @@ -520,6 +520,8 @@ static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx, > dev); > ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count, > dev); > + ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, > + get_min_scratch_buf_size, dev); > if (ctx->img_width == 0 || ctx->img_height == 0) > ctx->state = MFCINST_ERROR; > else > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > index 1941c63..998e24b 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > @@ -724,6 +724,7 @@ struct mfc_control { > #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0) > #define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0) > #define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0) > +#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev)) > > #define MFC_V5_BIT BIT(0) > #define MFC_V6_BIT BIT(1) > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c > index 9042378..ef15831 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c > @@ -818,6 +818,13 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) > get_enc_dpb_count, dev); > if (ctx->pb_count < enc_pb_count) > ctx->pb_count = enc_pb_count; > + if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) { > + ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, > + get_e_min_scratch_buf_size, dev); > + ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > + S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); Do we really need to align it here? Does firmware return unaligned value? Even then the alignment (if necessary) should be moved rather to get_e_min_scratch_buf_size. > + ctx->bank1.size += ctx->scratch_buf_size; > + } > ctx->state = MFCINST_HEAD_PRODUCED; > } > > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h > index b6ac417..6478f70 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h > @@ -169,6 +169,7 @@ struct s5p_mfc_regs { > void __iomem *d_decoded_third_addr;/* only v7 */ > void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ > void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ > + void __iomem *d_min_scratch_buffer_size; /* v10 */ > > /* encoder registers */ > void __iomem *e_frame_width; > @@ -268,6 +269,7 @@ struct s5p_mfc_regs { > void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ > void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ > void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ > + void __iomem *e_min_scratch_buffer_size; /* v10 */ > }; > > struct s5p_mfc_hw_ops { > @@ -311,6 +313,8 @@ struct s5p_mfc_hw_ops { > unsigned int (*get_pic_type_bot)(struct s5p_mfc_ctx *ctx); > unsigned int (*get_crop_info_h)(struct s5p_mfc_ctx *ctx); > unsigned int (*get_crop_info_v)(struct s5p_mfc_ctx *ctx); > + int (*get_min_scratch_buf_size)(struct s5p_mfc_dev *dev); > + int (*get_e_min_scratch_buf_size)(struct s5p_mfc_dev *dev); > }; > > void s5p_mfc_init_hw_ops(struct s5p_mfc_dev *dev); > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c > index 63dce5a..faceee6 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c > @@ -110,7 +110,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > switch (ctx->codec_mode) { > case S5P_MFC_CODEC_H264_DEC: > case S5P_MFC_CODEC_H264_MVC_DEC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); Here and below you are adding empty case for MFCV10, this is wrong, patch subject says "Use min scratch buffer size", but you do nothing here. I see it is added in the next patch, probably it should be merged here, I will comment it more in the next patch. Regards Andrzej > + else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8( > mb_width, > @@ -127,7 +129,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > (ctx->mv_count * ctx->mv_size); > break; > case S5P_MFC_CODEC_MPEG4_DEC: > - if (IS_MFCV7_PLUS(dev)) { > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else if (IS_MFCV7_PLUS(dev)) { > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7( > mb_width, > @@ -145,10 +149,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > break; > case S5P_MFC_CODEC_VC1RCV_DEC: > case S5P_MFC_CODEC_VC1_DEC: > - ctx->scratch_buf_size = > - S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6( > - mb_width, > - mb_height); > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else > + ctx->scratch_buf_size = > + S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6( > + mb_width, > + mb_height); > + > ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); > ctx->bank1.size = ctx->scratch_buf_size; > @@ -158,16 +166,21 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > ctx->bank2.size = 0; > break; > case S5P_MFC_CODEC_H263_DEC: > - ctx->scratch_buf_size = > - S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6( > - mb_width, > - mb_height); > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else > + ctx->scratch_buf_size = > + S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6( > + mb_width, > + mb_height); > ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); > ctx->bank1.size = ctx->scratch_buf_size; > break; > case S5P_MFC_CODEC_VP8_DEC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) > + mfc_debug(2, "Use min scratch buffer size\n"); > + else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8( > mb_width, > @@ -182,7 +195,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > ctx->bank1.size = ctx->scratch_buf_size; > break; > case S5P_MFC_CODEC_H264_ENC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) { > + mfc_debug(2, "Use min scratch buffer size\n"); > + } else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8( > mb_width, > @@ -202,10 +217,13 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > break; > case S5P_MFC_CODEC_MPEG4_ENC: > case S5P_MFC_CODEC_H263_ENC: > - ctx->scratch_buf_size = > - S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6( > - mb_width, > - mb_height); > + if (IS_MFCV10(dev)) { > + mfc_debug(2, "Use min scratch buffer size\n"); > + } else > + ctx->scratch_buf_size = > + S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_ENC_V6( > + mb_width, > + mb_height); > ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, > S5P_FIMV_SCRATCH_BUFFER_ALIGN_V6); > ctx->bank1.size = > @@ -215,7 +233,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) > ctx->bank2.size = 0; > break; > case S5P_MFC_CODEC_VP8_ENC: > - if (IS_MFCV8_PLUS(dev)) > + if (IS_MFCV10(dev)) { > + mfc_debug(2, "Use min scratch buffer size\n"); > + } else if (IS_MFCV8_PLUS(dev)) > ctx->scratch_buf_size = > S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8( > mb_width, > @@ -1911,6 +1931,16 @@ static int s5p_mfc_get_mv_count_v6(struct s5p_mfc_dev *dev) > return readl(dev->mfc_regs->d_min_num_mv); > } > > +static int s5p_mfc_get_min_scratch_buf_size(struct s5p_mfc_dev *dev) > +{ > + return readl(dev->mfc_regs->d_min_scratch_buffer_size); > +} > + > +static int s5p_mfc_get_e_min_scratch_buf_size(struct s5p_mfc_dev *dev) > +{ > + return readl(dev->mfc_regs->e_min_scratch_buffer_size); > +} > + > static int s5p_mfc_get_inst_no_v6(struct s5p_mfc_dev *dev) > { > return readl(dev->mfc_regs->ret_instance_id); > @@ -2169,6 +2199,7 @@ static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) > R(d_ret_picture_tag_bot, S5P_FIMV_D_RET_PICTURE_TAG_BOT_V8); > R(d_display_crop_info1, S5P_FIMV_D_DISPLAY_CROP_INFO1_V8); > R(d_display_crop_info2, S5P_FIMV_D_DISPLAY_CROP_INFO2_V8); > + R(d_min_scratch_buffer_size, S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8); > > /* encoder registers */ > R(e_padding_ctrl, S5P_FIMV_E_PADDING_CTRL_V8); > @@ -2184,6 +2215,7 @@ static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) > R(e_aspect_ratio, S5P_FIMV_E_ASPECT_RATIO_V8); > R(e_extended_sar, S5P_FIMV_E_EXTENDED_SAR_V8); > R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8); > + R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8); > > done: > return &mfc_regs; > @@ -2232,6 +2264,8 @@ static unsigned int s5p_mfc_get_crop_info_v_v6(struct s5p_mfc_ctx *ctx) > .get_pic_type_bot = s5p_mfc_get_pic_type_bot_v6, > .get_crop_info_h = s5p_mfc_get_crop_info_h_v6, > .get_crop_info_v = s5p_mfc_get_crop_info_v_v6, > + .get_min_scratch_buf_size = s5p_mfc_get_min_scratch_buf_size, > + .get_e_min_scratch_buf_size = s5p_mfc_get_e_min_scratch_buf_size, > }; > > struct s5p_mfc_hw_ops *s5p_mfc_init_hw_ops_v6(void)