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Mon, 9 Mar 2020 19:08:55 +0000 Subject: Re: [PATCH v5 12/16] hw/i386: Use the apicid handlers from X86MachineState To: Igor Mammedov References: <158326531474.40452.11433722850425537745.stgit@naples-babu.amd.com> <158326548999.40452.9247570542382737462.stgit@naples-babu.amd.com> <20200309160157.0509fa8d@Igors-MacBook-Pro> From: Babu Moger Message-ID: Date: Mon, 9 Mar 2020 14:08:53 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 In-Reply-To: <20200309160157.0509fa8d@Igors-MacBook-Pro> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SN6PR05CA0007.namprd05.prod.outlook.com (2603:10b6:805:de::20) To SN1PR12MB2560.namprd12.prod.outlook.com (2603:10b6:802:26::19) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from [10.236.30.87] (165.204.77.1) by SN6PR05CA0007.namprd05.prod.outlook.com (2603:10b6:805:de::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2814.6 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: 93csmDgYZIAp5gg3DSUz8g6vyScfXNNa3vMk0h4MWFsrH3rNAGBPgeEyEX+lrso1gCQ0Qh7+IBYj/0WmhIjYJmcpvnJIa7q2AOHrMYTjqlIfDj3b0hfWVg6YsfOaWey0D9+fbgyAGa0TezC4WdNaOxFjLaUVPvVjTI/CqI6pPSuczegPrd/j1cF63CRVe3+JqXA/eZrjlcgr/AZcJJPnTxWc0zKcIBi5BRI1OzzCgVHc7L7zFWU8zSiP6xjUJgSwW0+7sjVsyowjbmtE7jgM8SvB2kUo3rVqJY5hOVNgiYqzUlk0nxFagBMnlP97I15R780yq1DVQo11HQoVaV52xZzjFb7zRPbXYs3ZYwImWiXNAFrVSHqtciA90VuvHeQoJafhVCwHgpMFXR4TTj46UqYCDQLGjPr0Kv11l89R4/jcYA3ZC4t9xpw1KGzwSIhM X-MS-Exchange-AntiSpam-MessageData: R388zAfgzaVdBgTvwC0/QVkJuOL1K2Pj0QAQnYhgZvwg2B+RZn+wkleRIw53i55YkVDN18DbioruhgDFm0dSbZw1jXAGd1crZq4a4nf4Gko2yvTDnaIIRGXmYZHPFb1yO4Sdn+s7yFbewDX8WIJqxQ== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 69d8b21e-ce28-4382-16c9-08d7c45d5020 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Mar 2020 19:08:55.2736 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: mLB+Ge/n0CGwY+usSEBlliDrmAe5lySYxrJYj1uDorG3xsn3gqHvKyufDAZXafEb X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2544 X-detected-operating-system: by eggs.gnu.org: Windows NT kernel [generic] [fuzzy] X-Received-From: 40.107.243.82 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/9/20 10:01 AM, Igor Mammedov wrote: > On Tue, 03 Mar 2020 13:58:10 -0600 > Babu Moger wrote: > >> Check and Load the apicid handlers from X86CPUDefinition if available. >> Update the calling convention for the apicid handlers. >> >> Signed-off-by: Babu Moger > > >> --- >> hw/i386/pc.c | 6 +++--- >> hw/i386/x86.c | 11 +++++++---- >> 2 files changed, 10 insertions(+), 7 deletions(-) >> >> diff --git a/hw/i386/pc.c b/hw/i386/pc.c >> index 17cce3f074..c600ba0432 100644 >> --- a/hw/i386/pc.c >> +++ b/hw/i386/pc.c >> @@ -1581,14 +1581,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, >> topo_ids.die_id = cpu->die_id; >> topo_ids.core_id = cpu->core_id; >> topo_ids.smt_id = cpu->thread_id; >> - cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids); >> + cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids); >> } >> >> cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); >> if (!cpu_slot) { >> MachineState *ms = MACHINE(pcms); >> >> - x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); >> + x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); > this (including other similar) change(s) to callbacks should go to 11/16 So, you mean patch #11 and #12 should be squashed together. Is that right? > >> error_setg(errp, >> "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" >> " APIC ID %" PRIu32 ", valid index range 0:%d", >> @@ -1609,7 +1609,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, >> /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() >> * once -smp refactoring is complete and there will be CPU private >> * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ >> - x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); >> + x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); >> if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { >> error_setg(errp, "property socket-id: %u doesn't match set apic-id:" >> " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, >> diff --git a/hw/i386/x86.c b/hw/i386/x86.c >> index 15b7815bb0..d46dd4ad9e 100644 >> --- a/hw/i386/x86.c >> +++ b/hw/i386/x86.c >> @@ -86,7 +86,7 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms, >> >> init_topo_info(&topo_info, x86ms); >> >> - correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index); >> + correct_id = x86ms->apicid_from_cpu_idx(&topo_info, cpu_index); >> if (x86mc->compat_apic_id_mode) { >> if (cpu_index != correct_id && !warned && !qtest_enabled()) { >> error_report("APIC IDs set in compatibility mode, " >> @@ -158,8 +158,8 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx) >> init_topo_info(&topo_info, x86ms); >> >> assert(idx < ms->possible_cpus->len); >> - x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, >> - &topo_info, &topo_ids); >> + x86ms->topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id, >> + &topo_info, &topo_ids); >> return topo_ids.pkg_id % ms->numa_state->num_nodes; >> } >> >> @@ -179,6 +179,9 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) >> return ms->possible_cpus; >> } >> >> + /* Initialize apicid handlers */ >> + cpu_x86_init_apicid_fns(ms); >> + >> ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) + >> sizeof(CPUArchId) * max_cpus); >> ms->possible_cpus->len = max_cpus; >> @@ -192,7 +195,7 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms) >> ms->possible_cpus->cpus[i].vcpus_count = 1; >> ms->possible_cpus->cpus[i].arch_id = >> x86_cpu_apic_id_from_index(x86ms, i); >> - x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, >> + x86ms->topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id, >> &topo_info, &topo_ids); > > not aligned properly > >> ms->possible_cpus->cpus[i].props.has_socket_id = true; >> ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id; >> >