From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sameer Pujar Subject: Re: [alsa-devel] [PATCH 2/9] ASoC: tegra: add support for CIF programming Date: Tue, 21 Jan 2020 10:11:16 +0530 Message-ID: References: <1579530198-13431-1-git-send-email-spujar@nvidia.com> <1579530198-13431-3-git-send-email-spujar@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: Content-Language: en-GB Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Dmitry Osipenko , perex-/Fr2/VpizcU@public.gmane.org, tiwai-IBi9RG/b67k@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw@public.gmane.org, atalambedu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, lgirdwood-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, viswanathl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, sharadg-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, rlokhande-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, mkumard-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, dramesh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org List-Id: linux-tegra@vger.kernel.org On 1/20/2020 9:28 PM, Dmitry Osipenko wrote: > External email: Use caution opening links or attachments > > > Hello Sameer, > > 20.01.2020 17:23, Sameer Pujar =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > > [snip] > >> Tegra30 and Tegra124 have an identical CIF programming helper function. > [snip] > >> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT 24 >> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US 0x3f >> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK (TEGRA124_AUDIOCIF= _CTRL_FIFO_THRESHOLD_MASK_US << TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT= ) >> - >> -/* Channel count minus 1 */ >> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT 24 >> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US 7 >> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK (TEGRA30_AUDIOCIF_= CTRL_AUDIO_CHANNELS_MASK_US << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) > The AUDIOCIF_CTRL bitfields are not the same on T30 and T124, why are > you claiming that programming is identical? Have you actually tried to > test these patches on T30? Oh yes! seems like I overlooked the macro values. Thanks for pointing=20 this. I will retain separate CIF function for Tegra30. I do not have a Tegra30 board with me and hence could not test anything=20 specific to it apart from build sanity. If someone can help me test I would really appreciate. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.4 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DABD7C33CB6 for ; Tue, 21 Jan 2020 04:41:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AFF4D217F4 for ; Tue, 21 Jan 2020 04:41:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="EnKysQf2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728863AbgAUElZ (ORCPT ); Mon, 20 Jan 2020 23:41:25 -0500 Received: from hqnvemgate25.nvidia.com ([216.228.121.64]:16995 "EHLO hqnvemgate25.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728042AbgAUElZ (ORCPT ); Mon, 20 Jan 2020 23:41:25 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 20 Jan 2020 20:41:09 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 20 Jan 2020 20:41:24 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 20 Jan 2020 20:41:24 -0800 Received: from [10.24.44.92] (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 21 Jan 2020 04:41:19 +0000 Subject: Re: [alsa-devel] [PATCH 2/9] ASoC: tegra: add support for CIF programming To: Dmitry Osipenko , , , CC: , , , , , , , , , , , , , References: <1579530198-13431-1-git-send-email-spujar@nvidia.com> <1579530198-13431-3-git-send-email-spujar@nvidia.com> From: Sameer Pujar Message-ID: Date: Tue, 21 Jan 2020 10:11:16 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: quoted-printable Content-Language: en-GB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1579581669; bh=GRt9U4PodCr86yU5eOb42L+DV/cuxomWCgBuTVfGcsY=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Transfer-Encoding: Content-Language; b=EnKysQf2VsOESTATJ6csnBbQLyGt6UD8fN0ZDiNDa5pHNJZPSq756z+cvYTNkkbUR UJFZvBvLGpXkRtSCG6VeBOwje4GuJ/bIGrtWbWabJb0ytEuAMf6OEmXj9QY1+i7Eij wY3N0EifVoSVE7jDcRa9T6gakYcJnbOGb/VyUmy/kYDYFVL/KDJo0Tj7LpzUecg/G4 m4FUDbKigHjs669jxNj15+GX06SaH0850lcGpK38nDe6IjhcTKbqFbvm4D3L1wwk2R cgEfj67npqikvcgyjnrnyOpigqYZ37U+8rY75ZlUoykyl7mmLnBsNDuOc931gti59l QbwzC5wDwFsQQ== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/20/2020 9:28 PM, Dmitry Osipenko wrote: > External email: Use caution opening links or attachments > > > Hello Sameer, > > 20.01.2020 17:23, Sameer Pujar =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > > [snip] > >> Tegra30 and Tegra124 have an identical CIF programming helper function. > [snip] > >> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT 24 >> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US 0x3f >> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK (TEGRA124_AUDIOCIF= _CTRL_FIFO_THRESHOLD_MASK_US << TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT= ) >> - >> -/* Channel count minus 1 */ >> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT 24 >> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US 7 >> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK (TEGRA30_AUDIOCIF_= CTRL_AUDIO_CHANNELS_MASK_US << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) > The AUDIOCIF_CTRL bitfields are not the same on T30 and T124, why are > you claiming that programming is identical? Have you actually tried to > test these patches on T30? Oh yes! seems like I overlooked the macro values. Thanks for pointing=20 this. I will retain separate CIF function for Tegra30. I do not have a Tegra30 board with me and hence could not test anything=20 specific to it apart from build sanity. If someone can help me test I would really appreciate. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A004EC33CAA for ; Tue, 21 Jan 2020 04:42:29 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2D95A217F4 for ; Tue, 21 Jan 2020 04:42:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=alsa-project.org header.i=@alsa-project.org header.b="EM8dUm0y"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="EnKysQf2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2D95A217F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 728021672; Tue, 21 Jan 2020 05:41:37 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 728021672 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1579581747; bh=yoXz1XtTIovU6ZGy4XL6rLOXD4Rm4m3H1x4B7cPG11I=; h=To:References:From:Date:In-Reply-To:Cc:Subject:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=EM8dUm0yMzFBlriP4fnSPAbZQEmrKytPeWi7YDChtoqLFeseI3amrLR6pkK9MdYKe H/FIY4BFYzGuTOTeNFZFlYRFsiTBdBf7/RWR0woC4eXEtoj7pN7kPqFohUJVPXRNOg CX1qClqtDTV8xt/tT2nvky2YE7cwpohkrCff3ZUU= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id C9693F8015B; Tue, 21 Jan 2020 05:41:36 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 048A7F800E7; Tue, 21 Jan 2020 05:41:34 +0100 (CET) Received: from hqnvemgate25.nvidia.com (hqnvemgate25.nvidia.com [216.228.121.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id DA0D0F800CB for ; Tue, 21 Jan 2020 05:41:27 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz DA0D0F800CB Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="EnKysQf2" Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate25.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 20 Jan 2020 20:41:09 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 20 Jan 2020 20:41:24 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 20 Jan 2020 20:41:24 -0800 Received: from [10.24.44.92] (10.124.1.5) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 21 Jan 2020 04:41:19 +0000 To: Dmitry Osipenko , , , References: <1579530198-13431-1-git-send-email-spujar@nvidia.com> <1579530198-13431-3-git-send-email-spujar@nvidia.com> From: Sameer Pujar Message-ID: Date: Tue, 21 Jan 2020 10:11:16 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: X-Originating-IP: [10.124.1.5] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) Content-Language: en-GB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1579581669; bh=GRt9U4PodCr86yU5eOb42L+DV/cuxomWCgBuTVfGcsY=; h=X-PGP-Universal:Subject:To:CC:References:From:Message-ID:Date: User-Agent:MIME-Version:In-Reply-To:X-Originating-IP: X-ClientProxiedBy:Content-Type:Content-Transfer-Encoding: Content-Language; b=EnKysQf2VsOESTATJ6csnBbQLyGt6UD8fN0ZDiNDa5pHNJZPSq756z+cvYTNkkbUR UJFZvBvLGpXkRtSCG6VeBOwje4GuJ/bIGrtWbWabJb0ytEuAMf6OEmXj9QY1+i7Eij wY3N0EifVoSVE7jDcRa9T6gakYcJnbOGb/VyUmy/kYDYFVL/KDJo0Tj7LpzUecg/G4 m4FUDbKigHjs669jxNj15+GX06SaH0850lcGpK38nDe6IjhcTKbqFbvm4D3L1wwk2R cgEfj67npqikvcgyjnrnyOpigqYZ37U+8rY75ZlUoykyl7mmLnBsNDuOc931gti59l QbwzC5wDwFsQQ== Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, jonathanh@nvidia.com, viswanathl@nvidia.com, linux-tegra@vger.kernel.org, broonie@kernel.org, atalambedu@nvidia.com, sharadg@nvidia.com, thierry.reding@gmail.com, rlokhande@nvidia.com, mkumard@nvidia.com, dramesh@nvidia.com Subject: Re: [alsa-devel] [PATCH 2/9] ASoC: tegra: add support for CIF programming X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Ck9uIDEvMjAvMjAyMCA5OjI4IFBNLCBEbWl0cnkgT3NpcGVua28gd3JvdGU6Cj4gRXh0ZXJuYWwg ZW1haWw6IFVzZSBjYXV0aW9uIG9wZW5pbmcgbGlua3Mgb3IgYXR0YWNobWVudHMKPgo+Cj4gSGVs bG8gU2FtZWVyLAo+Cj4gMjAuMDEuMjAyMCAxNzoyMywgU2FtZWVyIFB1amFyINC/0LjRiNC10YI6 Cj4KPiBbc25pcF0KPgo+PiBUZWdyYTMwIGFuZCBUZWdyYTEyNCBoYXZlIGFuIGlkZW50aWNhbCBD SUYgcHJvZ3JhbW1pbmcgaGVscGVyIGZ1bmN0aW9uLgo+IFtzbmlwXQo+Cj4+IC0jZGVmaW5lIFRF R1JBMTI0X0FVRElPQ0lGX0NUUkxfRklGT19USFJFU0hPTERfU0hJRlQgIDI0Cj4+IC0jZGVmaW5l IFRFR1JBMTI0X0FVRElPQ0lGX0NUUkxfRklGT19USFJFU0hPTERfTUFTS19VUyAgICAgICAgMHgz Zgo+PiAtI2RlZmluZSBURUdSQTEyNF9BVURJT0NJRl9DVFJMX0ZJRk9fVEhSRVNIT0xEX01BU0sg ICAoVEVHUkExMjRfQVVESU9DSUZfQ1RSTF9GSUZPX1RIUkVTSE9MRF9NQVNLX1VTIDw8IFRFR1JB MTI0X0FVRElPQ0lGX0NUUkxfRklGT19USFJFU0hPTERfU0hJRlQpCj4+IC0KPj4gLS8qIENoYW5u ZWwgY291bnQgbWludXMgMSAqLwo+PiAtI2RlZmluZSBURUdSQTMwX0FVRElPQ0lGX0NUUkxfQVVE SU9fQ0hBTk5FTFNfU0hJRlQgICAyNAo+PiAtI2RlZmluZSBURUdSQTMwX0FVRElPQ0lGX0NUUkxf QVVESU9fQ0hBTk5FTFNfTUFTS19VUyA3Cj4+IC0jZGVmaW5lIFRFR1JBMzBfQVVESU9DSUZfQ1RS TF9BVURJT19DSEFOTkVMU19NQVNLICAgIChURUdSQTMwX0FVRElPQ0lGX0NUUkxfQVVESU9fQ0hB Tk5FTFNfTUFTS19VUyA8PCBURUdSQTMwX0FVRElPQ0lGX0NUUkxfQVVESU9fQ0hBTk5FTFNfU0hJ RlQpCj4gVGhlIEFVRElPQ0lGX0NUUkwgYml0ZmllbGRzIGFyZSBub3QgdGhlIHNhbWUgb24gVDMw IGFuZCBUMTI0LCB3aHkgYXJlCj4geW91IGNsYWltaW5nIHRoYXQgcHJvZ3JhbW1pbmcgaXMgaWRl bnRpY2FsPyBIYXZlIHlvdSBhY3R1YWxseSB0cmllZCB0bwo+IHRlc3QgdGhlc2UgcGF0Y2hlcyBv biBUMzA/CgpPaCB5ZXMhIHNlZW1zIGxpa2UgSSBvdmVybG9va2VkIHRoZSBtYWNybyB2YWx1ZXMu IFRoYW5rcyBmb3IgcG9pbnRpbmcgCnRoaXMuIEkgd2lsbCByZXRhaW4gc2VwYXJhdGUgQ0lGIGZ1 bmN0aW9uIGZvciBUZWdyYTMwLgpJIGRvIG5vdCBoYXZlIGEgVGVncmEzMCBib2FyZCB3aXRoIG1l IGFuZCBoZW5jZSBjb3VsZCBub3QgdGVzdCBhbnl0aGluZyAKc3BlY2lmaWMgdG8gaXQgYXBhcnQg ZnJvbSBidWlsZCBzYW5pdHkuCklmIHNvbWVvbmUgY2FuIGhlbHAgbWUgdGVzdCBJIHdvdWxkIHJl YWxseSBhcHByZWNpYXRlLgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KQWxzYS1kZXZlbCBtYWlsaW5nIGxpc3QKQWxzYS1kZXZlbEBhbHNhLXByb2plY3Qu b3JnCmh0dHBzOi8vbWFpbG1hbi5hbHNhLXByb2plY3Qub3JnL21haWxtYW4vbGlzdGluZm8vYWxz YS1kZXZlbAo=