From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4350EC2BB85 for ; Thu, 16 Apr 2020 08:45:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 145AE20784 for ; Thu, 16 Apr 2020 08:45:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="T0YIR0kc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502773AbgDPIpO (ORCPT ); Thu, 16 Apr 2020 04:45:14 -0400 Received: from mail26.static.mailgun.info ([104.130.122.26]:14288 "EHLO mail26.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2441408AbgDPIjw (ORCPT ); Thu, 16 Apr 2020 04:39:52 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1587026388; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=uYTomwNJ7JVKnSJj43lc2hrUMA3IdsRKM3uaYsQJc+A=; b=T0YIR0kcnPMqh8xH9nsMCUR3u5CDv4lJV2u9xSy0lw1N2gFvKUePhme7gxNQ0YfojkxJmj8h zO8rFEX58NgpOQBPw/6uysvxaKt/rotKglpgrtuVWwZQsZ7prcTxMkPFJTFEGHt0NCoQIVWn A/6gLeGDbl1uzMT3vXlfL5gtt/U= X-Mailgun-Sending-Ip: 104.130.122.26 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e9819c3.7efe03ad8500-smtp-out-n03; Thu, 16 Apr 2020 08:39:31 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 30A09C43636; Thu, 16 Apr 2020 08:39:31 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 94779C433F2; Thu, 16 Apr 2020 08:39:30 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Thu, 16 Apr 2020 14:09:30 +0530 From: Sai Prakash Ranjan To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, Mark Rutland , kernel-team@android.com, Anshuman Khandual , Marc Zyngier , Suzuki K Poulose , linux-kernel@vger.kernel.org, Doug Anderson , Catalin Marinas Subject: Re: [PATCH 0/8] Relax sanity checking for mismatched AArch32 EL1 In-Reply-To: <20200414213114.2378-1-will@kernel.org> References: <20200414213114.2378-1-will@kernel.org> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020-04-15 03:01, Will Deacon wrote: > Hi all, > > For better or worse, there are SoCs in production where some, but not > all of the CPUs, support AArch32 at EL1 and above. Right now, that > results in "SANITY CHECK" warnings during boot and an unconditional > kernel taint. > > This patch series tries to do a bit better: the only time we care about > AArch32 at EL1 is for KVM, so rather than throw our toys out of the > pram, we can instead just disable support for 32-bit guests on these > systems. In the unlikely scenario of a late CPU hotplug being the first > time we notice that AArch32 is not available, then we fail the hotplug > (right now we let the thing come online, which leads to hilarious > results for any pre-existing 32-bit guests). > > Feedback welcome, > > Will > Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs. For the entire series, Tested-by: saiprakash.ranjan@codeaurora.org -Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4209C3815B for ; Thu, 16 Apr 2020 11:10:25 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 7B76C206E9 for ; Thu, 16 Apr 2020 11:10:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="T0YIR0kc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7B76C206E9 Authentication-Results: mail.kernel.org; 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Thu, 16 Apr 2020 08:39:31 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 94779C433F2; Thu, 16 Apr 2020 08:39:30 +0000 (UTC) MIME-Version: 1.0 Date: Thu, 16 Apr 2020 14:09:30 +0530 From: Sai Prakash Ranjan To: Will Deacon Subject: Re: [PATCH 0/8] Relax sanity checking for mismatched AArch32 EL1 In-Reply-To: <20200414213114.2378-1-will@kernel.org> References: <20200414213114.2378-1-will@kernel.org> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-Mailman-Approved-At: Thu, 16 Apr 2020 07:10:16 -0400 Cc: Anshuman Khandual , Marc Zyngier , linux-kernel@vger.kernel.org, Doug Anderson , Catalin Marinas , kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 2020-04-15 03:01, Will Deacon wrote: > Hi all, > > For better or worse, there are SoCs in production where some, but not > all of the CPUs, support AArch32 at EL1 and above. Right now, that > results in "SANITY CHECK" warnings during boot and an unconditional > kernel taint. > > This patch series tries to do a bit better: the only time we care about > AArch32 at EL1 is for KVM, so rather than throw our toys out of the > pram, we can instead just disable support for 32-bit guests on these > systems. In the unlikely scenario of a late CPU hotplug being the first > time we notice that AArch32 is not available, then we fail the hotplug > (right now we let the thing come online, which leads to hilarious > results for any pre-existing 32-bit guests). > > Feedback welcome, > > Will > Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs. For the entire series, Tested-by: saiprakash.ranjan@codeaurora.org -Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA64BC2BB85 for ; Thu, 16 Apr 2020 08:39:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6E06020644 for ; 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charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-04-15 03:01, Will Deacon wrote: > Hi all, > > For better or worse, there are SoCs in production where some, but not > all of the CPUs, support AArch32 at EL1 and above. Right now, that > results in "SANITY CHECK" warnings during boot and an unconditional > kernel taint. > > This patch series tries to do a bit better: the only time we care about > AArch32 at EL1 is for KVM, so rather than throw our toys out of the > pram, we can instead just disable support for 32-bit guests on these > systems. In the unlikely scenario of a late CPU hotplug being the first > time we notice that AArch32 is not available, then we fail the hotplug > (right now we let the thing come online, which leads to hilarious > results for any pre-existing 32-bit guests). > > Feedback welcome, > > Will > Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs. For the entire series, Tested-by: saiprakash.ranjan@codeaurora.org -Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel