From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33827) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ya0Am-0007Rw-Ot for qemu-devel@nongnu.org; Mon, 23 Mar 2015 07:05:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ya0Ag-00078p-8k for qemu-devel@nongnu.org; Mon, 23 Mar 2015 07:05:32 -0400 Received: from mail-bn1on0056.outbound.protection.outlook.com ([157.56.110.56]:64000 helo=na01-bn1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ya0Ag-000779-4M for qemu-devel@nongnu.org; Mon, 23 Mar 2015 07:05:26 -0400 From: Peter Crosthwaite Date: Mon, 23 Mar 2015 04:05:14 -0700 Message-ID: In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH target-arm v4 06/16] arm: xlnx-zynqmp: Connect CPU Timers to GIC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, ozaki.ryota@gmail.com, michals@xilinx.com, zach.pfeffer@xilinx.com Connect the GPIO outputs from the individual CPUs for the timers to the GIC. Signed-off-by: Peter Crosthwaite --- hw/arm/xlnx-zynqmp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 9465185..29954f5 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -19,9 +19,17 @@ #define GIC_NUM_SPI_INTR 128 +#define ARM_PHYS_TIMER_PPI 30 +#define ARM_VIRT_TIMER_PPI 27 + #define GIC_DIST_ADDR 0xf9010000 #define GIC_CPU_ADDR 0xf9020000 +static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index) +{ + return GIC_NUM_SPI_INTR + cpu_nr * 32 + ppi_index; +} + static void xlnx_zynqmp_init(Object *obj) { XlnxZynqMPState *s = XLNX_ZYNQMP(obj); @@ -60,11 +68,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, GIC_CPU_ADDR); for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) { + qemu_irq irq; + object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); ERR_PROP_CHECK_RETURN(err, errp); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gic), i, qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_IRQ)); + irq = qdev_get_gpio_in(DEVICE(&s->gic), + arm_gic_ppi_index(i, ARM_PHYS_TIMER_PPI)); + qdev_connect_gpio_out(DEVICE(&s->cpu[i]), 0, irq); + irq = qdev_get_gpio_in(DEVICE(&s->gic), + arm_gic_ppi_index(i, ARM_VIRT_TIMER_PPI)); + qdev_connect_gpio_out(DEVICE(&s->cpu[i]), 1, irq); } } -- 2.3.1.2.g90df61e.dirty