From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54106) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhXsj-0002HL-2a for qemu-devel@nongnu.org; Wed, 07 Sep 2016 04:06:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bhXse-0000tq-Sv for qemu-devel@nongnu.org; Wed, 07 Sep 2016 04:06:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50562) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhXse-0000tm-N5 for qemu-devel@nongnu.org; Wed, 07 Sep 2016 04:06:48 -0400 References: <1472736127-18137-1-git-send-email-marcel@redhat.com> <6c9103e7-70ad-55c6-5533-d6d9bbaa39b4@redhat.com> <739af9d6-2382-c4bd-679d-87b153124491@redhat.com> <1473229310.28663.14.camel@redhat.com> From: Marcel Apfelbaum Message-ID: Date: Wed, 7 Sep 2016 11:06:45 +0300 MIME-Version: 1.0 In-Reply-To: <1473229310.28663.14.camel@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH RFC] docs: add PCIe devices placement guidelines List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann , Laszlo Ersek Cc: qemu-devel@nongnu.org, mst@redhat.com, Peter Maydell , Drew Jones , Laine Stump , Andrea Bolognani , Alex Williamson On 09/07/2016 09:21 AM, Gerd Hoffmann wrote: > Hi, > >>>> ports, if that's allowed). For example: >>>> >>>> - 1-32 ports needed: use root ports only >>>> >>>> - 33-64 ports needed: use 31 root ports, and one switch with 2-32 >>>> downstream ports > > I expect you rarely need any switches. You can go multifunction with > the pcie root ports. Which is how physical q35 works too btw, typically > the root ports are on slot 1c for intel chipsets: > > nilsson root ~# lspci -s1c > 00:1c.0 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset > Family PCI Express Root Port 1 (rev c4) > 00:1c.1 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset > Family PCI Express Root Port 2 (rev c4) > 00:1c.2 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset > Family PCI Express Root Port 3 (rev c4) > > Root bus has 32 slots, a few are taken (host bridge @ 00.0, lpc+sata @ > 1f.*, pci bridge @ 1e.0, maybe vga @ 01.0), leaving 28 free slots. With > 8 functions each you can have up to 224 root ports without any switches, > and you have not many pci bus numbers left until you hit the 256 busses > limit ... > Good point, maybe libvirt can avoid adding switches unless the user explicitly asked for them. I checked and it a actually works fine in QEMU. BTW, when we will implement ARI we can have up to 256 Root Ports on a single slot... Thanks, Marcel > cheers, > Gerd >