* [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz
@ 2019-03-21 8:07 ` Yannick Fertré
0 siblings, 0 replies; 5+ messages in thread
From: Yannick Fertré @ 2019-03-21 8:07 UTC (permalink / raw)
To: Yannick Fertre, Philippe Cornu, Thierry Reding, David Airlie,
Daniel Vetter, dri-devel, linux-kernel, linux-stm32
The panel does not support clock frequency over 30.74 Mhz.
The clock rate has been reduced to 29.70 Mhz & new timings have
been computed to get a framerate of 50fps.
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
---
drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
index 87fa316..f715bbe 100644
--- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
+++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
@@ -67,15 +67,15 @@ struct otm8009a {
};
static const struct drm_display_mode default_mode = {
- .clock = 32729,
+ .clock = 29700,
.hdisplay = 480,
- .hsync_start = 480 + 120,
- .hsync_end = 480 + 120 + 63,
- .htotal = 480 + 120 + 63 + 120,
+ .hsync_start = 480 + 98,
+ .hsync_end = 480 + 98 + 32,
+ .htotal = 480 + 98 + 32 + 98,
.vdisplay = 800,
- .vsync_start = 800 + 12,
- .vsync_end = 800 + 12 + 12,
- .vtotal = 800 + 12 + 12 + 12,
+ .vsync_start = 800 + 15,
+ .vsync_end = 800 + 15 + 10,
+ .vtotal = 800 + 15 + 10 + 14,
.vrefresh = 50,
.flags = 0,
.width_mm = 52,
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz
@ 2019-03-21 8:07 ` Yannick Fertré
0 siblings, 0 replies; 5+ messages in thread
From: Yannick Fertré @ 2019-03-21 8:07 UTC (permalink / raw)
To: Yannick Fertre, Philippe Cornu, Thierry Reding, David Airlie,
Daniel Vetter, dri-devel, linux-kernel, linux-stm32
The panel does not support clock frequency over 30.74 Mhz.
The clock rate has been reduced to 29.70 Mhz & new timings have
been computed to get a framerate of 50fps.
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
---
drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
index 87fa316..f715bbe 100644
--- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
+++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
@@ -67,15 +67,15 @@ struct otm8009a {
};
static const struct drm_display_mode default_mode = {
- .clock = 32729,
+ .clock = 29700,
.hdisplay = 480,
- .hsync_start = 480 + 120,
- .hsync_end = 480 + 120 + 63,
- .htotal = 480 + 120 + 63 + 120,
+ .hsync_start = 480 + 98,
+ .hsync_end = 480 + 98 + 32,
+ .htotal = 480 + 98 + 32 + 98,
.vdisplay = 800,
- .vsync_start = 800 + 12,
- .vsync_end = 800 + 12 + 12,
- .vtotal = 800 + 12 + 12 + 12,
+ .vsync_start = 800 + 15,
+ .vsync_end = 800 + 15 + 10,
+ .vtotal = 800 + 15 + 10 + 14,
.vrefresh = 50,
.flags = 0,
.width_mm = 52,
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz
2019-03-21 8:07 ` Yannick Fertré
@ 2019-03-26 12:50 ` Philippe CORNU
-1 siblings, 0 replies; 5+ messages in thread
From: Philippe CORNU @ 2019-03-26 12:50 UTC (permalink / raw)
To: Yannick FERTRE, Thierry Reding, David Airlie, Daniel Vetter,
dri-devel, linux-kernel, linux-stm32
Dear Yannick,
Many thanks for your patch.
Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
Tested-by: Philippe Cornu <philippe.cornu@st.com>
Philippe :-)
On 3/21/19 9:07 AM, Yannick Fertré wrote:
> The panel does not support clock frequency over 30.74 Mhz.
> The clock rate has been reduced to 29.70 Mhz & new timings have
> been computed to get a framerate of 50fps.
>
> Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
> ---
> drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> index 87fa316..f715bbe 100644
> --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> @@ -67,15 +67,15 @@ struct otm8009a {
> };
>
> static const struct drm_display_mode default_mode = {
> - .clock = 32729,
> + .clock = 29700,
> .hdisplay = 480,
> - .hsync_start = 480 + 120,
> - .hsync_end = 480 + 120 + 63,
> - .htotal = 480 + 120 + 63 + 120,
> + .hsync_start = 480 + 98,
> + .hsync_end = 480 + 98 + 32,
> + .htotal = 480 + 98 + 32 + 98,
> .vdisplay = 800,
> - .vsync_start = 800 + 12,
> - .vsync_end = 800 + 12 + 12,
> - .vtotal = 800 + 12 + 12 + 12,
> + .vsync_start = 800 + 15,
> + .vsync_end = 800 + 15 + 10,
> + .vtotal = 800 + 15 + 10 + 14,
> .vrefresh = 50,
> .flags = 0,
> .width_mm = 52,
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz
@ 2019-03-26 12:50 ` Philippe CORNU
0 siblings, 0 replies; 5+ messages in thread
From: Philippe CORNU @ 2019-03-26 12:50 UTC (permalink / raw)
To: Yannick FERTRE, Thierry Reding, David Airlie, Daniel Vetter,
dri-devel, linux-kernel, linux-stm32
Dear Yannick,
Many thanks for your patch.
Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
Tested-by: Philippe Cornu <philippe.cornu@st.com>
Philippe :-)
On 3/21/19 9:07 AM, Yannick Fertré wrote:
> The panel does not support clock frequency over 30.74 Mhz.
> The clock rate has been reduced to 29.70 Mhz & new timings have
> been computed to get a framerate of 50fps.
>
> Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
> ---
> drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> index 87fa316..f715bbe 100644
> --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c
> @@ -67,15 +67,15 @@ struct otm8009a {
> };
>
> static const struct drm_display_mode default_mode = {
> - .clock = 32729,
> + .clock = 29700,
> .hdisplay = 480,
> - .hsync_start = 480 + 120,
> - .hsync_end = 480 + 120 + 63,
> - .htotal = 480 + 120 + 63 + 120,
> + .hsync_start = 480 + 98,
> + .hsync_end = 480 + 98 + 32,
> + .htotal = 480 + 98 + 32 + 98,
> .vdisplay = 800,
> - .vsync_start = 800 + 12,
> - .vsync_end = 800 + 12 + 12,
> - .vtotal = 800 + 12 + 12 + 12,
> + .vsync_start = 800 + 15,
> + .vsync_end = 800 + 15 + 10,
> + .vtotal = 800 + 15 + 10 + 14,
> .vrefresh = 50,
> .flags = 0,
> .width_mm = 52,
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz
2019-03-21 8:07 ` Yannick Fertré
(?)
(?)
@ 2019-04-03 16:25 ` Thierry Reding
-1 siblings, 0 replies; 5+ messages in thread
From: Thierry Reding @ 2019-04-03 16:25 UTC (permalink / raw)
To: Yannick Fertré
Cc: Philippe Cornu, David Airlie, Daniel Vetter, dri-devel,
linux-kernel, linux-stm32
[-- Attachment #1: Type: text/plain, Size: 466 bytes --]
On Thu, Mar 21, 2019 at 09:07:26AM +0100, Yannick Fertré wrote:
> The panel does not support clock frequency over 30.74 Mhz.
> The clock rate has been reduced to 29.70 Mhz & new timings have
> been computed to get a framerate of 50fps.
>
> Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
> ---
> drivers/gpu/drm/panel/panel-orisetech-otm8009a.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
Applied, thanks.
Thierry
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-04-03 16:25 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-21 8:07 [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz Yannick Fertré
2019-03-21 8:07 ` Yannick Fertré
2019-03-26 12:50 ` Philippe CORNU
2019-03-26 12:50 ` Philippe CORNU
2019-04-03 16:25 ` Thierry Reding
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