Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section

["Souza, Jose" <jose.souza@intel.com>]

Hi Greg

Anything is missing to have this merged for 5.2.8?


On Tue, 2019-08-06 at 10:44 +0300, Jani Nikula wrote:
> On Mon, 05 Aug 2019, José Roberto de Souza <jose.souza@intel.com>
> wrote:
> > From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > 
> 
> commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.
> 
> > A single 32-bit PSR2 training pattern field follows the sixteen
> > element
> > array of PSR table entries in the VBT spec. But, we incorrectly
> > define
> > this PSR2 field for each of the PSR table entries. As a result, the
> > PSR1
> > training pattern duration for any panel_type != 0 will be parsed
> > incorrectly. Secondly, PSR2 training pattern durations for VBTs
> > with bdb
> > version >= 226 will also be wrong.
> > 
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: stable@vger.kernel.org
> > Cc: stable@vger.kernel.org #v5.2
> > Fixes: 88a0d9606aff ("drm/i915/vbt: Parse and use the new field
> > with PSR2 TP2/3 wakeup time")
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
> > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Tested-by: François Guerraz <kubrick@fgv6.net>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Link: 
> > https://patchwork.freedesktop.org/patch/msgid/20190717223451.2595-1-dhinakaran.pandiyan@intel.com
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > (cherry picked from commit
> > 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6)
> > ---
> > 
> > Sending it for Dhinakaran, let me know if something is wrong.
> > 
> >  drivers/gpu/drm/i915/intel_bios.c     | 2 +-
> >  drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
> >  2 files changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c
> > b/drivers/gpu/drm/i915/intel_bios.c
> > index 1dc8d03ff127..ee6fa75d65a2 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv,
> > const struct bdb_header *bdb)
> >  	}
> >  
> >  	if (bdb->version >= 226) {
> > -		u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
> > +		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
> >  
> >  		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
> >  		switch (wakeup_time) {
> > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > index fdbbb9a53804..796c070bbe6f 100644
> > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> > @@ -772,13 +772,13 @@ struct psr_table {
> >  	/* TP wake up time in multiple of 100 */
> >  	u16 tp1_wakeup_time;
> >  	u16 tp2_tp3_wakeup_time;
> > -
> > -	/* PSR2 TP2/TP3 wakeup time for 16 panels */
> > -	u32 psr2_tp2_tp3_wakeup_time;
> >  } __packed;
> >  
> >  struct bdb_psr {
> >  	struct psr_table psr_table[16];
> > +
> > +	/* PSR2 TP2/TP3 wakeup time for 16 panels */
> > +	u32 psr2_tp2_tp3_wakeup_time;
> >  } __packed;
> >  
> >  /*