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From: Dave Hansen <dave.hansen@intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
	"Luck, Tony" <tony.luck@intel.com>
Cc: "Schofield, Alison" <alison.schofield@intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>, Borislav Petkov <bp@alien8.de>,
	"x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Tim Chen <tim.c.chen@linux.intel.com>,
	"H. Peter Anvin" <hpa@linux.intel.com>,
	David Rientjes <rientjes@google.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Prarit Bhargava <prarit@redhat.com>,
	"brice.goglin@gmail.com" <brice.goglin@gmail.com>
Subject: Re: [PATCH] x86, sched: Allow NUMA nodes to share an LLC on Intel platforms
Date: Wed, 10 Feb 2021 09:41:55 -0800	[thread overview]
Message-ID: <aa1c9908-999f-7a84-300e-48122076a4da@intel.com> (raw)
In-Reply-To: <YCOU+1GT4+hxqH5/@hirez.programming.kicks-ass.net>

On 2/10/21 12:10 AM, Peter Zijlstra wrote:
> On Tue, Feb 09, 2021 at 11:09:27PM +0000, Luck, Tony wrote:
>>> +#define X86_BUG_NUMA_SHARES_LLC		X86_BUG(25) /* CPU may enumerate an LLC shared by multiple NUMA nodes */
>>
>> During internal review I wondered why this is a "BUG" rather than a "FEATURE" bit.
>>
>> Apparently, the suggestion for "BUG" came from earlier community discussions.
>>
>> Historically it may have seemed reasonable to say that a cache cannot span
>> NUMA domains. But with more and more things moving off the motherboard
>> and into the socket, this doesn't seem too weird now.
> 
> If you look at the details this SNC LLC span doesn't behave quite right
> either.

Yes, the rules are weird.  I came to the conclusion that there's no
precise way to enumerate these rules with the existing CPUID-based cache
enumeration.

I can send you my powerpoint slides. ;)

> It really isn't a regular cache, but behaves a bit like a mash-up of the
> s390 book caches and a normal LLC.
> 
> Did anybody play with adding the book domain to these SNC
> configurations?

Nope.  Probably mostly because we don't have a great way of generating it.

For those playing along at home, I think Peter is talking about this:

static struct sched_domain_topology_level s390_topology[] = {
        { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
        { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
        { cpu_book_mask, SD_INIT_NAME(BOOK) },
        { cpu_drawer_mask, SD_INIT_NAME(DRAWER) },
        { cpu_cpu_mask, SD_INIT_NAME(DIE) },
        { NULL, },
};

From arch/s390/kernel/topology.c

> Can we detect SNC other than by this quirk?

I'm sure there's _a_ way, but nothing that's architectural.  The kernel
has literally been given all the information about the topology that it
needs from the CPU and the firmware.  The problem is that that
information resembles garbage that the kernel has been presented with in
the past.

I guess you're saying that it would be nice to have some other bit of
info that the kernel can use to boost its confidence that the
hardware/bios are being sane.

  reply	other threads:[~2021-02-10 17:42 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-09 22:39 [PATCH] x86, sched: Allow NUMA nodes to share an LLC on Intel platforms Alison Schofield
2021-02-09 23:09 ` Luck, Tony
2021-02-10  8:10   ` Peter Zijlstra
2021-02-10 17:41     ` Dave Hansen [this message]
2021-02-10  8:05 ` Peter Zijlstra
2021-02-10 15:22   ` Dave Hansen
2021-02-10 19:38     ` Peter Zijlstra
2021-02-10 22:11       ` Alison Schofield
2021-02-16 11:29         ` Peter Zijlstra
2021-02-16 19:53           ` Alison Schofield

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