From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xgmyF46P6zDq66 for ; Mon, 28 Aug 2017 19:42:13 +1000 (AEST) Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7S9dZeK053242 for ; Mon, 28 Aug 2017 05:42:10 -0400 Received: from e06smtp11.uk.ibm.com (e06smtp11.uk.ibm.com [195.75.94.107]) by mx0b-001b2d01.pphosted.com with ESMTP id 2cm9ubhgxg-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 28 Aug 2017 05:42:09 -0400 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 28 Aug 2017 10:42:08 +0100 Subject: Re: [PATCH] cxl: Set the valid bit in PE for dedicated mode To: Vaibhav Jain , linuxppc-dev@lists.ozlabs.org Cc: Andrew Donnellan , Christophe Lombard , Philippe Bergheaud , "Alastair D'Silva" References: <20170828041522.32188-1-vaibhav@linux.vnet.ibm.com> From: Frederic Barrat Date: Mon, 28 Aug 2017 11:42:03 +0200 MIME-Version: 1.0 In-Reply-To: <20170828041522.32188-1-vaibhav@linux.vnet.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Message-Id: List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Le 28/08/2017 à 06:15, Vaibhav Jain a écrit : > Make sure to set the valid-bit in software-state field of the > populated PE. This was earlier missing for dedicated mode AFUs, hence > was causing a PSL freeze when the AFU was activated. > > Signed-off-by: Vaibhav Jain > --- Acked-by: Frederic Barrat Thanks! > drivers/misc/cxl/native.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c > index 4a82c313cf71..0e748c682ee9 100644 > --- a/drivers/misc/cxl/native.c > +++ b/drivers/misc/cxl/native.c > @@ -897,6 +897,10 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr) > if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) > afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); > > + ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V); > + /* Make sure the changes to the PE are visible to the card */ > + smp_wmb(); > + > result = cxl_ops->afu_reset(afu); > if (result) > return result; >