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Subject: Re: [PATCH v2] LoongArch: Clean useless vcsr in loongarch_fpu.
From: Xi Ruoyao <xry111@xry111.site>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: WANG Xuerui <kernel@xen0n.name>, Qi Hu <huqi@loongson.cn>, Jiaxun Yang
	 <jiaxun.yang@flygoat.com>, loongarch@lists.linux.dev, LKML
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Date: Wed, 06 Jul 2022 10:51:20 +0800
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On Wed, 2022-07-06 at 10:35 +0800, Huacai Chen wrote:

> Maybe Xuerui and Ruoyao have some misunderstanding. LSX/LASX will
> surely be upstream, this has nothing to do with cleanup VCSR16.
> Because FP/LSX/LASX share the same control bits in FCSR now.

My guess:

Almost all behavior of vector unit is controlled by FCSR (for example,
the rounding of both FPU and vector unit should be controlled by FCSR
altogether), except one bit similar to the bit 24 of MSACSR ("flush to
zero") is in VCSR [^1].  And "flush to zero" is not really useful so it
will be removed in 3A6000, and we'll not use it for 3A5000.

[^1]: A more bold guess: the hardware engineers could have just said
"let's wire this register called MSACSR in GS464V as FCSR16/VCSR in
LA464, maybe it will be useful and who knows?"  But now in practice it's
not useful.

Am I correct?


--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University