From: Lorenzo Bianconi <lorenzo@kernel.org> To: netdev@vger.kernel.org Cc: nbd@nbd.name, john@phrozen.org, sean.wang@mediatek.com, Mark-MC.Lee@mediatek.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, Sam.Shih@mediatek.com, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, lorenzo.bianconi@redhat.com Subject: [PATCH v3 net-next 02/16] dt-bindings: net: mediatek,net: add mt7986-eth binding Date: Fri, 20 May 2022 20:11:25 +0200 [thread overview] Message-ID: <ac939187e5953713703102bad1709b2639473d21.1653069056.git.lorenzo@kernel.org> (raw) In-Reply-To: <cover.1653069056.git.lorenzo@kernel.org> Introduce dts bindings for mt7986 soc in mediatek,net.yaml. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> --- .../devicetree/bindings/net/mediatek,net.yaml | 141 +++++++++++++++++- 1 file changed, 139 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index 43cc4024ef98..699164dd1295 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -21,6 +21,7 @@ properties: - mediatek,mt7623-eth - mediatek,mt7622-eth - mediatek,mt7629-eth + - mediatek,mt7986-eth - ralink,rt5350-eth reg: @@ -28,7 +29,7 @@ properties: interrupts: minItems: 3 - maxItems: 3 + maxItems: 4 power-domains: maxItems: 1 @@ -88,6 +89,9 @@ allOf: - mediatek,mt7623-eth then: properties: + interrupts: + maxItems: 3 + clocks: minItems: 4 maxItems: 4 @@ -112,6 +116,9 @@ allOf: const: mediatek,mt7622-eth then: properties: + interrupts: + maxItems: 3 + clocks: minItems: 11 maxItems: 11 @@ -155,6 +162,9 @@ allOf: const: mediatek,mt7629-eth then: properties: + interrupts: + maxItems: 3 + clocks: minItems: 17 maxItems: 17 @@ -189,6 +199,42 @@ allOf: minItems: 2 maxItems: 2 + - if: + properties: + compatible: + contains: + const: mediatek,mt7986-eth + then: + properties: + interrupts: + minItems: 4 + + clocks: + minItems: 15 + maxItems: 15 + + clock-names: + items: + - const: fe + - const: gp2 + - const: gp1 + - const: wocpu1 + - const: wocpu0 + - const: sgmii_tx250m + - const: sgmii_rx250m + - const: sgmii_cdr_ref + - const: sgmii_cdr_fb + - const: sgmii2_tx250m + - const: sgmii2_rx250m + - const: sgmii2_cdr_ref + - const: sgmii2_cdr_fb + - const: netsys0 + - const: netsys1 + + mediatek,sgmiisys: + minItems: 2 + maxItems: 2 + patternProperties: "^mac@[0-1]$": type: object @@ -219,7 +265,6 @@ required: - interrupts - clocks - clock-names - - power-domains - mediatek,ethsys unevaluatedProperties: false @@ -295,3 +340,95 @@ examples: }; }; }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/mt7622-clk.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + eth: ethernet@15100000 { + #define CLK_ETH_FE_EN 0 + #define CLK_ETH_WOCPU1_EN 3 + #define CLK_ETH_WOCPU0_EN 4 + #define CLK_TOP_NETSYS_SEL 43 + #define CLK_TOP_NETSYS_500M_SEL 44 + #define CLK_TOP_NETSYS_2X_SEL 46 + #define CLK_TOP_SGM_325M_SEL 47 + #define CLK_APMIXED_NET2PLL 1 + #define CLK_APMIXED_SGMPLL 3 + + compatible = "mediatek,mt7986-eth"; + reg = <0 0x15100000 0 0x80000>; + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; + clocks = <ðsys CLK_ETH_FE_EN>, + <ðsys CLK_ETH_GP2_EN>, + <ðsys CLK_ETH_GP1_EN>, + <ðsys CLK_ETH_WOCPU1_EN>, + <ðsys CLK_ETH_WOCPU0_EN>, + <&sgmiisys0 CLK_SGMII_TX250M_EN>, + <&sgmiisys0 CLK_SGMII_RX250M_EN>, + <&sgmiisys0 CLK_SGMII_CDR_REF>, + <&sgmiisys0 CLK_SGMII_CDR_FB>, + <&sgmiisys1 CLK_SGMII_TX250M_EN>, + <&sgmiisys1 CLK_SGMII_RX250M_EN>, + <&sgmiisys1 CLK_SGMII_CDR_REF>, + <&sgmiisys1 CLK_SGMII_CDR_FB>, + <&topckgen CLK_TOP_NETSYS_SEL>, + <&topckgen CLK_TOP_NETSYS_SEL>; + clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0", + "sgmii_tx250m", "sgmii_rx250m", + "sgmii_cdr_ref", "sgmii_cdr_fb", + "sgmii2_tx250m", "sgmii2_rx250m", + "sgmii2_cdr_ref", "sgmii2_cdr_fb", + "netsys0", "netsys1"; + mediatek,ethsys = <ðsys>; + mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; + assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, + <&topckgen CLK_TOP_SGM_325M_SEL>; + assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, + <&apmixedsys CLK_APMIXED_SGMPLL>; + + #address-cells = <1>; + #size-cells = <0>; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + phy5: ethernet-phy@0 { + compatible = "ethernet-phy-id67c9.de0a"; + phy-mode = "2500base-x"; + reset-gpios = <&pio 6 1>; + reset-deassert-us = <20000>; + reg = <5>; + }; + + phy6: ethernet-phy@1 { + compatible = "ethernet-phy-id67c9.de0a"; + phy-mode = "2500base-x"; + reg = <6>; + }; + }; + + mac0: mac@0 { + compatible = "mediatek,eth-mac"; + phy-mode = "2500base-x"; + phy-handle = <&phy5>; + reg = <0>; + }; + + mac1: mac@1 { + compatible = "mediatek,eth-mac"; + phy-mode = "2500base-x"; + phy-handle = <&phy6>; + reg = <1>; + }; + }; + }; -- 2.35.3
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Bianconi <lorenzo@kernel.org> To: netdev@vger.kernel.org Cc: nbd@nbd.name, john@phrozen.org, sean.wang@mediatek.com, Mark-MC.Lee@mediatek.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, Sam.Shih@mediatek.com, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, lorenzo.bianconi@redhat.com Subject: [PATCH v3 net-next 02/16] dt-bindings: net: mediatek, net: add mt7986-eth binding Date: Fri, 20 May 2022 20:11:25 +0200 [thread overview] Message-ID: <ac939187e5953713703102bad1709b2639473d21.1653069056.git.lorenzo@kernel.org> (raw) In-Reply-To: <cover.1653069056.git.lorenzo@kernel.org> Introduce dts bindings for mt7986 soc in mediatek,net.yaml. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> --- .../devicetree/bindings/net/mediatek,net.yaml | 141 +++++++++++++++++- 1 file changed, 139 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index 43cc4024ef98..699164dd1295 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -21,6 +21,7 @@ properties: - mediatek,mt7623-eth - mediatek,mt7622-eth - mediatek,mt7629-eth + - mediatek,mt7986-eth - ralink,rt5350-eth reg: @@ -28,7 +29,7 @@ properties: interrupts: minItems: 3 - maxItems: 3 + maxItems: 4 power-domains: maxItems: 1 @@ -88,6 +89,9 @@ allOf: - mediatek,mt7623-eth then: properties: + interrupts: + maxItems: 3 + clocks: minItems: 4 maxItems: 4 @@ -112,6 +116,9 @@ allOf: const: mediatek,mt7622-eth then: properties: + interrupts: + maxItems: 3 + clocks: minItems: 11 maxItems: 11 @@ -155,6 +162,9 @@ allOf: const: mediatek,mt7629-eth then: properties: + interrupts: + maxItems: 3 + clocks: minItems: 17 maxItems: 17 @@ -189,6 +199,42 @@ allOf: minItems: 2 maxItems: 2 + - if: + properties: + compatible: + contains: + const: mediatek,mt7986-eth + then: + properties: + interrupts: + minItems: 4 + + clocks: + minItems: 15 + maxItems: 15 + + clock-names: + items: + - const: fe + - const: gp2 + - const: gp1 + - const: wocpu1 + - const: wocpu0 + - const: sgmii_tx250m + - const: sgmii_rx250m + - const: sgmii_cdr_ref + - const: sgmii_cdr_fb + - const: sgmii2_tx250m + - const: sgmii2_rx250m + - const: sgmii2_cdr_ref + - const: sgmii2_cdr_fb + - const: netsys0 + - const: netsys1 + + mediatek,sgmiisys: + minItems: 2 + maxItems: 2 + patternProperties: "^mac@[0-1]$": type: object @@ -219,7 +265,6 @@ required: - interrupts - clocks - clock-names - - power-domains - mediatek,ethsys unevaluatedProperties: false @@ -295,3 +340,95 @@ examples: }; }; }; + + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/clock/mt7622-clk.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + eth: ethernet@15100000 { + #define CLK_ETH_FE_EN 0 + #define CLK_ETH_WOCPU1_EN 3 + #define CLK_ETH_WOCPU0_EN 4 + #define CLK_TOP_NETSYS_SEL 43 + #define CLK_TOP_NETSYS_500M_SEL 44 + #define CLK_TOP_NETSYS_2X_SEL 46 + #define CLK_TOP_SGM_325M_SEL 47 + #define CLK_APMIXED_NET2PLL 1 + #define CLK_APMIXED_SGMPLL 3 + + compatible = "mediatek,mt7986-eth"; + reg = <0 0x15100000 0 0x80000>; + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; + clocks = <ðsys CLK_ETH_FE_EN>, + <ðsys CLK_ETH_GP2_EN>, + <ðsys CLK_ETH_GP1_EN>, + <ðsys CLK_ETH_WOCPU1_EN>, + <ðsys CLK_ETH_WOCPU0_EN>, + <&sgmiisys0 CLK_SGMII_TX250M_EN>, + <&sgmiisys0 CLK_SGMII_RX250M_EN>, + <&sgmiisys0 CLK_SGMII_CDR_REF>, + <&sgmiisys0 CLK_SGMII_CDR_FB>, + <&sgmiisys1 CLK_SGMII_TX250M_EN>, + <&sgmiisys1 CLK_SGMII_RX250M_EN>, + <&sgmiisys1 CLK_SGMII_CDR_REF>, + <&sgmiisys1 CLK_SGMII_CDR_FB>, + <&topckgen CLK_TOP_NETSYS_SEL>, + <&topckgen CLK_TOP_NETSYS_SEL>; + clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0", + "sgmii_tx250m", "sgmii_rx250m", + "sgmii_cdr_ref", "sgmii_cdr_fb", + "sgmii2_tx250m", "sgmii2_rx250m", + "sgmii2_cdr_ref", "sgmii2_cdr_fb", + "netsys0", "netsys1"; + mediatek,ethsys = <ðsys>; + mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; + assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>, + <&topckgen CLK_TOP_SGM_325M_SEL>; + assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>, + <&apmixedsys CLK_APMIXED_SGMPLL>; + + #address-cells = <1>; + #size-cells = <0>; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + phy5: ethernet-phy@0 { + compatible = "ethernet-phy-id67c9.de0a"; + phy-mode = "2500base-x"; + reset-gpios = <&pio 6 1>; + reset-deassert-us = <20000>; + reg = <5>; + }; + + phy6: ethernet-phy@1 { + compatible = "ethernet-phy-id67c9.de0a"; + phy-mode = "2500base-x"; + reg = <6>; + }; + }; + + mac0: mac@0 { + compatible = "mediatek,eth-mac"; + phy-mode = "2500base-x"; + phy-handle = <&phy5>; + reg = <0>; + }; + + mac1: mac@1 { + compatible = "mediatek,eth-mac"; + phy-mode = "2500base-x"; + phy-handle = <&phy6>; + reg = <1>; + }; + }; + }; -- 2.35.3 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek
next prev parent reply other threads:[~2022-05-20 18:12 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-20 18:11 [PATCH v3 net-next 00/16] introduce mt7986 ethernet support Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 01/16] arm64: dts: mediatek: mt7986: introduce ethernet nodes Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi [this message] 2022-05-20 18:11 ` [PATCH v3 net-next 02/16] dt-bindings: net: mediatek, net: add mt7986-eth binding Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 03/16] net: ethernet: mtk_eth_soc: rely on GFP_KERNEL for dma_alloc_coherent whenever possible Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 04/16] net: ethernet: mtk_eth_soc: move tx dma desc configuration in mtk_tx_set_dma_desc Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 05/16] net: ethernet: mtk_eth_soc: add txd_size to mtk_soc_data Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 06/16] net: ethernet: mtk_eth_soc: rely on txd_size in mtk_tx_alloc/mtk_tx_clean Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 07/16] net: ethernet: mtk_eth_soc: rely on txd_size in mtk_desc_to_tx_buf Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 08/16] net: ethernet: mtk_eth_soc: rely on txd_size in txd_to_idx Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 09/16] net: ethernet: mtk_eth_soc: add rxd_size to mtk_soc_data Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 10/16] net: ethernet: mtk_eth_soc: rely on txd_size field in mtk_poll_tx/mtk_poll_rx Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 11/16] net: ethernet: mtk_eth_soc: rely on rxd_size field in mtk_rx_alloc/mtk_rx_clean Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 12/16] net: ethernet: mtk_eth_soc: introduce device register map Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 13/16] net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 14/16] net: ethernet: mtk_eth_soc: convert ring dma pointer to void Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 15/16] net: ethernet: mtk_eth_soc: convert scratch_ring " Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-20 18:11 ` [PATCH v3 net-next 16/16] net: ethernet: mtk_eth_soc: introduce support for mt7986 chipset Lorenzo Bianconi 2022-05-20 18:11 ` Lorenzo Bianconi 2022-05-21 1:25 ` [PATCH v3 net-next 00/16] introduce mt7986 ethernet support Jakub Kicinski 2022-05-21 1:25 ` Jakub Kicinski
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