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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PULL 00/32] target-arm queue
Date: Mon, 9 May 2022 11:06:34 -0700	[thread overview]
Message-ID: <ad435909-26ad-37c8-1a45-a44d2a69ccee@linaro.org> (raw)
In-Reply-To: <20220509115848.3521805-1-peter.maydell@linaro.org>

On 5/9/22 06:58, Peter Maydell wrote:
> target-arm queue: the big stuff here is the final part of
> rth's patches for Cortex-A76 and Neoverse-N1 support;
> also present are Gavin's NUMA series and a few other things.
> 
> thanks
> -- PMM
> 
> The following changes since commit 554623226f800acf48a2ed568900c1c968ec9a8b:
> 
>    Merge tag 'qemu-sparc-20220508' of https://github.com/mcayland/qemu into staging (2022-05-08 17:03:26 -0500)
> 
> are available in the Git repository at:
> 
>    https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220509
> 
> for you to fetch changes up to ae9141d4a3265553503bf07d3574b40f84615a34:
> 
>    hw/acpi/aml-build: Use existing CPU topology to build PPTT table (2022-05-09 11:47:55 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * MAINTAINERS/.mailmap: update email for Leif Lindholm
>   * hw/arm: add version information to sbsa-ref machine DT
>   * Enable new features for -cpu max:
>     FEAT_Debugv8p2, FEAT_Debugv8p4, FEAT_RAS (minimal version only),
>     FEAT_IESB, FEAT_CSV2, FEAT_CSV2_2, FEAT_CSV3, FEAT_DGH
>   * Emulate Cortex-A76
>   * Emulate Neoverse-N1
>   * Fix the virt board default NUMA topology

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.


r~


> 
> ----------------------------------------------------------------
> Gavin Shan (6):
>        qapi/machine.json: Add cluster-id
>        qtest/numa-test: Specify CPU topology in aarch64_numa_cpu()
>        hw/arm/virt: Consider SMP configuration in CPU topology
>        qtest/numa-test: Correct CPU and NUMA association in aarch64_numa_cpu()
>        hw/arm/virt: Fix CPU's default NUMA node ID
>        hw/acpi/aml-build: Use existing CPU topology to build PPTT table
> 
> Leif Lindholm (2):
>        MAINTAINERS/.mailmap: update email for Leif Lindholm
>        hw/arm: add versioning to sbsa-ref machine DT
> 
> Richard Henderson (24):
>        target/arm: Handle cpreg registration for missing EL
>        target/arm: Drop EL3 no EL2 fallbacks
>        target/arm: Merge zcr reginfo
>        target/arm: Adjust definition of CONTEXTIDR_EL2
>        target/arm: Move cortex impdef sysregs to cpu_tcg.c
>        target/arm: Update qemu-system-arm -cpu max to cortex-a57
>        target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max
>        target/arm: Split out aa32_max_features
>        target/arm: Annotate arm_max_initfn with FEAT identifiers
>        target/arm: Use field names for manipulating EL2 and EL3 modes
>        target/arm: Enable FEAT_Debugv8p2 for -cpu max
>        target/arm: Enable FEAT_Debugv8p4 for -cpu max
>        target/arm: Add minimal RAS registers
>        target/arm: Enable SCR and HCR bits for RAS
>        target/arm: Implement virtual SError exceptions
>        target/arm: Implement ESB instruction
>        target/arm: Enable FEAT_RAS for -cpu max
>        target/arm: Enable FEAT_IESB for -cpu max
>        target/arm: Enable FEAT_CSV2 for -cpu max
>        target/arm: Enable FEAT_CSV2_2 for -cpu max
>        target/arm: Enable FEAT_CSV3 for -cpu max
>        target/arm: Enable FEAT_DGH for -cpu max
>        target/arm: Define cortex-a76
>        target/arm: Define neoverse-n1
> 
>   docs/system/arm/emulation.rst |  10 +
>   docs/system/arm/virt.rst      |   2 +
>   qapi/machine.json             |   6 +-
>   target/arm/cpregs.h           |  11 +
>   target/arm/cpu.h              |  23 ++
>   target/arm/helper.h           |   1 +
>   target/arm/internals.h        |  16 ++
>   target/arm/syndrome.h         |   5 +
>   target/arm/a32.decode         |  16 +-
>   target/arm/t32.decode         |  18 +-
>   hw/acpi/aml-build.c           | 111 ++++----
>   hw/arm/sbsa-ref.c             |  16 ++
>   hw/arm/virt.c                 |  21 +-
>   hw/core/machine-hmp-cmds.c    |   4 +
>   hw/core/machine.c             |  16 ++
>   target/arm/cpu.c              |  66 ++++-
>   target/arm/cpu64.c            | 353 ++++++++++++++-----------
>   target/arm/cpu_tcg.c          | 227 +++++++++++-----
>   target/arm/helper.c           | 600 +++++++++++++++++++++++++-----------------
>   target/arm/op_helper.c        |  43 +++
>   target/arm/translate-a64.c    |  18 ++
>   target/arm/translate.c        |  23 ++
>   tests/qtest/numa-test.c       |  19 +-
>   .mailmap                      |   3 +-
>   MAINTAINERS                   |   2 +-
>   25 files changed, 1068 insertions(+), 562 deletions(-)
> 



  parent reply	other threads:[~2022-05-09 18:08 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-09 11:58 [PULL 00/32] target-arm queue Peter Maydell
2022-05-09 11:58 ` [PULL 01/32] MAINTAINERS/.mailmap: update email for Leif Lindholm Peter Maydell
2022-05-09 11:58 ` [PULL 02/32] target/arm: Handle cpreg registration for missing EL Peter Maydell
2022-05-09 11:58 ` [PULL 03/32] target/arm: Drop EL3 no EL2 fallbacks Peter Maydell
2022-05-09 11:58 ` [PULL 04/32] target/arm: Merge zcr reginfo Peter Maydell
2022-05-09 11:58 ` [PULL 05/32] target/arm: Adjust definition of CONTEXTIDR_EL2 Peter Maydell
2022-05-09 11:58 ` [PULL 06/32] target/arm: Move cortex impdef sysregs to cpu_tcg.c Peter Maydell
2022-05-09 11:58 ` [PULL 07/32] target/arm: Update qemu-system-arm -cpu max to cortex-a57 Peter Maydell
2022-05-09 11:58 ` [PULL 08/32] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max Peter Maydell
2022-05-09 11:58 ` [PULL 09/32] target/arm: Split out aa32_max_features Peter Maydell
2022-05-09 11:58 ` [PULL 10/32] target/arm: Annotate arm_max_initfn with FEAT identifiers Peter Maydell
2022-05-09 11:58 ` [PULL 11/32] target/arm: Use field names for manipulating EL2 and EL3 modes Peter Maydell
2022-05-09 11:58 ` [PULL 12/32] target/arm: Enable FEAT_Debugv8p2 for -cpu max Peter Maydell
2022-05-09 11:58 ` [PULL 13/32] target/arm: Enable FEAT_Debugv8p4 " Peter Maydell
2022-05-09 11:58 ` [PULL 14/32] target/arm: Add minimal RAS registers Peter Maydell
2022-05-09 11:58 ` [PULL 15/32] target/arm: Enable SCR and HCR bits for RAS Peter Maydell
2022-05-09 11:58 ` [PULL 16/32] target/arm: Implement virtual SError exceptions Peter Maydell
2022-05-09 11:58 ` [PULL 17/32] target/arm: Implement ESB instruction Peter Maydell
2022-05-09 11:58 ` [PULL 18/32] target/arm: Enable FEAT_RAS for -cpu max Peter Maydell
2022-05-09 11:58 ` [PULL 19/32] target/arm: Enable FEAT_IESB " Peter Maydell
2022-05-09 11:58 ` [PULL 20/32] target/arm: Enable FEAT_CSV2 " Peter Maydell
2022-05-09 11:58 ` [PULL 21/32] target/arm: Enable FEAT_CSV2_2 " Peter Maydell
2022-05-09 11:58 ` [PULL 22/32] target/arm: Enable FEAT_CSV3 " Peter Maydell
2022-05-09 11:58 ` [PULL 23/32] target/arm: Enable FEAT_DGH " Peter Maydell
2022-05-09 11:58 ` [PULL 24/32] target/arm: Define cortex-a76 Peter Maydell
2022-05-09 11:58 ` [PULL 25/32] target/arm: Define neoverse-n1 Peter Maydell
2022-05-09 11:58 ` [PULL 26/32] hw/arm: add versioning to sbsa-ref machine DT Peter Maydell
2022-05-09 11:58 ` [PULL 27/32] qapi/machine.json: Add cluster-id Peter Maydell
2022-05-09 11:58 ` [PULL 28/32] qtest/numa-test: Specify CPU topology in aarch64_numa_cpu() Peter Maydell
2022-05-09 11:58 ` [PULL 29/32] hw/arm/virt: Consider SMP configuration in CPU topology Peter Maydell
2022-05-09 11:58 ` [PULL 30/32] qtest/numa-test: Correct CPU and NUMA association in aarch64_numa_cpu() Peter Maydell
2022-05-09 11:58 ` [PULL 31/32] hw/arm/virt: Fix CPU's default NUMA node ID Peter Maydell
2022-05-09 11:58 ` [PULL 32/32] hw/acpi/aml-build: Use existing CPU topology to build PPTT table Peter Maydell
2022-05-09 18:06 ` Richard Henderson [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-01-28 15:29 [PULL 00/32] target-arm queue Peter Maydell
2022-01-29 15:55 ` Peter Maydell

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