From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 2 Apr 2020 21:45:25 +0200 Subject: [PATCH v1 1/2] clk: socfpga: Read the clock parent's register base in probe function In-Reply-To: References: <1583742120-6661-1-git-send-email-chee.hong.ang@intel.com> <1583742120-6661-2-git-send-email-chee.hong.ang@intel.com> <7fa85609-d547-1784-d00a-2812cb6d8ea4@denx.de> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 4/2/20 8:50 PM, Simon Glass wrote: > Hi. Hi, [...] >>>>>>>> I suspect we could change this, so that >>>>>>>> device_ofdata_to_platdata() first calls itself on its parent. >>>>>>>> >>>>>>>> I can think of various reasons why this change might be desirable. >>>>>>> >>>>>>> I think this is how it worked before already. >>>>>> >>>>>> Well effectively, yes, because ofdata and probe were joined together. >>>> >>>>> Simon, do you have plan to fix this DM core issue ? >>>> >>>> I'm not sure it definitely should be changed. But I'll do a patch and >>>> see how it looks. >>> >>> Do I understand it correctly that the patch >>> 82de42fa14682d408da935adfb0f935354c5008f actually completely breaks >>> SoCFPGA ? Then I would say this is a release blocker ? >> Yes. A10 SPL won't boot at all. It crashes during the clock manager setup. > > This came in right at the beginning of the cycle. I thought the > purpose of the 3-month cycle was to allow time to test? It was ... altera ? > I do plan to try out changing the behaviour to read a parent's ofdata > before the child, but I am not comfortable adding such a major change > just before a release. It could have any number of ill effects. > > Can you update the clock driver? E.g. you could move some of the code > from socfpga_a10_ofdata_to_platdata() to a probe() method? Can we revert the patch which broke arria10 instead ? It did work before, so who knows how many other ill side effects there are ... -- Best regards, Marek Vasut