From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77659C4332F for ; Thu, 15 Dec 2022 19:51:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1p5uFy-0007Hy-2l; Thu, 15 Dec 2022 14:51:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p5uFt-0007GH-KB for qemu-devel@nongnu.org; Thu, 15 Dec 2022 14:50:57 -0500 Received: from mail.xen0n.name ([115.28.160.31] helo=mailbox.box.xen0n.name) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1p5uFq-0006ay-Bd for qemu-devel@nongnu.org; Thu, 15 Dec 2022 14:50:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xen0n.name; s=mail; t=1671133841; bh=Rol0tZVcjQZ6je13Is4aejvnbHyaUsP/cF9tFkVVLAk=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=k+iDZ3UqFBpIL4BzishRjCNSrUgug4bLWXvB1Hd8de2hthqL8TUh+iv2WyWlpisIU Dwz6Fr96NyzNqlX/Q+RGUjRxjI1Vui6IqJBr7xoJHSJ3quBFra4AleajadQV931Njj CayotvHLi+X/K5q1zaVISA9FLq6FclKztoyh9dIk= Received: from [192.168.9.172] (unknown [101.88.134.93]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mailbox.box.xen0n.name (Postfix) with ESMTPSA id 725976008C; Fri, 16 Dec 2022 03:50:41 +0800 (CST) Message-ID: Date: Fri, 16 Dec 2022 03:50:40 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:110.0) Gecko/20100101 Firefox/110.0 Thunderbird/110.0a1 Subject: Re: [PATCH 3/8] tcg/loongarch64: Update tcg-insn-defs.c.inc To: Richard Henderson , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , WANG Xuerui Cc: qemu-devel@nongnu.org References: <20221206044051.322543-1-richard.henderson@linaro.org> <20221206044051.322543-4-richard.henderson@linaro.org> Content-Language: en-US From: WANG Xuerui In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=115.28.160.31; envelope-from=i.qemu@xen0n.name; helo=mailbox.box.xen0n.name X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/15/22 23:51, Richard Henderson wrote: > On 12/14/22 23:50, Philippe Mathieu-Daudé wrote: >> On 6/12/22 05:40, Richard Henderson wrote: >>> Regenerate with ADDU16I included. >>> >>> Signed-off-by: Richard Henderson >>> --- >>>   tcg/loongarch64/tcg-insn-defs.c.inc | 10 +++++++++- >>>   1 file changed, 9 insertions(+), 1 deletion(-) >>> >>> diff --git a/tcg/loongarch64/tcg-insn-defs.c.inc >>> b/tcg/loongarch64/tcg-insn-defs.c.inc >>> index d162571856..c3c8669b4b 100644 >>> --- a/tcg/loongarch64/tcg-insn-defs.c.inc >>> +++ b/tcg/loongarch64/tcg-insn-defs.c.inc >>> @@ -4,7 +4,7 @@ >>>    * >>>    * This file is auto-generated by genqemutcgdefs from >>>    * https://github.com/loongson-community/loongarch-opcodes, >>> - * from commit 961f0c60f5b63e574d785995600c71ad5413fdc4. >> >> Odd, addu16i.d is present since 3d057a6, so was already in 961f0c6. > > It wasn't marked "qemu", so the generator didn't emit ... > >>> @@ -74,6 +74,7 @@ typedef enum { >>>       OPC_ANDI = 0x03400000, >>>       OPC_ORI = 0x03800000, >>>       OPC_XORI = 0x03c00000, >>> +    OPC_ADDU16I_D = 0x10000000, >>>       OPC_LU12I_W = 0x14000000, >>>       OPC_CU32I_D = 0x16000000, >>>       OPC_PCADDU2I = 0x18000000, >>> @@ -710,6 +711,13 @@ tcg_out_opc_xori(TCGContext *s, TCGReg d, >>> TCGReg j, uint32_t uk12) >>>       tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12)); >>>   } >>> +/* Emits the `addu16i.d d, j, sk16` instruction.  */ >>> +static void __attribute__((unused)) >>> +tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16) >>> +{ >>> +    tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16)); >>> +} > > ... all this. > Ah. Sorry for the late reply, I've been busy with Gentoo and LLVM mostly these days (apart from the day job more demanding than ever, due to end-of-year and a bit too much slack doing LoongArch work instead ;-). So do you need the addu16i.d marked as @qemu now? I can push the change into loongarch-opcodes tomorrow if so wanted. Of course it's probably better to maintain the used opcodes list in qemu's repo, let me refactor this after I somehow crawl out of the pile of day job...