The HW folks just gave me a few more CPUs not
susceptible to SSB.

Thanks.

Tim

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c3b53bc..9a205aa4 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -930,6 +930,9 @@ static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = {
        { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_CLOVERVIEW },
        { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_CEDARVIEW },
        { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_SILVERMONT1 },
+       { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_SILVERMONT2 },
+       { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_YONAH },
+       { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_MERRIFIELD },
        { X86_VENDOR_INTEL,     6, INTEL_FAM6_ATOM_AIRMONT },
        { X86_VENDOR_INTEL,     6, INTEL_FAM6_XEON_PHI_KNL },
        { X86_VENDOR_INTEL,     6, INTEL_FAM6_XEON_PHI_KNM },