From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7078FCCA47A for ; Thu, 16 Jun 2022 13:22:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376639AbiFPNWi (ORCPT ); Thu, 16 Jun 2022 09:22:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232862AbiFPNWc (ORCPT ); Thu, 16 Jun 2022 09:22:32 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17F2A43486; Thu, 16 Jun 2022 06:22:23 -0700 (PDT) X-UUID: 62ab30d1a28548cfb45cbc62c6664582-20220616 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:3280e293-eeb6-4f0c-8046-fba97e2c6688,OB:0,LO B:0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:5 X-CID-META: VersionHash:b14ad71,CLOUDID:488fc348-4c92-421c-ad91-b806c0f58b2a,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 62ab30d1a28548cfb45cbc62c6664582-20220616 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1138178916; Thu, 16 Jun 2022 21:22:17 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 16 Jun 2022 21:22:16 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Thu, 16 Jun 2022 21:22:16 +0800 Message-ID: Subject: Re: [PATCH v11 01/10] dt-bindings: mediatek,dp: Add Display Port binding From: Rex-BC Chen To: Rob Herring CC: , , , , , , , , , , , , , , , , , , , , , Date: Thu, 16 Jun 2022 21:22:16 +0800 In-Reply-To: <20220614202336.GA2400714-robh@kernel.org> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> <20220610105522.13449-2-rex-bc.chen@mediatek.com> <20220614202336.GA2400714-robh@kernel.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2022-06-14 at 14:23 -0600, Rob Herring wrote: > On Fri, Jun 10, 2022 at 06:55:13PM +0800, Bo-Chen Chen wrote: > > From: Markus Schneider-Pargmann > > > > This controller is present on several mediatek hardware. Currently > > mt8195 and mt8395 have this controller without a functional > > difference, > > so only one compatible field is added. > > > > The controller can have two forms, as a normal display port and as > > an > > embedded display port. > > > > Signed-off-by: Markus Schneider-Pargmann > > Signed-off-by: Guillaume Ranquet > > [Bo-Chen: Fix reviewers' comment] > > Signed-off-by: Bo-Chen Chen > > --- > > .../display/mediatek/mediatek,dp.yaml | 101 > > ++++++++++++++++++ > > 1 file changed, 101 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > new file mode 100644 > > index 000000000000..10f50a0dcf49 > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > @@ -0,0 +1,101 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml*__;Iw!!CTRNKA9wMg0ARbw!yqAl1KhfbHqHN7-5aeqhzqeOVhPU_Z5beko5q-y-s5pcfp1WL5oVGvY5UF4EfWm4PWjc5mjBwyBUMsr_RI45ipbhsw$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!yqAl1KhfbHqHN7-5aeqhzqeOVhPU_Z5beko5q-y-s5pcfp1WL5oVGvY5UF4EfWm4PWjc5mjBwyBUMsr_RI5WzYKENQ$ > > > > + > > +title: MediaTek Display Port Controller > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Jitao shi > > + > > +description: | > > + Device tree bindings for the MediaTek display port and > > + embedded display port controller present on some MediaTek SoCs. > > + > > +properties: > > + compatible: > > + enum: > > + - mediatek,mt8195-dp-tx > > + - mediatek,mt8195-edp-tx > > + > > + reg: > > + maxItems: 1 > > + > > + nvmem-cells: > > + maxItems: 1 > > + description: efuse data for display port calibration > > + > > + nvmem-cell-names: > > + const: dp_calibration_data > > + > > + power-domains: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + ports: > > + $ref: /schemas/graph.yaml#/properties/ports > > + properties: > > + port@0: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Input endpoint of the controller, usually > > dp_intf > > + > > + port@1: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Output endpoint of the controller > > + > > + required: > > + - port@0 > > + - port@1 > > + > > + max-lanes: > > + maxItems: 1 > > + description: maximum number of lanes supported by the > > hardware. > > We already have a 'data-lanes' property defined in > 'video-interfaces.yaml' that can serve this purpose. > Hello Rob, Thanks for review. >From the description of video-interfaces.yaml, I think it's not quite match what we need. We only need this value be one of "1,2,4". Any other suggestion? > > + > > + max-linkrate: > > + maxItems: 1 > > + description: maximum link rate supported by the hardware and > > unit is MHz. > > Then use '-mhz' suffix on the property name. Then you don't need a > type > (or maxItems). OK, I will write like this: max-linkrate-mhz: enum: [ 1620, 2700, 5400, 8100 ] description: maximum link rate supported by the hardware. BRs, Bo-Chen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 281E1C43334 for ; Thu, 16 Jun 2022 13:22:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4312110E0D0; Thu, 16 Jun 2022 13:22:26 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id A9E7F10E0D0 for ; Thu, 16 Jun 2022 13:22:24 +0000 (UTC) X-UUID: 62ab30d1a28548cfb45cbc62c6664582-20220616 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6, REQID:3280e293-eeb6-4f0c-8046-fba97e2c6688, OB:0, LO B:0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:5 X-CID-META: VersionHash:b14ad71, CLOUDID:488fc348-4c92-421c-ad91-b806c0f58b2a, C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 62ab30d1a28548cfb45cbc62c6664582-20220616 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1138178916; Thu, 16 Jun 2022 21:22:17 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 16 Jun 2022 21:22:16 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Thu, 16 Jun 2022 21:22:16 +0800 Message-ID: Subject: Re: [PATCH v11 01/10] dt-bindings: mediatek,dp: Add Display Port binding From: Rex-BC Chen To: Rob Herring Date: Thu, 16 Jun 2022 21:22:16 +0800 In-Reply-To: <20220614202336.GA2400714-robh@kernel.org> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> <20220610105522.13449-2-rex-bc.chen@mediatek.com> <20220614202336.GA2400714-robh@kernel.org> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-fbdev@vger.kernel.org, devicetree@vger.kernel.org, airlied@linux.ie, dri-devel@lists.freedesktop.org, krzysztof.kozlowski+dt@linaro.org, deller@gmx.de, Project_Global_Chrome_Upstream_Group@mediatek.com, wenst@chromium.org, chunkuang.hu@kernel.org, jitao.shi@mediatek.com, tzimmermann@suse.de, msp@baylibre.com, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com, granquet@baylibre.com, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, 2022-06-14 at 14:23 -0600, Rob Herring wrote: > On Fri, Jun 10, 2022 at 06:55:13PM +0800, Bo-Chen Chen wrote: > > From: Markus Schneider-Pargmann > > > > This controller is present on several mediatek hardware. Currently > > mt8195 and mt8395 have this controller without a functional > > difference, > > so only one compatible field is added. > > > > The controller can have two forms, as a normal display port and as > > an > > embedded display port. > > > > Signed-off-by: Markus Schneider-Pargmann > > Signed-off-by: Guillaume Ranquet > > [Bo-Chen: Fix reviewers' comment] > > Signed-off-by: Bo-Chen Chen > > --- > > .../display/mediatek/mediatek,dp.yaml | 101 > > ++++++++++++++++++ > > 1 file changed, 101 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > new file mode 100644 > > index 000000000000..10f50a0dcf49 > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > @@ -0,0 +1,101 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml*__;Iw!!CTRNKA9wMg0ARbw!yqAl1KhfbHqHN7-5aeqhzqeOVhPU_Z5beko5q-y-s5pcfp1WL5oVGvY5UF4EfWm4PWjc5mjBwyBUMsr_RI45ipbhsw$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!yqAl1KhfbHqHN7-5aeqhzqeOVhPU_Z5beko5q-y-s5pcfp1WL5oVGvY5UF4EfWm4PWjc5mjBwyBUMsr_RI5WzYKENQ$ > > > > + > > +title: MediaTek Display Port Controller > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Jitao shi > > + > > +description: | > > + Device tree bindings for the MediaTek display port and > > + embedded display port controller present on some MediaTek SoCs. > > + > > +properties: > > + compatible: > > + enum: > > + - mediatek,mt8195-dp-tx > > + - mediatek,mt8195-edp-tx > > + > > + reg: > > + maxItems: 1 > > + > > + nvmem-cells: > > + maxItems: 1 > > + description: efuse data for display port calibration > > + > > + nvmem-cell-names: > > + const: dp_calibration_data > > + > > + power-domains: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + ports: > > + $ref: /schemas/graph.yaml#/properties/ports > > + properties: > > + port@0: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Input endpoint of the controller, usually > > dp_intf > > + > > + port@1: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Output endpoint of the controller > > + > > + required: > > + - port@0 > > + - port@1 > > + > > + max-lanes: > > + maxItems: 1 > > + description: maximum number of lanes supported by the > > hardware. > > We already have a 'data-lanes' property defined in > 'video-interfaces.yaml' that can serve this purpose. > Hello Rob, Thanks for review. >From the description of video-interfaces.yaml, I think it's not quite match what we need. We only need this value be one of "1,2,4". Any other suggestion? > > + > > + max-linkrate: > > + maxItems: 1 > > + description: maximum link rate supported by the hardware and > > unit is MHz. > > Then use '-mhz' suffix on the property name. Then you don't need a > type > (or maxItems). OK, I will write like this: max-linkrate-mhz: enum: [ 1620, 2700, 5400, 8100 ] description: maximum link rate supported by the hardware. BRs, Bo-Chen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4833C43334 for ; Thu, 16 Jun 2022 13:23:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mk2d7KPCi03jgshJo0uEuCL7/5CGG+y9hooJkTpre5o=; b=RWhkYSPs1sLaXV GTPbRmDyJrsy91H1D6nS3WoaOJJXEjs4vwJO2b32VMo/BPP6m9XYbAixPlw2w0U89POUcYN4vMmQy /JUDyDehtCMcqAo6j/Q/U3Z3QriwGsTdBLqiWcGznUi6e4wxaohNYYh/TBXIeVTT6VgCNshpJrAiq PqQAHxQTMQ3g5Jg8sfd5LmHmSUBDnHGVaHPYJldgtg006Tjn3dd5Gp6OEWfGEnFTMgHIHndDGwHdi 8lorGIhZBVC45pNLizq+1IUdhxLKn8uAVWxDkJGZD3+GcIy3rKAKcimGPMqedYfy7OtxwXdNJPUfY gYoP4o2BIMEbBOAPymsw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o1pSF-002RJn-6H; Thu, 16 Jun 2022 13:22:35 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o1pS6-002RHK-QB; Thu, 16 Jun 2022 13:22:28 +0000 X-UUID: 7b17d8ec00894c0e9e9449224cdd862c-20220616 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.6,REQID:8c2c9a2e-687d-4364-aaad-0c373f52c805,OB:0,LO B:0,IP:0,URL:5,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:5 X-CID-META: VersionHash:b14ad71,CLOUDID:f93180f6-e099-41ba-a32c-13b8bfe63214,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:1,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: 7b17d8ec00894c0e9e9449224cdd862c-20220616 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2106147878; Thu, 16 Jun 2022 06:22:19 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 16 Jun 2022 06:22:17 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 16 Jun 2022 21:22:16 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.3 via Frontend Transport; Thu, 16 Jun 2022 21:22:16 +0800 Message-ID: Subject: Re: [PATCH v11 01/10] dt-bindings: mediatek,dp: Add Display Port binding From: Rex-BC Chen To: Rob Herring CC: , , , , , , , , , , , , , , , , , , , , , Date: Thu, 16 Jun 2022 21:22:16 +0800 In-Reply-To: <20220614202336.GA2400714-robh@kernel.org> References: <20220610105522.13449-1-rex-bc.chen@mediatek.com> <20220610105522.13449-2-rex-bc.chen@mediatek.com> <20220614202336.GA2400714-robh@kernel.org> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220616_062226_911370_9C9E190B X-CRM114-Status: GOOD ( 25.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 2022-06-14 at 14:23 -0600, Rob Herring wrote: > On Fri, Jun 10, 2022 at 06:55:13PM +0800, Bo-Chen Chen wrote: > > From: Markus Schneider-Pargmann > > > > This controller is present on several mediatek hardware. Currently > > mt8195 and mt8395 have this controller without a functional > > difference, > > so only one compatible field is added. > > > > The controller can have two forms, as a normal display port and as > > an > > embedded display port. > > > > Signed-off-by: Markus Schneider-Pargmann > > Signed-off-by: Guillaume Ranquet > > [Bo-Chen: Fix reviewers' comment] > > Signed-off-by: Bo-Chen Chen > > --- > > .../display/mediatek/mediatek,dp.yaml | 101 > > ++++++++++++++++++ > > 1 file changed, 101 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > new file mode 100644 > > index 000000000000..10f50a0dcf49 > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.ya > > ml > > @@ -0,0 +1,101 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml*__;Iw!!CTRNKA9wMg0ARbw!yqAl1KhfbHqHN7-5aeqhzqeOVhPU_Z5beko5q-y-s5pcfp1WL5oVGvY5UF4EfWm4PWjc5mjBwyBUMsr_RI45ipbhsw$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!yqAl1KhfbHqHN7-5aeqhzqeOVhPU_Z5beko5q-y-s5pcfp1WL5oVGvY5UF4EfWm4PWjc5mjBwyBUMsr_RI5WzYKENQ$ > > > > + > > +title: MediaTek Display Port Controller > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Jitao shi > > + > > +description: | > > + Device tree bindings for the MediaTek display port and > > + embedded display port controller present on some MediaTek SoCs. > > + > > +properties: > > + compatible: > > + enum: > > + - mediatek,mt8195-dp-tx > > + - mediatek,mt8195-edp-tx > > + > > + reg: > > + maxItems: 1 > > + > > + nvmem-cells: > > + maxItems: 1 > > + description: efuse data for display port calibration > > + > > + nvmem-cell-names: > > + const: dp_calibration_data > > + > > + power-domains: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + ports: > > + $ref: /schemas/graph.yaml#/properties/ports > > + properties: > > + port@0: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Input endpoint of the controller, usually > > dp_intf > > + > > + port@1: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Output endpoint of the controller > > + > > + required: > > + - port@0 > > + - port@1 > > + > > + max-lanes: > > + maxItems: 1 > > + description: maximum number of lanes supported by the > > hardware. > > We already have a 'data-lanes' property defined in > 'video-interfaces.yaml' that can serve this purpose. > Hello Rob, Thanks for review. >From the description of video-interfaces.yaml, I think it's not quite match what we need. We only need this value be one of "1,2,4". Any other suggestion? > > + > > + max-linkrate: > > + maxItems: 1 > > + description: maximum link rate supported by the hardware and > > unit is MHz. > > Then use '-mhz' suffix on the property name. Then you don't need a > type > (or maxItems). OK, I will write like this: max-linkrate-mhz: enum: [ 1620, 2700, 5400, 8100 ] description: maximum link rate supported by the hardware. BRs, Bo-Chen _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel