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([2001:8003:3a49:fd00:801:72a7:386c:deca]) by smtp.gmail.com with ESMTPSA id v12sm5561422pgr.68.2022.02.02.19.59.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Feb 2022 19:59:19 -0800 (PST) Message-ID: Date: Thu, 3 Feb 2022 14:59:13 +1100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH 06/13] hw/intc/arm_gicv3_its: Fix address calculation in get_ite() and update_ite() Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20220201193207.2771604-1-peter.maydell@linaro.org> <20220201193207.2771604-7-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20220201193207.2771604-7-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::430 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shashi Mallela , =?UTF-8?Q?Alex_Benn=c3=a9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/2/22 06:32, Peter Maydell wrote: > In get_ite() and update_ite() we work with a 12-byte in-guest-memory > table entry, which we intend to handle as an 8-byte value followed by > a 4-byte value. Unfortunately the calculation of the address of the > 4-byte value is wrong, because we write it as: > > table_base_address + (index * entrysize) + 4 > (obfuscated by the way the expression has been written) > > when it should be + 8. This bug meant that we overwrote the top > bytes of the 8-byte value with the 4-byte value. There are no > guest-visible effects because the top half of the 8-byte value > contains only the doorbell interrupt field, which is used only in > GICv4, and the two bugs in the "write ITE" and "read ITE" codepaths > cancel each other out. > > We can't simply change the calculation, because this would break > migration of a (TCG) guest from the old version of QEMU which had > in-guest-memory interrupt tables written using the buggy version of > update_ite(). We must also at the same time change the layout of the > fields within the ITE_L and ITE_H values so that the in-memory > locations of the fields we care about (VALID, INTTYPE, INTID and > ICID) stay the same. > > Signed-off-by: Peter Maydell > --- > hw/intc/gicv3_internal.h | 19 ++++++++++--------- > hw/intc/arm_gicv3_its.c | 28 +++++++++++----------------- > 2 files changed, 21 insertions(+), 26 deletions(-) This is confusing: 5-3 is titled "example of the number of bits that might be stored in an ITE"? Surely there must be a true architected format for this table, the one real hardware uses. Surely tcg will simply have to suck it up and break migration to fix this properly. r~