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From: Vince Weaver <vweaver1@eecs.utk.edu>
To: Ingo Molnar <mingo@elte.hu>
Cc: Avi Kivity <avi@redhat.com>,
	Robert Richter <robert.richter@amd.com>,
	Benjamin Block <bebl@mageta.org>,
	Hans Rosenfeld <hans.rosenfeld@amd.com>, <hpa@zytor.com>,
	<tglx@linutronix.de>, <suresh.b.siddha@intel.com>,
	<eranian@google.com>, <brgerst@gmail.com>,
	<Andreas.Herrmann3@amd.com>, <x86@kernel.org>,
	<linux-kernel@vger.kernel.org>,
	Benjamin Block <benjamin.block@amd.com>
Subject: Re: [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1)
Date: Tue, 20 Dec 2011 17:47:55 -0500	[thread overview]
Message-ID: <alpine.DEB.2.00.1112201740280.18984@cl320.eecs.utk.edu> (raw)
In-Reply-To: <20111220182754.GD8408@elte.hu>

On Tue, 20 Dec 2011, Ingo Molnar wrote:

> 
> * Vince Weaver <vweaver1@eecs.utk.edu> wrote:
> 
> > On Tue, 20 Dec 2011, Ingo Molnar wrote:
> 
> > > Granted, LWP was mis-designed to quite a degree, those AMD 
> > > chip engineers should have talked to people who understand 
> > > how modern PMU abstractions are added to the OS kernel 
> > > properly.
> > 
> > You do realize that LWP was probably in design 5+ years ago, 
> > at a time when most Linux kernel developers wanted nothing to 
> > do with perf counters, and thus anyone they did contact for 
> > help would have been from the since-rejected perfctr or 
> > perfmon2 camp.
> 
> That does not really contradict what i said.

Well I'm just assuming that when you say "people who understand
how modern PMU abstractions are added to the OS kernel properly"
you mean yourself and the perf_event crew.

There are many other schools of thought on what kernel PMU abstractions 
should look like, and I'm sure AMD conferred with them.


> > Running LWP through the kernel is a foolish idea. Does anyone 
> > have any numbers on what that would do to overhead?
> 
> At most an LLWPCB instruction is needed.

you're saying that all the crazy kernel stuff you're proposing will have 
no extra overhead when compared to just implementing the proper xsave 
context switch code?

> > perf_events creates huge overhead when doing self monitoring.  
> > For simple self-monintoring counter reads it is an *order of 
> > magnitude* worse than doing the same thing with perfctr.
> 
> Only if you are comparing apples to oranges: if you compare a 
> full kernel based read of self-profiling counters with an RDPMC 
> instruction.

The benchmarks I posted show measurements getting *real data* from the 
counters.  Yes, on perfctr this is mostly just a rdpmc call plus a quick 
access to some mmap'd memory to make sure the context is valid.

perfctr is an order of magnitude less overhead because it was designed 
from the beginning to be a very low-overhead way to get self-monitoring 
data.  A lot of time and tuning was spent getting it that fast.

perf_event throws everything and the kitchen sink in the the kernel.  I'm 
guessing low-overhead self-monitoring was not really one of your primary 
design goals, and it shows.

> But as we told you previously, you could use RDPMC under perf as 
> well, last i checked PeterZ posted experimental patches for 
> that. Peter, what's the status of that?

yes.  If you checked the benchmark results I showed, you'd have seen that 
I run tests against that patchset too, and it's really only marginally 
better that the current perf_event stuff.  I might have written the 
benchmark poorly, but that's mainly because as-posted the documentation 
for how to use that patchset is a bit unclear.

Vince
vweaver1@eecs.utk.edu


  reply	other threads:[~2011-12-20 22:48 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-11-29 12:41 [PATCH 0/9] rework of extended state handling, LWP support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 1/9] x86, xsave: warn on #NM exceptions caused by the kernel Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 2/9] x86, xsave: cleanup fpu/xsave support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 3/9] x86, xsave: cleanup fpu/xsave signal frame setup Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 4/9] x86, xsave: rework fpu/xsave support Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 5/9] x86, xsave: remove unused code Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 6/9] x86, xsave: more cleanups Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 7/9] x86, xsave: remove lazy allocation of xstate area Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 8/9] x86, xsave: add support for non-lazy xstates Hans Rosenfeld
2011-11-29 12:41 ` [PATCH 9/9] x86, xsave: add kernel support for AMDs Lightweight Profiling (LWP) Hans Rosenfeld
2011-11-29 21:31 ` [PATCH 0/9] rework of extended state handling, LWP support Andi Kleen
2011-11-30 17:37   ` Hans Rosenfeld
2011-11-30 21:52     ` Andi Kleen
2011-12-01 20:36       ` Hans Rosenfeld
2011-12-02  2:01         ` H. Peter Anvin
2011-12-02 11:20           ` Hans Rosenfeld
2011-12-07 19:57             ` Hans Rosenfeld
2011-12-07 20:00               ` [PATCH 7/8] x86, xsave: add support for non-lazy xstates Hans Rosenfeld
2011-12-07 20:00                 ` [PATCH 8/8] x86, xsave: add kernel support for AMDs Lightweight Profiling (LWP) Hans Rosenfeld
2011-12-05 10:22 ` [PATCH 0/9] rework of extended state handling, LWP support Ingo Molnar
2011-12-16 16:07   ` Hans Rosenfeld
2011-12-16 16:12     ` [RFC 1/5] x86, perf: Implement software-activation of lwp Hans Rosenfeld
2011-12-16 16:12       ` [RFC 2/5] perf: adds prototype for a new perf-context-type Hans Rosenfeld
2011-12-16 16:12       ` [RFC 3/5] perf: adds a new pmu-initialization-call Hans Rosenfeld
2011-12-16 16:12       ` [RFC 4/5] x86, perf: implements lwp-perf-integration (rc1) Hans Rosenfeld
2011-12-18  8:04         ` Ingo Molnar
2011-12-18 15:22           ` Benjamin Block
2011-12-18 23:43             ` Ingo Molnar
2011-12-19  9:09               ` Robert Richter
2011-12-19 10:54                 ` Ingo Molnar
2011-12-19 11:12                   ` Avi Kivity
2011-12-19 11:40                     ` Ingo Molnar
2011-12-19 11:58                       ` Avi Kivity
2011-12-19 18:13                         ` Benjamin
2011-12-20  8:56                           ` Ingo Molnar
2011-12-20  9:15                         ` Ingo Molnar
2011-12-20  9:47                           ` Avi Kivity
2011-12-20 10:09                             ` Ingo Molnar
2011-12-20 15:27                               ` Joerg Roedel
2011-12-20 18:40                                 ` Ingo Molnar
2011-12-21  0:07                                   ` Joerg Roedel
2011-12-21 12:34                                     ` Ingo Molnar
2011-12-21 12:44                                       ` Avi Kivity
2011-12-21 13:22                                         ` Ingo Molnar
2011-12-21 22:49                                           ` Joerg Roedel
2011-12-23 10:53                                             ` Ingo Molnar
2011-12-21 11:46                                   ` Gleb Natapov
2011-12-23 10:56                                     ` Ingo Molnar
2011-12-20 15:48                           ` Vince Weaver
2011-12-20 18:27                             ` Ingo Molnar
2011-12-20 22:47                               ` Vince Weaver [this message]
2011-12-21 12:00                                 ` Ingo Molnar
2011-12-21 13:55                                   ` Vince Weaver
2011-12-16 16:12       ` [RFC 5/5] x86, perf: adds support for the LWP threshold-int Hans Rosenfeld

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