From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Stabellini Subject: Re: [PATCH 2/3] qemu-xen-trad: Correctly expose PCH ISA bridge for IGD passthrough Date: Fri, 8 Feb 2013 11:48:58 +0000 Message-ID: References: <1360253528-5424-1-git-send-email-firemeteor@users.sourceforge.net> <1360253528-5424-3-git-send-email-firemeteor@users.sourceforge.net> <5113E4C302000078000BCF6B@nat28.tlf.novell.com> <5114F15002000078000BD2B2@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <5114F15002000078000BD2B2@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: "G.R." , "xen-devel@lists.xen.org" , Ian Campbell , Stefano Stabellini List-Id: xen-devel@lists.xenproject.org On Fri, 8 Feb 2013, Jan Beulich wrote: > >>> On 08.02.13 at 12:30, Stefano Stabellini > wrote: > > On Thu, 7 Feb 2013, G.R. wrote: > >> > > >> > For one I wonder whether this is really _always_ correct. I.e. > >> > the device at 00:1f.0 always being an ISA bridge. Wouldn't it > >> > be better to mirror whatever the host device says? > >> > > >> >From the Intel driver code, it's looking for an intel ISA bridge. > >> So your question would be should it be always at 00:1f.0. > >> So far it seems that it is. > >> > >> > And then I don't see why you need to open code all of > >> > pci_bridge_init() instead of just overriding the class value after > >> > you called that function (or, if the order of events for some > >> > reason matters, adding another parameter to the function). > >> > >> Stefano, could you comment? It's your code after all. > > > > It's not trivial because PCIBus is defined in hw/pci.c, so you can't > > dereference members of PCIBus from hw/pt-graphics.c. > > But the patch makes it so the structure itself becomes public? > What problem do you see? QEMU's include chain can be devious at times but I have no objections in making PCIBus public.