From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752552AbcCAIzl (ORCPT ); Tue, 1 Mar 2016 03:55:41 -0500 Received: from utopia.booyaka.com ([74.50.51.50]:42177 "EHLO utopia.booyaka.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752026AbcCAIzk (ORCPT ); Tue, 1 Mar 2016 03:55:40 -0500 Date: Tue, 1 Mar 2016 08:55:39 +0000 (UTC) From: Paul Walmsley To: Peter Ujfalusi cc: Tony Lindgren , robh+dt@kernel.org, Tero Kristo , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/11] ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1 In-Reply-To: <1456411827-23962-3-git-send-email-peter.ujfalusi@ti.com> Message-ID: References: <1456411827-23962-1-git-send-email-peter.ujfalusi@ti.com> <1456411827-23962-3-git-send-email-peter.ujfalusi@ti.com> User-Agent: Alpine 2.02 (DEB 1266 2009-07-14) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 25 Feb 2016, Peter Ujfalusi wrote: > Add hwmod data for the eDMA blocks: > - TPCC: Third-party channel controller > - TPTC0: Third-party transfer controller 0 > - TPTC1: Third-party transfer controller 1 > > The TPCC is following it's clock and power domain. This means that > the hwmod can not control it's status. > > Signed-off-by: Peter Ujfalusi Thanks, queued. - Paul From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Walmsley Subject: Re: [PATCH 02/11] ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1 Date: Tue, 1 Mar 2016 08:55:39 +0000 (UTC) Message-ID: References: <1456411827-23962-1-git-send-email-peter.ujfalusi@ti.com> <1456411827-23962-3-git-send-email-peter.ujfalusi@ti.com> Mime-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Return-path: In-Reply-To: <1456411827-23962-3-git-send-email-peter.ujfalusi-l0cyMroinI0@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Peter Ujfalusi Cc: Tony Lindgren , robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Tero Kristo , linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Thu, 25 Feb 2016, Peter Ujfalusi wrote: > Add hwmod data for the eDMA blocks: > - TPCC: Third-party channel controller > - TPTC0: Third-party transfer controller 0 > - TPTC1: Third-party transfer controller 1 > > The TPCC is following it's clock and power domain. This means that > the hwmod can not control it's status. > > Signed-off-by: Peter Ujfalusi Thanks, queued. - Paul -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: paul@pwsan.com (Paul Walmsley) Date: Tue, 1 Mar 2016 08:55:39 +0000 (UTC) Subject: [PATCH 02/11] ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1 In-Reply-To: <1456411827-23962-3-git-send-email-peter.ujfalusi@ti.com> References: <1456411827-23962-1-git-send-email-peter.ujfalusi@ti.com> <1456411827-23962-3-git-send-email-peter.ujfalusi@ti.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, 25 Feb 2016, Peter Ujfalusi wrote: > Add hwmod data for the eDMA blocks: > - TPCC: Third-party channel controller > - TPTC0: Third-party transfer controller 0 > - TPTC1: Third-party transfer controller 1 > > The TPCC is following it's clock and power domain. This means that > the hwmod can not control it's status. > > Signed-off-by: Peter Ujfalusi Thanks, queued. - Paul