From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Subject: Re: [PATCHv2 5/8] ARM: socfpga: dts: Add SPI Master1 for Arria10 SR chip Date: Mon, 10 Oct 2016 16:54:39 -0500 Message-ID: References: <1464889948-28793-1-git-send-email-tthayer@opensource.altera.com> <1464889948-28793-6-git-send-email-tthayer@opensource.altera.com> <9ed01d54-4c7e-1bfa-7f29-8feb309b9b50@opensource.altera.com> Mime-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Return-path: Received: from mail-sn1nam01on0064.outbound.protection.outlook.com ([104.47.32.64]:6329 "EHLO NAM01-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752352AbcJJXaE (ORCPT ); Mon, 10 Oct 2016 19:30:04 -0400 In-Reply-To: <9ed01d54-4c7e-1bfa-7f29-8feb309b9b50@opensource.altera.com> Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Thor Thayer Cc: lee.jones@linaro.org, linus.walleij@linaro.org, gnurou@gmail.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org On Mon, 10 Oct 2016, Thor Thayer wrote: > Hi Dihn, > > On 06/02/2016 12:52 PM, tthayer@opensource.altera.com wrote: > > From: Thor Thayer > > > > Add the Altera Arria10 SPI Master Node in preparation for > > the A10SR MFD node. > > > > Signed-off-by: Thor Thayer > > --- > > v2: No change > > --- > > arch/arm/boot/dts/socfpga_arria10.dtsi | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > > > I lost track of this patch. Any comments on this patch? > Sorry about that, I missed it too. Applied. BR, Dinh