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Date: Wed, 20 May 2015 15:51:19 -0700 (PDT)
From: Vikas Shivappa <vikas.shivappa@intel.com>
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To: Thomas Gleixner <tglx@linutronix.de>
cc: Vikas Shivappa <vikas.shivappa@intel.com>,
        Vikas Shivappa <vikas.shivappa@linux.intel.com>, x86@kernel.org,
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        Matt Fleming <matt.fleming@intel.com>,
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        h.peter.anvin@intel.com, "Juvva, Kanaka D" <kanaka.d.juvva@intel.com>,
        mtosatti@redhat.com
Subject: Re: [PATCH 5/7] x86/intel_rdt: Software Cache for IA32_PQR_MSR
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On Wed, 20 May 2015, Thomas Gleixner wrote:

> On Wed, 20 May 2015, Vikas Shivappa wrote:
>> On Wed, 20 May 2015, Thomas Gleixner wrote:
>>
>>> On Wed, 20 May 2015, Vikas Shivappa wrote:
>>>> On Fri, 15 May 2015, Thomas Gleixner wrote:

>> sorry, my reason was wrong though.
>>

>
>> So PERF_EVENTS cant be disabled on x86 and RDT is only in x86 && SUP_INTEL.
>
> That should have been your answer to #1, right?

yes, thats why i said '>> sorry, my reason was wrong though.' above

I thought the .config edit would have spit out an error message as the 
PERF_EVENT was reselected (basically print any such dependency changes it 
does when starting to compile).

I was only curious if you compiled by any chance as some of the folks were 
trying to get the Intel systems with RDT..

Thanks,
Vikas

>
> Thanks,
>
> 	tglx
>
>
>
>