From: Julia Lawall <julia.lawall@lip6.fr>
To: Keila Novo <laurana5@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
outreachy-kernel@googlegroups.com
Subject: Re: [Outreachy kernel] [PATCH]staging/dgnc/dgnc_neo.h Lines less than 80 characters
Date: Fri, 7 Oct 2016 07:27:28 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.10.1610070726530.3074@hadrien> (raw)
In-Reply-To: <20161007224905.GA16609@kheixx-VB>
On Sat, 8 Oct 2016, Keila Novo wrote:
> Fix checkpatch.pl error: "Lines over 80 characters" to conform
> to Kernel coding style.
>
> Signed-off-by: Keila Novo <laurana5@gmail.com>
> ---
> drivers/staging/dgnc/dgnc_neo.h | 23 +++++++++++++----------
> 1 file changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/staging/dgnc/dgnc_neo.h b/drivers/staging/dgnc/dgnc_neo.h
> index abddd48..5b9a870 100644
> --- a/drivers/staging/dgnc/dgnc_neo.h
> +++ b/drivers/staging/dgnc/dgnc_neo.h
> @@ -30,7 +30,7 @@
> struct neo_uart_struct {
> u8 txrx; /* WR RHR/THR - Holding Reg */
> u8 ier; /* WR IER - Interrupt Enable Reg */
> - u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
> + u8 isr_fcr;/* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
> u8 lcr; /* WR LCR - Line Control Reg */
> u8 mcr; /* WR MCR - Modem Control Reg */
> u8 lsr; /* WR LSR - Line Status Reg */
The rsult does not look very nice. It would be betterto put a space after
the ; in the line that you changed, and then line all the other lines up
with that.
julia
> @@ -108,19 +108,21 @@ struct neo_uart_struct {
> /* 17158 Extended IIR's */
> #define UART_17158_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */
> #define UART_17158_IIR_XONXOFF 0x10 /* Received an XON/XOFF char */
> -#define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20 /* CTS/DSR or RTS/DTR state change */
> +#define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20
> + /* CTS/DSR or RTS/DTR state change */
> #define UART_17158_IIR_FIFO_ENABLED 0xC0 /* 16550 FIFOs are Enabled */
>
> /*
> * These are the extended interrupts that get sent
> * back to us from the UART's 32bit interrupt register
> */
> -#define UART_17158_RX_LINE_STATUS 0x1 /* RX Ready */
> -#define UART_17158_RXRDY_TIMEOUT 0x2 /* RX Ready Timeout */
> -#define UART_17158_TXRDY 0x3 /* TX Ready */
> -#define UART_17158_MSR 0x4 /* Modem State Change */
> -#define UART_17158_TX_AND_FIFO_CLR 0x40 /* Transmitter Holding Reg Empty */
> -#define UART_17158_RX_FIFO_DATA_ERROR 0x80 /* UART detected an RX FIFO Data error */
> +#define UART_17158_RX_LINE_STATUS 0x1 /* RX Ready */
> +#define UART_17158_RXRDY_TIMEOUT 0x2 /* RX Ready Timeout */
> +#define UART_17158_TXRDY 0x3 /* TX Ready */
> +#define UART_17158_MSR 0x4 /* Modem State Change */
> +#define UART_17158_TX_AND_FIFO_CLR 0x40 /* Transmitter Holding Reg Empty */
> +#define UART_17158_RX_FIFO_DATA_ERROR 0x80
> + /* UART detected an RX FIFO Data error */
>
> /*
> * These are the EXTENDED definitions for the 17C158's Interrupt
> @@ -132,8 +134,9 @@ struct neo_uart_struct {
> #define UART_17158_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
> #define UART_17158_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
>
> -#define UART_17158_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */
> -#define UART_17158_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */
> +#define UART_17158_XOFF_DETECT 0x1
> + /*Indicates if chip saw incoming XOFF char */
> +#define UART_17158_XON_DETECT 0x2 /*Indicates if chip saw incoming XON char */
>
> #define UART_17158_IER_RSVD1 0x10 /* Reserved by Exar */
> #define UART_17158_IER_XOFF 0x20 /* Xoff Interrupt Enable */
> --
> 2.7.4
>
> --
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prev parent reply other threads:[~2016-10-07 5:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-07 22:49 [PATCH]staging/dgnc/dgnc_neo.h Lines less than 80 characters Keila Novo
2016-10-07 5:27 ` Julia Lawall [this message]
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