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From: Stefano Stabellini <sstabellini@kernel.org>
To: Andre Przywara <andre.przywara@arm.com>
Cc: xen-devel@lists.xenproject.org,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Vijay Kilari <vijay.kilari@gmail.com>
Subject: Re: [PATCH v2 06/27] ARM: GICv3 ITS: introduce device mapping
Date: Wed, 22 Mar 2017 15:45:29 -0700 (PDT)	[thread overview]
Message-ID: <alpine.DEB.2.10.1703211718190.11679@sstabellini-ThinkPad-X260> (raw)
In-Reply-To: <20170316112030.20419-7-andre.przywara@arm.com>

On Thu, 16 Mar 2017, Andre Przywara wrote:
> The ITS uses device IDs to map LPIs to a device. Dom0 will later use
> those IDs, which we directly pass on to the host.
> For this we have to map each device that Dom0 may request to a host
> ITS device with the same identifier.
> Allocate the respective memory and enter each device into an rbtree to
> later be able to iterate over it or to easily teardown guests.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  xen/arch/arm/gic-v3-its.c        | 207 +++++++++++++++++++++++++++++++++++++++
>  xen/arch/arm/vgic-v3.c           |   3 +
>  xen/include/asm-arm/domain.h     |   3 +
>  xen/include/asm-arm/gic_v3_its.h |  18 ++++
>  4 files changed, 231 insertions(+)
> 
> diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
> index 5c11b0d..60b15b5 100644
> --- a/xen/arch/arm/gic-v3-its.c
> +++ b/xen/arch/arm/gic-v3-its.c
> @@ -21,6 +21,8 @@
>  #include <xen/lib.h>
>  #include <xen/delay.h>
>  #include <xen/mm.h>
> +#include <xen/rbtree.h>
> +#include <xen/sched.h>
>  #include <xen/sizes.h>
>  #include <asm/gic.h>
>  #include <asm/gic_v3_defs.h>
> @@ -32,6 +34,17 @@
>  
>  LIST_HEAD(host_its_list);
>  
> +struct its_devices {
> +    struct rb_node rbnode;
> +    struct host_its *hw_its;
> +    void *itt_addr;
> +    paddr_t guest_doorbell;
> +    uint32_t host_devid;
> +    uint32_t guest_devid;
> +    uint32_t eventids;
> +    uint32_t *host_lpis;
> +};
> +
>  bool gicv3_its_host_has_its(void)
>  {
>      return !list_empty(&host_its_list);
> @@ -149,6 +162,24 @@ static int its_send_cmd_mapc(struct host_its *its, uint32_t collection_id,
>      return its_send_command(its, cmd);
>  }
>  
> +static int its_send_cmd_mapd(struct host_its *its, uint32_t deviceid,
> +                             uint8_t size_bits, paddr_t itt_addr, bool valid)
> +{
> +    uint64_t cmd[4];
> +
> +    if ( valid )
> +    {
> +        ASSERT(size_bits < 32);
> +        ASSERT(!(itt_addr & ~GENMASK(51, 8)));
> +    }
> +    cmd[0] = GITS_CMD_MAPD | ((uint64_t)deviceid << 32);
> +    cmd[1] = valid ? size_bits : 0x00;
> +    cmd[2] = valid ? (itt_addr | GITS_VALID_BIT) : 0x00;
> +    cmd[3] = 0x00;
> +
> +    return its_send_command(its, cmd);
> +}
> +
>  /* Set up the (1:1) collection mapping for the given host CPU. */
>  int gicv3_its_setup_collection(unsigned int cpu)
>  {
> @@ -379,6 +410,7 @@ static int gicv3_its_init_single_its(struct host_its *hw_its)
>      devid_bits = min(devid_bits, max_its_device_bits);
>      if ( reg & GITS_TYPER_PTA )
>          hw_its->flags |= HOST_ITS_USES_PTA;
> +    hw_its->itte_size = GITS_TYPER_ITT_SIZE(reg);
>  
>      for ( i = 0; i < GITS_BASER_NR_REGS; i++ )
>      {
> @@ -428,6 +460,180 @@ int gicv3_its_init(void)
>      return 0;
>  }
>  
> +static int remove_mapped_guest_device(struct its_devices *dev)
> +{
> +    int ret;
> +
> +    if ( dev->hw_its )
> +    {
> +        int ret = its_send_cmd_mapd(dev->hw_its, dev->host_devid, 0, 0, false);
> +        if ( ret )
> +            return ret;
> +    }
> +
> +    ret = gicv3_its_wait_commands(dev->hw_its);
> +    if ( ret )
> +        return ret;
> +
> +    xfree(dev->itt_addr);
> +    xfree(dev);
> +
> +    return 0;
> +}
> +
> +static struct host_its *gicv3_its_find_by_doorbell(paddr_t doorbell_address)
> +{
> +    struct host_its *hw_its;
> +
> +    list_for_each_entry(hw_its, &host_its_list, entry)

Does this need to take a spinlock to protect host_its_list? I guess not
because the list is not modified after boot?


> +    {
> +        if ( hw_its->addr + ITS_DOORBELL_OFFSET == doorbell_address )
> +            return hw_its;
> +    }
> +
> +    return NULL;
> +}
> +
> +static int compare_its_guest_devices(struct its_devices *dev,
> +                                     paddr_t doorbell, uint32_t devid)
> +{
> +    if ( dev->guest_doorbell < doorbell )
> +        return -1;
> +
> +    if ( dev->guest_doorbell > doorbell )
> +        return 1;
> +
> +    if ( dev->guest_devid < devid )
> +        return -1;
> +
> +    if ( dev->guest_devid > devid )
> +        return 1;
> +
> +    return 0;
> +}
> +
> +/*
> + * Map a hardware device, identified by a certain host ITS and its device ID
> + * to domain d, a guest ITS (identified by its doorbell address) and device ID.
> + * Also provide the number of events (MSIs) needed for that device.
> + * This does not check if this particular hardware device is already mapped
> + * at another domain, it is expected that this would be done by the caller.
> + */
> +int gicv3_its_map_guest_device(struct domain *d,
> +                               paddr_t host_doorbell, uint32_t host_devid,
> +                               paddr_t guest_doorbell, uint32_t guest_devid,
> +                               uint32_t nr_events, bool valid)
> +{
> +    void *itt_addr = NULL;
> +    struct host_its *hw_its;
> +    struct its_devices *dev = NULL, *temp;
> +    struct rb_node **new = &d->arch.vgic.its_devices.rb_node, *parent = NULL;
> +    int ret = -ENOENT;
> +
> +    hw_its = gicv3_its_find_by_doorbell(host_doorbell);
> +    if ( !hw_its )
> +        return ret;
> +
> +    /* check for already existing mappings */
> +    spin_lock(&d->arch.vgic.its_devices_lock);
> +    while ( *new )
> +    {
> +        temp = rb_entry(*new, struct its_devices, rbnode);
> +
> +        parent = *new;
> +        if ( !compare_its_guest_devices(temp, guest_doorbell, guest_devid) )
> +        {
> +            if ( !valid )
> +                rb_erase(&temp->rbnode, &d->arch.vgic.its_devices);
> +
> +            spin_unlock(&d->arch.vgic.its_devices_lock);
> +
> +            if ( valid )
> +                return -EBUSY;
> +
> +            return remove_mapped_guest_device(temp);
> +        }
> +

Plese don't run compare_its_guest_devices twice with the same arguments,
just store the return value.


> +        if ( compare_its_guest_devices(temp, guest_doorbell, guest_devid) > 0 )
> +            new = &((*new)->rb_left);
> +        else
> +            new = &((*new)->rb_right);
> +    }
> +
> +    if ( !valid )
> +        goto out_unlock;
> +
> +    ret = -ENOMEM;
> +
> +    /* An Interrupt Translation Table needs to be 256-byte aligned. */
> +    itt_addr = _xzalloc(nr_events * hw_its->itte_size, 256);
> +    if ( !itt_addr )
> +        goto out_unlock;
> +
> +    dev = xzalloc(struct its_devices);
> +    if ( !dev )
> +        goto out_unlock;
> +
> +    ret = its_send_cmd_mapd(hw_its, host_devid, fls(nr_events - 1) - 1,
> +                            virt_to_maddr(itt_addr), true);
> +    if ( ret )
> +        goto out_unlock;
> +
> +    dev->itt_addr = itt_addr;
> +    dev->hw_its = hw_its;
> +    dev->guest_doorbell = guest_doorbell;
> +    dev->guest_devid = guest_devid;
> +    dev->host_devid = host_devid;
> +    dev->eventids = nr_events;
> +
> +    rb_link_node(&dev->rbnode, parent, new);
> +    rb_insert_color(&dev->rbnode, &d->arch.vgic.its_devices);
> +
> +    spin_unlock(&d->arch.vgic.its_devices_lock);
> +
> +    return 0;
> +
> +out_unlock:
> +    spin_unlock(&d->arch.vgic.its_devices_lock);
> +    if ( dev )
> +        xfree(dev->host_lpis);

Where is host_lpis allocated? Why is it freed here?


> +    xfree(itt_addr);
> +    xfree(dev);
> +    return ret;
> +}
> +
> +/* Removing any connections a domain had to any ITS in the system. */
> +void gicv3_its_unmap_all_devices(struct domain *d)
> +{
> +    struct rb_node *victim;
> +    struct its_devices *dev;
> +
> +    /*
> +     * This is an easily readable, yet inefficient implementation.
> +     * It uses the provided iteration wrapper and erases each node, which
> +     * possibly triggers rebalancing.
> +     * This seems overkill since we are going to abolish the whole tree, but
> +     * avoids an open-coded re-implementation of the traversal functions with
> +     * some recursive function calls.
> +     * Performance does not matter here, since we are destroying a domain.
> +     */
> +restart:
> +    spin_lock(&d->arch.vgic.its_devices_lock);
> +    if ( (victim = rb_first(&d->arch.vgic.its_devices)) )
> +    {
> +        dev = rb_entry(victim, struct its_devices, rbnode);
> +        rb_erase(victim, &d->arch.vgic.its_devices);
> +
> +        spin_unlock(&d->arch.vgic.its_devices_lock);
> +
> +        remove_mapped_guest_device(dev);
> +
> +        goto restart;
> +    }

There is no need to use goto here, a simple while loop should suffice.


> +    spin_unlock(&d->arch.vgic.its_devices_lock);
> +}
> +
>  /* Scan the DT for any ITS nodes and create a list of host ITSes out of it. */
>  void gicv3_its_dt_init(const struct dt_device_node *node)
>  {
> @@ -455,6 +661,7 @@ void gicv3_its_dt_init(const struct dt_device_node *node)
>          its_data->addr = addr;
>          its_data->size = size;
>          its_data->dt_node = its;
> +        spin_lock_init(&its_data->cmd_lock);

This change should be in the previous patch


>          printk("GICv3: Found ITS @0x%lx\n", addr);
>  
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index d61479d..1fadb00 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1450,6 +1450,9 @@ static int vgic_v3_domain_init(struct domain *d)
>      d->arch.vgic.nr_regions = rdist_count;
>      d->arch.vgic.rdist_regions = rdist_regions;
>  
> +    spin_lock_init(&d->arch.vgic.its_devices_lock);
> +    d->arch.vgic.its_devices = RB_ROOT;
> +
>      /*
>       * Domain 0 gets the hardware address.
>       * Guests get the virtual platform layout.
> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
> index 2d6fbb1..00b9c1a 100644
> --- a/xen/include/asm-arm/domain.h
> +++ b/xen/include/asm-arm/domain.h
> @@ -11,6 +11,7 @@
>  #include <asm/gic.h>
>  #include <public/hvm/params.h>
>  #include <xen/serial.h>
> +#include <xen/rbtree.h>
>  
>  struct hvm_domain
>  {
> @@ -109,6 +110,8 @@ struct arch_domain
>          } *rdist_regions;
>          int nr_regions;                     /* Number of rdist regions */
>          uint32_t rdist_stride;              /* Re-Distributor stride */
> +        struct rb_root its_devices;         /* devices mapped to an ITS */
> +        spinlock_t its_devices_lock;        /* protects the its_devices tree */
>  #endif
>      } vgic;
>  
> diff --git a/xen/include/asm-arm/gic_v3_its.h b/xen/include/asm-arm/gic_v3_its.h
> index 8b493fb..3421ea0 100644
> --- a/xen/include/asm-arm/gic_v3_its.h
> +++ b/xen/include/asm-arm/gic_v3_its.h
> @@ -48,6 +48,10 @@
>  #define GITS_TYPER_DEVICE_ID_BITS(r)    (((r & GITS_TYPER_DEVIDS_MASK) >> \
>                                                 GITS_TYPER_DEVIDS_SHIFT) + 1)
>  #define GITS_TYPER_IDBITS_SHIFT         8
> +#define GITS_TYPER_ITT_SIZE_SHIFT       4
> +#define GITS_TYPER_ITT_SIZE_MASK        (0xfUL << GITS_TYPER_ITT_SIZE_SHIFT)
> +#define GITS_TYPER_ITT_SIZE(r)          ((((r) & GITS_TYPER_ITT_SIZE_MASK) >> \
> +                                                GITS_TYPER_ITT_SIZE_SHIFT) + 1)
>  
>  #define GITS_IIDR_VALUE                 0x34c
>  
> @@ -94,7 +98,10 @@
>  #define GITS_CMD_MOVALL                 0x0e
>  #define GITS_CMD_DISCARD                0x0f
>  
> +#define ITS_DOORBELL_OFFSET             0x10040
> +
>  #include <xen/device_tree.h>
> +#include <xen/rbtree.h>
>  
>  #define HOST_ITS_FLUSH_CMD_QUEUE        (1U << 0)
>  #define HOST_ITS_USES_PTA               (1U << 1)
> @@ -108,6 +115,7 @@ struct host_its {
>      void __iomem *its_base;
>      spinlock_t cmd_lock;
>      void *cmd_buf;
> +    unsigned int itte_size;
>      unsigned int flags;
>  };

I would move itte_size and its initialization to the patch that
introduced struct host_its.


> @@ -134,6 +142,16 @@ uint64_t gicv3_get_redist_address(unsigned int cpu, bool use_pta);
>  /* Map a collection for this host CPU to each host ITS. */
>  int gicv3_its_setup_collection(unsigned int cpu);
>  
> +/*
> + * Map a device on the host by allocating an ITT on the host (ITS).
> + * "nr_event" specifies how many events (interrupts) this device will need.
> + * Setting "valid" to false deallocates the device.
> + */
> +int gicv3_its_map_guest_device(struct domain *d,
> +                               paddr_t host_doorbell, uint32_t host_devid,
> +                               paddr_t guest_doorbell, uint32_t guest_devid,
> +                               uint32_t nr_events, bool valid);
> +
>  #else
>  
>  static LIST_HEAD(host_its_list);
> -- 
> 2.9.0
> 

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  parent reply	other threads:[~2017-03-22 22:45 UTC|newest]

Thread overview: 119+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16 11:20 [PATCH v2 00/27] arm64: Dom0 ITS emulation Andre Przywara
2017-03-16 11:20 ` [PATCH v2 01/27] ARM: GICv3 ITS: parse and store ITS subnodes from hardware DT Andre Przywara
2017-03-21 20:17   ` Julien Grall
2017-03-23 10:57     ` Andre Przywara
2017-03-23 17:32       ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 02/27] ARM: GICv3: allocate LPI pending and property table Andre Przywara
2017-03-21 21:23   ` Julien Grall
2017-03-23 14:40     ` Andre Przywara
2017-03-23 17:42       ` Julien Grall
2017-03-23 17:45         ` Stefano Stabellini
2017-03-23 17:49           ` Julien Grall
2017-03-23 18:01             ` Stefano Stabellini
2017-03-23 18:21               ` Andre Przywara
2017-03-24 11:45                 ` Julien Grall
2017-03-24 17:22                   ` Stefano Stabellini
2017-03-21 22:57   ` Stefano Stabellini
2017-03-21 23:08     ` André Przywara
2017-03-21 23:27       ` Stefano Stabellini
2017-03-23 10:50         ` Andre Przywara
2017-03-23 17:47           ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 03/27] ARM: GICv3 ITS: allocate device and collection table Andre Przywara
2017-03-21 23:29   ` Stefano Stabellini
2017-03-22 13:52   ` Julien Grall
2017-03-22 16:08     ` André Przywara
2017-03-22 16:33       ` Julien Grall
2017-03-29 13:58         ` Andre Przywara
2017-03-16 11:20 ` [PATCH v2 04/27] ARM: GICv3 ITS: map ITS command buffer Andre Przywara
2017-03-21 23:48   ` Stefano Stabellini
2017-03-22 15:23   ` Julien Grall
2017-03-22 16:31     ` André Przywara
2017-03-22 16:41       ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 05/27] ARM: GICv3 ITS: introduce ITS command handling Andre Przywara
2017-03-16 15:05   ` Shanker Donthineni
2017-03-16 15:18     ` Andre Przywara
2017-03-22  0:02   ` Stefano Stabellini
2017-03-22 15:59   ` Julien Grall
2017-04-03 10:58     ` Andre Przywara
2017-04-03 11:23       ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 06/27] ARM: GICv3 ITS: introduce device mapping Andre Przywara
2017-03-22 17:29   ` Julien Grall
2017-04-03 20:08     ` Andre Przywara
2017-04-03 20:41       ` Julien Grall
2017-04-04  9:57         ` Andre Przywara
2017-03-22 22:45   ` Stefano Stabellini [this message]
2017-04-03 19:45     ` Andre Przywara
2017-03-30 11:17   ` Vijay Kilari
2017-03-16 11:20 ` [PATCH v2 07/27] ARM: arm64: activate atomic 64-bit accessors Andre Przywara
2017-03-22 17:30   ` Julien Grall
2017-03-22 22:49     ` Stefano Stabellini
2017-03-16 11:20 ` [PATCH v2 08/27] ARM: GICv3 ITS: introduce host LPI array Andre Przywara
2017-03-22 23:38   ` Stefano Stabellini
2017-03-23  8:48     ` Julien Grall
2017-03-23 10:21     ` Andre Przywara
2017-03-23 17:52       ` Stefano Stabellini
2017-03-24 11:54         ` Julien Grall
2017-03-23 19:08   ` Julien Grall
2017-04-03 19:30     ` Andre Przywara
2017-04-03 20:13       ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 09/27] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-03-22 23:44   ` Stefano Stabellini
2017-03-23 20:08     ` André Przywara
2017-03-24 10:59       ` Julien Grall
2017-03-24 11:40   ` Julien Grall
2017-03-24 15:50     ` Andre Przywara
2017-03-24 16:19       ` Julien Grall
2017-03-24 17:26       ` Stefano Stabellini
2017-03-27  9:02         ` Andre Przywara
2017-03-27 14:01           ` Julien Grall
2017-03-27 17:44             ` Stefano Stabellini
2017-03-27 17:49               ` Julien Grall
2017-03-27 18:39                 ` Stefano Stabellini
2017-03-27 21:24                   ` Julien Grall
2017-03-28  7:58                   ` Jan Beulich
2017-03-28 13:12                     ` Julien Grall
2017-03-28 13:34                       ` Jan Beulich
2017-03-16 11:20 ` [PATCH v2 10/27] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-03-24 12:03   ` Julien Grall
2017-04-03 14:18     ` Andre Przywara
2017-04-04 11:49       ` Julien Grall
2017-04-04 12:51         ` Andre Przywara
2017-04-04 12:50           ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 11/27] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-03-16 11:20 ` [PATCH v2 12/27] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-03-24 12:09   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 13/27] ARM: vGICv3: Handle disabled LPIs Andre Przywara
2017-03-24 12:20   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 14/27] ARM: vGICv3: introduce basic ITS emulation bits Andre Przywara
2017-03-16 16:25   ` Shanker Donthineni
2017-03-20 12:17     ` Vijay Kilari
2017-03-24 12:41   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 15/27] ARM: vITS: introduce translation table walks Andre Przywara
2017-03-24 13:00   ` Julien Grall
2017-04-03 18:25     ` Andre Przywara
2017-04-04 15:59       ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 16/27] ARM: vITS: handle CLEAR command Andre Przywara
2017-03-24 14:27   ` Julien Grall
2017-03-24 15:53     ` Andre Przywara
2017-03-24 17:17       ` Stefano Stabellini
2017-03-27  8:44         ` Andre Przywara
2017-03-27 14:12           ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 17/27] ARM: vITS: handle INT command Andre Przywara
2017-03-24 14:38   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 18/27] ARM: vITS: handle MAPC command Andre Przywara
2017-03-16 11:20 ` [PATCH v2 19/27] ARM: vITS: handle MAPD command Andre Przywara
2017-03-24 14:41   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 20/27] ARM: vITS: handle MAPTI command Andre Przywara
2017-03-24 14:54   ` Julien Grall
2017-04-03 18:47     ` Andre Przywara
2017-03-16 11:20 ` [PATCH v2 21/27] ARM: vITS: handle MOVI command Andre Przywara
2017-03-24 15:00   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 22/27] ARM: vITS: handle DISCARD command Andre Przywara
2017-03-16 11:20 ` [PATCH v2 23/27] ARM: vITS: handle INV command Andre Przywara
2017-03-16 11:20 ` [PATCH v2 24/27] ARM: vITS: handle INVALL command Andre Przywara
2017-03-24 15:12   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 25/27] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-03-24 15:18   ` Julien Grall
2017-03-16 11:20 ` [PATCH v2 26/27] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-03-16 11:20 ` [PATCH v2 27/27] ARM: vGIC: advertise LPI support Andre Przywara
2017-03-24 15:25   ` Julien Grall

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