All of lore.kernel.org
 help / color / mirror / Atom feed
From: Stefano Stabellini <sstabellini@kernel.org>
To: Andre Przywara <andre.przywara@linaro.org>
Cc: xen-devel@lists.xenproject.org,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>
Subject: Re: [PATCH v3 27/39] ARM: new VGIC: Handle hardware mapped IRQs
Date: Tue, 27 Mar 2018 15:31:38 -0700 (PDT)	[thread overview]
Message-ID: <alpine.DEB.2.10.1803271531300.12360@sstabellini-ThinkPad-X260> (raw)
In-Reply-To: <20180321163235.12529-28-andre.przywara@linaro.org>

On Wed, 21 Mar 2018, Andre Przywara wrote:
> The VGIC supports virtual IRQs to be connected to a hardware IRQ, so
> when a guest EOIs the virtual interrupt, it affects the state of that
> corresponding interrupt on the hardware side at the same time.
> Implement the interface that the Xen arch/core code expects to connect
> the virtual and the physical world.
> 
> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
> Reviewed-by: Julien Grall <julien.grall@arm.com>

Acked-by: Stefano Stabellini <sstabellini@kernel.org>


> ---
>  xen/arch/arm/vgic/vgic.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 71 insertions(+)
> 
> diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
> index 90041eb071..07866d7243 100644
> --- a/xen/arch/arm/vgic/vgic.c
> +++ b/xen/arch/arm/vgic/vgic.c
> @@ -699,6 +699,77 @@ void vgic_kick_vcpus(struct domain *d)
>      }
>  }
>  
> +struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
> +                                      unsigned int virq)
> +{
> +    struct irq_desc *desc = NULL;
> +    struct vgic_irq *irq = vgic_get_irq(d, v, virq);
> +    unsigned long flags;
> +
> +    if ( !irq )
> +        return NULL;
> +
> +    spin_lock_irqsave(&irq->irq_lock, flags);
> +    if ( irq->hw )
> +    {
> +        ASSERT(irq->hwintid >= VGIC_NR_PRIVATE_IRQS);
> +        desc = irq_to_desc(irq->hwintid);
> +    }
> +    spin_unlock_irqrestore(&irq->irq_lock, flags);
> +
> +    vgic_put_irq(d, irq);
> +
> +    return desc;
> +}
> +
> +/*
> + * was:
> + *      int kvm_vgic_map_phys_irq(struct vcpu *vcpu, u32 virt_irq, u32 phys_irq)
> + *      int kvm_vgic_unmap_phys_irq(struct vcpu *vcpu, unsigned int virt_irq)
> + */
> +int vgic_connect_hw_irq(struct domain *d, struct vcpu *vcpu,
> +                        unsigned int virt_irq, struct irq_desc *desc,
> +                        bool connect)
> +{
> +    struct vgic_irq *irq = vgic_get_irq(d, vcpu, virt_irq);
> +    unsigned long flags;
> +    int ret = 0;
> +
> +    if ( !irq )
> +        return -EINVAL;
> +
> +    spin_lock_irqsave(&irq->irq_lock, flags);
> +
> +    if ( connect )                      /* assign a mapped IRQ */
> +    {
> +        /* The VIRQ should not be already enabled by the guest */
> +        if ( !irq->hw && !irq->enabled )
> +        {
> +            irq->hw = true;
> +            irq->hwintid = desc->irq;
> +        }
> +        else
> +            ret = -EBUSY;
> +    }
> +    else                                /* remove a mapped IRQ */
> +    {
> +        if ( desc && irq->hwintid != desc->irq )
> +        {
> +            ret = -EINVAL;
> +        }
> +        else
> +        {
> +            irq->hw = false;
> +            irq->hwintid = 0;
> +        }
> +    }
> +
> +    spin_unlock_irqrestore(&irq->irq_lock, flags);
> +    vgic_put_irq(d, irq);
> +
> +    return ret;
> +}
> +
>  static unsigned int translate_irq_type(bool is_level)
>  {
>      return is_level ? IRQ_TYPE_LEVEL_HIGH : IRQ_TYPE_EDGE_RISING;
> -- 
> 2.14.1
> 

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  reply	other threads:[~2018-03-27 22:31 UTC|newest]

Thread overview: 122+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-21 16:31 [PATCH v3 00/39] New VGIC(-v2) implementation Andre Przywara
2018-03-21 16:31 ` [PATCH v3 01/39] xen/arm: gic: Read unconditionally the source from the LRs Andre Przywara
2018-03-21 16:31 ` [PATCH v3 02/39] ARM: GIC: add GIC_INVALID to enum gic_version Andre Przywara
2018-03-22  1:39   ` Julien Grall
2018-03-26 20:08   ` Stefano Stabellini
2018-03-21 16:31 ` [PATCH v3 03/39] ARM: GIC: Allow tweaking the active and pending state of an IRQ Andre Przywara
2018-03-22  1:51   ` Julien Grall
2018-03-22 11:11     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 04/39] ARM: GIC: Allow reading pending state of a hardware IRQ Andre Przywara
2018-03-26 20:08   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 05/39] ARM: timer: Handle level triggered IRQs correctly Andre Przywara
2018-03-22  1:58   ` Julien Grall
2018-03-26 20:28   ` Stefano Stabellini
2018-03-27 13:06     ` Andre Przywara
2018-03-27 18:17       ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 06/39] ARM: evtchn: " Andre Przywara
2018-03-22  2:08   ` Julien Grall
2018-03-26 20:08   ` Stefano Stabellini
2018-03-28  0:01   ` Stefano Stabellini
2018-03-28 15:39     ` Andre Przywara
2018-03-28 17:46       ` Stefano Stabellini
2018-03-29  0:34         ` Julien Grall
2018-03-29 13:44         ` Andre Przywara
2018-04-03 13:34     ` Julien Grall
2018-03-21 16:32 ` [PATCH v3 07/39] ARM: vPL011: Use the VGIC's level triggered IRQs handling if available Andre Przywara
2018-03-26 20:20   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 08/39] ARM: new VGIC: Add data structure definitions Andre Przywara
2018-03-26 20:41   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 09/39] ARM: new VGIC: Add accessor to new struct vgic_irq instance Andre Przywara
2018-03-22  2:11   ` Julien Grall
2018-03-26 20:46     ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 10/39] ARM: new VGIC: Implement virtual IRQ injection Andre Przywara
2018-03-26 21:01   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 11/39] Add list_sort() routine from Linux Andre Przywara
2018-03-21 17:01   ` Jan Beulich
2018-03-22  2:14   ` Julien Grall
2018-03-21 16:32 ` [PATCH v3 12/39] ARM: new VGIC: Add IRQ sorting Andre Przywara
2018-03-26 21:16   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 13/39] ARM: new VGIC: Add IRQ sync/flush framework Andre Przywara
2018-03-22  2:16   ` Julien Grall
2018-03-26 21:30   ` Stefano Stabellini
2018-03-27 13:23     ` Andre Przywara
2018-03-27 18:55       ` Stefano Stabellini
2018-03-27 19:20         ` Stefano Stabellini
2018-03-27 22:13           ` André Przywara
2018-03-21 16:32 ` [PATCH v3 14/39] ARM: new VGIC: Add GICv2 world switch backend Andre Przywara
2018-03-22  3:48   ` Julien Grall
2018-03-22 11:04     ` Andre Przywara
2018-03-22 13:55       ` Julien Grall
2018-03-21 16:32 ` [PATCH v3 15/39] ARM: new VGIC: Implement vgic_vcpu_pending_irq Andre Przywara
2018-03-22  3:52   ` Julien Grall
2018-03-22 11:15     ` Andre Przywara
2018-03-26 23:34       ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 16/39] ARM: new VGIC: Add MMIO handling framework Andre Przywara
2018-03-27 20:07   ` Stefano Stabellini
2018-03-28  9:28     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 17/39] ARM: new VGIC: Add GICv2 " Andre Przywara
2018-03-27 20:28   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 18/39] ARM: new VGIC: Add CTLR, TYPER and IIDR handlers Andre Przywara
2018-03-22  7:33   ` Julien Grall
2018-03-27 20:38   ` Stefano Stabellini
2018-03-28 10:36     ` Andre Przywara
2018-03-28 17:20       ` Stefano Stabellini
2018-03-28 17:22       ` [PATCH v3 26/39] ARM: new VGIC: Add SGIPENDR register handlers Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 19/39] ARM: new VGIC: Add ENABLE registers handlers Andre Przywara
2018-03-27 21:06   ` Stefano Stabellini
2018-03-28  9:09     ` Andre Przywara
2018-03-28 17:19       ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 20/39] ARM: new VGIC: Add PENDING " Andre Przywara
2018-03-27 21:14   ` Stefano Stabellini
2018-03-28 14:10     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 21/39] ARM: new VGIC: Add ACTIVE " Andre Przywara
2018-03-27 21:21   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 22/39] ARM: new VGIC: Add PRIORITY " Andre Przywara
2018-03-27 21:24   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 23/39] ARM: new VGIC: Add CONFIG " Andre Przywara
2018-03-27 21:26   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 24/39] ARM: new VGIC: Add TARGET " Andre Przywara
2018-03-27  0:24   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 25/39] ARM: new VGIC: Add SGIR register handler Andre Przywara
2018-03-22  7:54   ` Julien Grall
2018-03-27 22:23   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 26/39] ARM: new VGIC: Add SGIPENDR register handlers Andre Przywara
2018-03-27 22:27   ` Stefano Stabellini
2018-03-28 10:37     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 27/39] ARM: new VGIC: Handle hardware mapped IRQs Andre Przywara
2018-03-27 22:31   ` Stefano Stabellini [this message]
2018-03-21 16:32 ` [PATCH v3 28/39] ARM: new VGIC: Add event channel IRQ handling Andre Przywara
2018-03-27 22:33   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 29/39] ARM: new VGIC: Handle virtual IRQ allocation/reservation Andre Przywara
2018-03-27 22:38   ` Stefano Stabellini
2018-03-28  9:17     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 30/39] ARM: new VGIC: Dump virtual IRQ info Andre Przywara
2018-03-27 22:39   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 31/39] ARM: new VGIC: Provide system register emulation stub Andre Przywara
2018-03-27 22:40   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 32/39] ARM: new VGIC: Implement arch_move_irqs() Andre Przywara
2018-03-26 23:46   ` Stefano Stabellini
2018-03-28 18:47   ` Stefano Stabellini
2018-03-29 14:57     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 33/39] ARM: new VGIC: Add preliminary stub implementation Andre Przywara
2018-03-27 22:48   ` Stefano Stabellini
2018-04-03 13:22     ` Julien Grall
2018-03-21 16:32 ` [PATCH v3 34/39] ARM: new VGIC: vgic-init: register VGIC Andre Przywara
2018-03-22  8:00   ` Julien Grall
2018-03-22 11:18     ` Andre Przywara
2018-03-27 22:50     ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 35/39] ARM: new VGIC: Add vgic_v2_enable Andre Przywara
2018-03-27 22:51   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 36/39] ARM: new VGIC: vgic-init: implement vgic_init Andre Przywara
2018-03-22  8:01   ` Julien Grall
2018-03-27 23:16   ` Stefano Stabellini
2018-03-28  0:06     ` Stefano Stabellini
2018-03-28 10:49     ` Andre Przywara
2018-03-21 16:32 ` [PATCH v3 37/39] ARM: new VGIC: vgic-init: implement map_resources Andre Przywara
2018-03-27 23:09   ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 38/39] ARM: new VGIC: Allocate two pages for struct vcpu Andre Przywara
2018-03-22  8:11   ` Julien Grall
2018-03-27 23:07     ` Stefano Stabellini
2018-03-21 16:32 ` [PATCH v3 39/39] ARM: VGIC: wire new VGIC(-v2) files into Xen build system Andre Przywara
2018-03-22  8:16   ` Julien Grall
2018-03-22 10:39     ` Andre Przywara

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=alpine.DEB.2.10.1803271531300.12360@sstabellini-ThinkPad-X260 \
    --to=sstabellini@kernel.org \
    --cc=andre.przywara@linaro.org \
    --cc=julien.grall@arm.com \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.