* Xen optimization
@ 2018-10-09 10:59 Milan Boberic
2018-10-09 16:46 ` Dario Faggioli
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-09 10:59 UTC (permalink / raw)
To: xen-devel
Hi,
I'm testing Xen Hypervisor 4.10 performance on UltraZed-EG board with
carrier card.
I created bare-metal application in Xilinx SDK.
In bm application I:
- start triple timer counter (ttc) which generates
interrupt every 1us
- turn on PS LED
- call function 100 times in for loop (function that sets
some values)
- turn off LED
- stop triple timer counter
- reset counter value
I ran this bare-metal application under Xen Hypervisor with following settings:
- used null scheduler (sched=null) and vwfi=native
- bare-metal application have one vCPU and it is pinned for pCPU1
- domain which is PetaLinux also have one vCPU pinned for pCPU0,
other pCPUs are unused.
Under Xen Hypervisor I can see 3us jitter on oscilloscope.
When I ran same bm application with JTAG from Xilinx SDK (without Xen
Hypervisor, directly on the board) there is no jitter.
I'm curios what causes this 3us jitter in Xen (which isn't small
jitter at all) and is there any way of decreasing it?
Also I would gladly accept any suggestion about increasing
performance, decreasing jitter, decreasing interrupt latency, etc.
Thanks in advance, Milan Boberic.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-09 10:59 Xen optimization Milan Boberic
@ 2018-10-09 16:46 ` Dario Faggioli
2018-10-10 11:22 ` Milan Boberic
2018-11-07 13:14 ` Julien Grall
0 siblings, 2 replies; 70+ messages in thread
From: Dario Faggioli @ 2018-10-09 16:46 UTC (permalink / raw)
To: Milan Boberic, xen-devel
Cc: Meng Xu, Julien Grall, sstabellini, Andrii Anisov
[-- Attachment #1.1: Type: text/plain, Size: 2885 bytes --]
On Tue, 2018-10-09 at 12:59 +0200, Milan Boberic wrote:
> Hi,
>
Hi Milan,
> I'm testing Xen Hypervisor 4.10 performance on UltraZed-EG board with
> carrier card.
> I created bare-metal application in Xilinx SDK.
> In bm application I:
> - start triple timer counter (ttc) which generates
> interrupt every 1us
> - turn on PS LED
> - call function 100 times in for loop (function that sets
> some values)
> - turn off LED
> - stop triple timer counter
> - reset counter value
>
Ok, I'm adding Stefano, Julien, and a couple of other people interested
in RT/lowlat on Xen.
> I ran this bare-metal application under Xen Hypervisor with following
> settings:
> - used null scheduler (sched=null) and vwfi=native
> - bare-metal application have one vCPU and it is pinned for pCPU1
> - domain which is PetaLinux also have one vCPU pinned for pCPU0,
> other pCPUs are unused.
> Under Xen Hypervisor I can see 3us jitter on oscilloscope.
>
So, this is probably me not being familiar with Xen on Xilinx (and with
Xen on ARM as a whole), but there's a few things I'm not sure I
understand:
- you say you use sched=null _and_ pinning? That should not be
necessary (although, it shouldn't hurt either)
- "domain which is PetaLinux", is that dom0?
IAC, if it's not terrible hard to run this kind of test, I'd say, try
without 'vwfi=native', and also with another scheduler, like Credit,
(but then do make sure you use pinning).
> When I ran same bm application with JTAG from Xilinx SDK (without Xen
> Hypervisor, directly on the board) there is no jitter.
>
Here, when you say "without Xen", do you also mean without any
baremetal OS at all?
> I'm curios what causes this 3us jitter in Xen (which isn't small
> jitter at all) and is there any way of decreasing it?
>
Right. So, I'm not sure I've understood the test scenario either. But
yeah, 3us jitter seems significant. Still, if we're comparing with
bare-hw, without even an OS at all, I think it could have been expected
for latency and jitter to be higher in the Xen case.
Anyway, I am not sure anyone has done a kind of analysis that could
help us identify accurately from where things like that come, and in
what proportions.
It would be really awesome to have something like that, so do go ahead
if you feel like it. :-)
I think tracing could help a little (although we don't have a super-
sophisticated tracing infrastructure like Linux's perf and such), but
sadly enough, that's still not available on ARM, I think. :-/
Regards,
Dario
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-09 16:46 ` Dario Faggioli
@ 2018-10-10 11:22 ` Milan Boberic
2018-10-10 11:25 ` Milan Boberic
2018-10-10 16:41 ` Meng Xu
2018-11-07 13:14 ` Julien Grall
1 sibling, 2 replies; 70+ messages in thread
From: Milan Boberic @ 2018-10-10 11:22 UTC (permalink / raw)
To: Dario Faggioli
Cc: xen-devel, julien.grall, sstabellini, andrii_anisov, xumengpanda
Hi,
sorry, my explanation wasn't precise and I missed the point.
vCPU pinning with sched=null I put "just in case", because it doesn't hurt.
Yes, PetaLinux domain is dom0.
Tested with Credit scheduler before (it was just the LED blink
application but anyway), it results with bigger jitter then null
scheduler. For example, with Credit scheduler LED blinking result in
approximately 3us jitter where with null scheduler there is no jitter.
vwfi=native was giving the domain destruction problem which you fixed
by sending me patch, approximately 2 weeks ago if you recall :) but I
still didn't test it's impact on performance, I will do it ASAP and
share results (I think that without vwfi=native jitter will be the
same or even bigger).
When I say "without Xen", yes, I mean without any OS. Just hardware
and this bare-metal app. I do expect latency to be higher in the Xen
case and I'm curious how much exactly (which is the point of my work
and also master thesis for my faculty :D).
Now, the point is that when I set only LED blinking (without timer) in
my application there is no jitter (in Xen case) but when I add timer
which generates interrupt every us, jitter of 3 us occurs. Timer I use
is zynq ultrascale's triple timer counter. I'm suspecting that timer
interrupt is creating that jitter.
For interrupts I use passthrough in bare-metal application's
configuration file (which works for GPIO LED because there is no
jitter, interrupt can "freely go" from guest domain directly to GPIO
LED).
Also, when I create guest domain (which is this bare-metal
application) I get this messages:
(XEN) printk: 54 messages suppressed.
(XEN) d2v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
root@uz3eg-iocc-2018-2:~# (XEN) d2v0 No valid vCPU found for vIRQ34 in
the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ35 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
(XEN) d2v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
In attachments I included dmesg, xl dmesg and bare-metal application's
configuration file.
Thanks in advance, Milan Boberic.
On Tue, Oct 9, 2018 at 6:46 PM Dario Faggioli <dfaggioli@suse.com> wrote:
>
> On Tue, 2018-10-09 at 12:59 +0200, Milan Boberic wrote:
> > Hi,
> >
> Hi Milan,
>
> > I'm testing Xen Hypervisor 4.10 performance on UltraZed-EG board with
> > carrier card.
> > I created bare-metal application in Xilinx SDK.
> > In bm application I:
> > - start triple timer counter (ttc) which generates
> > interrupt every 1us
> > - turn on PS LED
> > - call function 100 times in for loop (function that sets
> > some values)
> > - turn off LED
> > - stop triple timer counter
> > - reset counter value
> >
> Ok, I'm adding Stefano, Julien, and a couple of other people interested
> in RT/lowlat on Xen.
>
> > I ran this bare-metal application under Xen Hypervisor with following
> > settings:
> > - used null scheduler (sched=null) and vwfi=native
> > - bare-metal application have one vCPU and it is pinned for pCPU1
> > - domain which is PetaLinux also have one vCPU pinned for pCPU0,
> > other pCPUs are unused.
> > Under Xen Hypervisor I can see 3us jitter on oscilloscope.
> >
> So, this is probably me not being familiar with Xen on Xilinx (and with
> Xen on ARM as a whole), but there's a few things I'm not sure I
> understand:
> - you say you use sched=null _and_ pinning? That should not be
> necessary (although, it shouldn't hurt either)
> - "domain which is PetaLinux", is that dom0?
>
> IAC, if it's not terrible hard to run this kind of test, I'd say, try
> without 'vwfi=native', and also with another scheduler, like Credit,
> (but then do make sure you use pinning).
>
> > When I ran same bm application with JTAG from Xilinx SDK (without Xen
> > Hypervisor, directly on the board) there is no jitter.
> >
> Here, when you say "without Xen", do you also mean without any
> baremetal OS at all?
>
> > I'm curios what causes this 3us jitter in Xen (which isn't small
> > jitter at all) and is there any way of decreasing it?
> >
> Right. So, I'm not sure I've understood the test scenario either. But
> yeah, 3us jitter seems significant. Still, if we're comparing with
> bare-hw, without even an OS at all, I think it could have been expected
> for latency and jitter to be higher in the Xen case.
>
> Anyway, I am not sure anyone has done a kind of analysis that could
> help us identify accurately from where things like that come, and in
> what proportions.
>
> It would be really awesome to have something like that, so do go ahead
> if you feel like it. :-)
>
> I think tracing could help a little (although we don't have a super-
> sophisticated tracing infrastructure like Linux's perf and such), but
> sadly enough, that's still not available on ARM, I think. :-/
>
> Regards,
> Dario
> --
> <<This happens because I choose it to happen!>> (Raistlin Majere)
> -----------------------------------------------------------------
> Dario Faggioli, Ph.D, http://about.me/dario.faggioli
> Software Engineer @ SUSE https://www.suse.com/
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-10 11:22 ` Milan Boberic
@ 2018-10-10 11:25 ` Milan Boberic
2018-10-10 16:41 ` Meng Xu
1 sibling, 0 replies; 70+ messages in thread
From: Milan Boberic @ 2018-10-10 11:25 UTC (permalink / raw)
To: Dario Faggioli
Cc: xen-devel, julien.grall, sstabellini, andrii_anisov, xumengpanda
[-- Attachment #1: Type: text/plain, Size: 13 bytes --]
Attachments.
[-- Attachment #2: timer.cfg.txt --]
[-- Type: text/plain, Size: 227 bytes --]
name = "test"
kernel = "timer.bin"
memory = 8
vcpus = 1
cpus = [1]
irqs = [ 48, 54, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79 ]
iomem = [ "0xff010,1", "0xff110,1", "0xff120,1", "0xff130,1", "0xff140,1", "0xff0a0,1" ]
[-- Attachment #3: dmesg.txt --]
[-- Type: text/plain, Size: 24493 bytes --]
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.14.0-xilinx-v2018.2 (oe-user@oe-host) (gcc version 7.2.0 (GCC)) #1 SMP Mon Oct 1 16:41:32 CEST 2018
[ 0.000000] Boot CPU: AArch64 Processor [410fd034]
[ 0.000000] Machine model: xlnx,zynqmp
[ 0.000000] Xen 4.10 support found
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 256 MiB at 0x0000000060000000
[ 0.000000] On node 0 totalpages: 196608
[ 0.000000] DMA zone: 2688 pages used for memmap
[ 0.000000] DMA zone: 0 pages reserved
[ 0.000000] DMA zone: 196608 pages, LIFO batch:31
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] random: fast init done
[ 0.000000] percpu: Embedded 21 pages/cpu @ffffffc03ffb7000 s46488 r8192 d31336 u86016
[ 0.000000] pcpu-alloc: s46488 r8192 d31336 u86016 alloc=21*4096
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: enabling workaround for ARM erratum 845719
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 193920
[ 0.000000] Kernel command line: console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
[ 0.000000] Memory: 423788K/786432K available (9980K kernel code, 644K rwdata, 3132K rodata, 512K init, 2168K bss, 100500K reserved, 262144K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB)
[ 0.000000] vmalloc : 0xffffff8008000000 - 0xffffffbebfff0000 ( 250 GB)
[ 0.000000] .text : 0xffffff8008080000 - 0xffffff8008a40000 ( 9984 KB)
[ 0.000000] .rodata : 0xffffff8008a40000 - 0xffffff8008d60000 ( 3200 KB)
[ 0.000000] .init : 0xffffff8008d60000 - 0xffffff8008de0000 ( 512 KB)
[ 0.000000] .data : 0xffffff8008de0000 - 0xffffff8008e81200 ( 645 KB)
[ 0.000000] .bss : 0xffffff8008e81200 - 0xffffff800909f2b0 ( 2169 KB)
[ 0.000000] fixed : 0xffffffbefe7fd000 - 0xffffffbefec00000 ( 4108 KB)
[ 0.000000] PCI I/O : 0xffffffbefee00000 - 0xffffffbeffe00000 ( 16 MB)
[ 0.000000] vmemmap : 0xffffffbf00000000 - 0xffffffc000000000 ( 4 GB maximum)
[ 0.000000] 0xffffffbf00700000 - 0xffffffbf01880000 ( 17 MB actual)
[ 0.000000] memory : 0xffffffc020000000 - 0xffffffc070000000 ( 1280 MB)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] RCU event tracing is enabled.
[ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] arch_timer: cp15 timer(s) running at 99.99MHz (virt).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171015c90f, max_idle_ns: 440795203080 ns
[ 0.000003] sched_clock: 56 bits at 99MHz, resolution 10ns, wraps every 4398046511101ns
[ 0.000287] Console: colour dummy device 80x25
[ 0.283041] console [hvc0] enabled
[ 0.286513] Calibrating delay loop (skipped), value calculated using timer frequency.. 199.99 BogoMIPS (lpj=399996)
[ 0.296969] pid_max: default: 32768 minimum: 301
[ 0.301730] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.308393] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.316319] ASID allocator initialised with 65536 entries
[ 0.321502] xen:grant_table: Grant tables using version 1 layout
[ 0.327092] Grant table initialized
[ 0.330637] xen:events: Using FIFO-based ABI
[ 0.334961] Xen: initializing cpu0
[ 0.338469] Hierarchical SRCU implementation.
[ 0.343130] EFI services will not be available.
[ 0.347423] zynqmp_plat_init Platform Management API v1.0
[ 0.352852] zynqmp_plat_init Trustzone version v1.0
[ 0.357828] smp: Bringing up secondary CPUs ...
[ 0.362366] smp: Brought up 1 node, 1 CPU
[ 0.366430] SMP: Total of 1 processors activated.
[ 0.371189] CPU features: detected feature: 32-bit EL0 Support
[ 0.377073] CPU: All CPU(s) started at EL1
[ 0.381231] alternatives: patching kernel code
[ 0.386133] devtmpfs: initialized
[ 0.392766] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.398876] futex hash table entries: 256 (order: 3, 32768 bytes)
[ 0.410960] xor: measuring software checksum speed
[ 0.449188] 8regs : 2111.000 MB/sec
[ 0.489240] 8regs_prefetch: 1882.000 MB/sec
[ 0.529297] 32regs : 2594.000 MB/sec
[ 0.569354] 32regs_prefetch: 2180.000 MB/sec
[ 0.569392] xor: using function: 32regs (2594.000 MB/sec)
[ 0.573949] pinctrl core: initialized pinctrl subsystem
[ 0.580431] NET: Registered protocol family 16
[ 0.585018] vdso: 2 pages (1 code @ ffffff8008a46000, 1 data @ ffffff8008de4000)
[ 0.591095] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.598970] DMA: preallocated 256 KiB pool for atomic allocations
[ 0.604122] xen:swiotlb_xen: Warning: only able to allocate 4 MB for software IO TLB
[ 0.612974] software IO TLB [mem 0x3d400000-0x3d800000] (4MB) mapped at [ffffffc03d400000-ffffffc03d7fffff]
[ 0.654800] reset_zynqmp reset-controller: Xilinx zynqmp reset driver probed
[ 0.656788] ARM CCI_400_r1 PMU driver probed
[ 0.662113] zynqmp-pinctrl ff180000.pinctrl: zynqmp pinctrl initialized
[ 0.698156] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.763891] raid6: int64x1 gen() 368 MB/s
[ 0.832000] raid6: int64x1 xor() 408 MB/s
[ 0.900185] raid6: int64x2 gen() 631 MB/s
[ 0.968264] raid6: int64x2 xor() 552 MB/s
[ 1.036338] raid6: int64x4 gen() 956 MB/s
[ 1.104483] raid6: int64x4 xor() 680 MB/s
[ 1.172581] raid6: int64x8 gen() 898 MB/s
[ 1.240703] raid6: int64x8 xor() 683 MB/s
[ 1.308786] raid6: neonx1 gen() 666 MB/s
[ 1.376923] raid6: neonx1 xor() 782 MB/s
[ 1.445050] raid6: neonx2 gen() 1072 MB/s
[ 1.513126] raid6: neonx2 xor() 1102 MB/s
[ 1.581250] raid6: neonx4 gen() 1377 MB/s
[ 1.649367] raid6: neonx4 xor() 1317 MB/s
[ 1.717502] raid6: neonx8 gen() 1511 MB/s
[ 1.785597] raid6: neonx8 xor() 1399 MB/s
[ 1.785634] raid6: using algorithm neonx8 gen() 1511 MB/s
[ 1.789768] raid6: .... xor() 1399 MB/s, rmw enabled
[ 1.794783] raid6: using neon recovery algorithm
[ 1.800726] XGpio: /amba_pl@0/gpio@80000000: registered, base is 504
[ 1.806658] XGpio: /amba_pl@0/gpio@80001000: registered, base is 496
[ 1.812635] XGpio: /amba_pl@0/gpio@80002000: registered, base is 493
[ 1.819065] xen:balloon: Initialising balloon driver
[ 1.824091] SCSI subsystem initialized
[ 1.827509] libata version 3.00 loaded.
[ 1.827636] usbcore: registered new interface driver usbfs
[ 1.833048] usbcore: registered new interface driver hub
[ 1.838407] usbcore: registered new device driver usb
[ 1.843544] media: Linux media interface: v0.10
[ 1.848087] Linux video capture interface: v2.00
[ 1.852771] pps_core: LinuxPPS API ver. 1 registered
[ 1.857756] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 1.866935] PTP clock support registered
[ 1.870918] EDAC MC: Ver: 3.0.0
[ 1.876503] zynqmp-ipi ff9905c0.mailbox: Probed ZynqMP IPI Mailbox driver.
[ 1.881201] FPGA manager framework
[ 1.884585] fpga-region fpga-full: FPGA Region probed
[ 1.889673] Advanced Linux Sound Architecture Driver Initialized.
[ 1.895990] Bluetooth: Core ver 2.22
[ 1.899385] NET: Registered protocol family 31
[ 1.903862] Bluetooth: HCI device and connection manager initialized
[ 1.910266] Bluetooth: HCI socket layer initialized
[ 1.915195] Bluetooth: L2CAP socket layer initialized
[ 1.920307] Bluetooth: SCO socket layer initialized
[ 1.927082] clocksource: Switched to clocksource arch_sys_counter
[ 1.931468] VFS: Disk quotas dquot_6.6.0
[ 1.935393] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 1.949939] NET: Registered protocol family 2
[ 1.950327] TCP established hash table entries: 8192 (order: 4, 65536 bytes)
[ 1.955919] TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
[ 1.962552] TCP: Hash tables configured (established 8192 bind 8192)
[ 1.968902] UDP hash table entries: 512 (order: 2, 16384 bytes)
[ 1.974814] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[ 1.981291] NET: Registered protocol family 1
[ 1.986504] RPC: Registered named UNIX socket transport module.
[ 1.991581] RPC: Registered udp transport module.
[ 1.996332] RPC: Registered tcp transport module.
[ 2.001088] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 2.007581] PCI: CLS 0 bytes, default 128
[ 2.007695] Trying to unpack rootfs image as initramfs...
[ 4.322139] Freeing initrd memory: 53404K
[ 4.323112] audit: initializing netlink subsys (disabled)
[ 4.326931] audit: type=2000 audit(4.088:1): state=initialized audit_enabled=0 res=1
[ 4.334016] workingset: timestamp_bits=62 max_order=18 bucket_order=0
[ 4.341119] NFS: Registering the id_resolver key type
[ 4.345475] Key type id_resolver registered
[ 4.349683] Key type id_legacy registered
[ 4.353753] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 4.360508] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
[ 4.396670] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
[ 4.398516] io scheduler noop registered
[ 4.402511] io scheduler deadline registered
[ 4.406843] io scheduler cfq registered (default)
[ 4.411583] io scheduler mq-deadline registered
[ 4.416167] io scheduler kyber registered
[ 4.421231] OF: /amba/dma@fd500000: could not find phandle
[ 4.426088] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
[ 4.432817] OF: /amba/dma@fd510000: could not find phandle
[ 4.438433] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
[ 4.445356] OF: /amba/dma@fd520000: could not find phandle
[ 4.450969] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
[ 4.457894] OF: /amba/dma@fd530000: could not find phandle
[ 4.463516] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
[ 4.470438] OF: /amba/dma@fd540000: could not find phandle
[ 4.476061] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
[ 4.482980] OF: /amba/dma@fd550000: could not find phandle
[ 4.488607] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
[ 4.495522] OF: /amba/dma@fd560000: could not find phandle
[ 4.501142] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
[ 4.508065] OF: /amba/dma@fd570000: could not find phandle
[ 4.513683] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
[ 4.520803] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
[ 4.527735] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
[ 4.534734] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
[ 4.541743] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
[ 4.548751] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
[ 4.555753] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
[ 4.562763] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
[ 4.569771] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
[ 4.579807] xen:xen_evtchn: Event-channel device installed
[ 4.634050] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 4.638870] cacheinfo: Unable to detect cache hierarchy for CPU 0
[ 4.647709] brd: module loaded
[ 4.652261] loop: module loaded
[ 4.652307] Invalid max_queues (4), will use default max: 1.
[ 4.656314] OF: /amba/ahci@fd0c0000: could not find phandle
[ 4.661516] ahci-ceva fd0c0000.ahci: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl platform mode
[ 4.670211] ahci-ceva fd0c0000.ahci: flags: 64bit ncq sntf pm clo only pmp fbs pio slum part ccc sds apst
[ 4.681967] scsi host0: ahci-ceva
[ 4.683579] scsi host1: ahci-ceva
[ 4.686741] ata1: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x100 irq 32
[ 4.694609] ata2: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x180 irq 32
[ 4.702703] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 4.709362] OF: /amba/spi@ff0f0000: could not find phandle
[ 4.715859] m25p80 spi0.0: found n25q256a, expected m25p80
[ 4.720463] m25p80 spi0.0: n25q256a (65536 Kbytes)
[ 4.724983] 3 ofpart partitions found on MTD device spi0.0
[ 4.730494] Creating 3 MTD partitions on "spi0.0":
[ 4.735342] 0x000000000000-0x000001360000 : "boot"
[ 4.740720] 0x000001360000-0x0000013a0000 : "bootenv"
[ 4.745865] 0x0000013a0000-0x000002aa0000 : "kernel"
[ 4.751793] libphy: Fixed MDIO Bus: probed
[ 4.755516] tun: Universal TUN/TAP device driver, 1.6
[ 4.766079] CAN device driver interface
[ 4.766526] OF: /amba/ethernet@ff0e0000: could not find phandle
[ 4.770724] macb ff0e0000.ethernet: Not enabling partial store and forward
[ 4.777779] libphy: MACB_mii_bus: probed
[ 4.785813] macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 25 (00:0a:35:00:22:01)
[ 4.791133] TI DP83867 ff0e0000.ethernet-ffffffff:09: attached PHY driver [TI DP83867] (mii_bus:phy_addr=ff0e0000.ethernet-ffffffff:09, irq=POLL)
[ 4.804738] xen_netfront: Initialising Xen virtual ethernet driver
[ 4.810474] usbcore: registered new interface driver asix
[ 4.815885] usbcore: registered new interface driver ax88179_178a
[ 4.822018] usbcore: registered new interface driver cdc_ether
[ 4.827902] usbcore: registered new interface driver net1080
[ 4.833608] usbcore: registered new interface driver cdc_subset
[ 4.839576] usbcore: registered new interface driver zaurus
[ 4.845208] usbcore: registered new interface driver cdc_ncm
[ 4.852200] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APM
[ 4.857592] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 4.863776] ehci-pci: EHCI PCI platform driver
[ 4.868541] usbcore: registered new interface driver cdc_acm
[ 4.873982] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
[ 4.882052] usbcore: registered new interface driver uas
[ 4.887421] usbcore: registered new interface driver usb-storage
[ 4.894721] rtc_zynqmp ffa60000.rtc: rtc core: registered ffa60000.rtc as rtc0
[ 4.900767] i2c /dev entries driver
[ 4.904995] cdns-i2c ff030000.i2c: 400 kHz mmio ff030000 irq 26
[ 4.939491] i2c i2c-0: Added multiplexed i2c bus 1
[ 4.939739] i2c i2c-0: Added multiplexed i2c bus 2
[ 4.943592] pca954x 0-0070: registered 2 multiplexed busses for I2C mux pca9542
[ 4.951022] IR NEC protocol handler initialized
[ 4.955519] IR RC5(x/sz) protocol handler initialized
[ 4.960621] IR RC6 protocol handler initialized
[ 4.965204] IR JVC protocol handler initialized
[ 4.969789] IR Sony protocol handler initialized
[ 4.974460] IR SANYO protocol handler initialized
[ 4.979217] IR Sharp protocol handler initialized
[ 4.983975] IR MCE Keyboard/mouse protocol handler initialized
[ 4.989857] IR XMP protocol handler initialized
[ 4.995444] usbcore: registered new interface driver uvcvideo
[ 5.000239] USB Video Class driver (1.1.1)
[ 5.006406] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer at ffffff800917d000 with timeout 10s
[ 5.013812] Bluetooth: HCI UART driver ver 2.3
[ 5.017892] Bluetooth: HCI UART protocol H4 registered
[ 5.023080] Bluetooth: HCI UART protocol BCSP registered
[ 5.028459] Bluetooth: HCI UART protocol LL registered
[ 5.033629] Bluetooth: HCI UART protocol ATH3K registered
[ 5.039077] Bluetooth: HCI UART protocol Three-wire (H5) registered
[ 5.045429] Bluetooth: HCI UART protocol Intel registered
[ 5.050842] Bluetooth: HCI UART protocol QCA registered
[ 5.056150] usbcore: registered new interface driver bcm203x
[ 5.061856] usbcore: registered new interface driver bpa10x
[ 5.067481] usbcore: registered new interface driver bfusb
[ 5.073014] usbcore: registered new interface driver btusb
[ 5.078522] Bluetooth: Generic Bluetooth SDIO driver ver 0.1
[ 5.084277] usbcore: registered new interface driver ath3k
[ 5.089895] EDAC MC: ECC not enabled
[ 5.093553] EDAC DEVICE0: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
[ 5.105866] cpu cpu0: failed to get clock: -2
[ 5.110015] cpufreq-dt: probe of cpufreq-dt failed with error -2
[ 5.116203] sdhci: Secure Digital Host Controller Interface driver
[ 5.122292] sdhci: Copyright(c) Pierre Ossman
[ 5.126702] sdhci-pltfm: SDHCI platform and OF driver helper
[ 5.132517] OF: /amba/sdhci@ff160000: could not find phandle
[ 5.138847] ata1: SATA link down (SStatus 0 SControl 330)
[ 5.143620] ata2: SATA link down (SStatus 0 SControl 330)
[ 5.195067] mmc0: SDHCI controller on ff160000.sdhci [ff160000.sdhci] using ADMA 64-bit
[ 5.197561] PLL: shutdown
[ 5.200290] PLL: enable
[ 5.208434] OF: /amba/sdhci@ff170000: could not find phandle
[ 5.251063] mmc1: SDHCI controller on ff170000.sdhci [ff170000.sdhci] using ADMA 64-bit
[ 5.259459] ledtrig-cpu: registered to indicate activity on CPUs
[ 5.260099] usbcore: registered new interface driver usbhid
[ 5.265539] usbhid: USB HID core driver
[ 5.278250] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
[ 5.280611] pktgen: Packet Generator for packet performance testing. Version: 2.75
[ 5.287441] Netfilter messages via NETLINK v0.30.
[ 5.291637] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 5.296906] Initializing XFRM netlink socket
[ 5.301255] NET: Registered protocol family 10
[ 5.306206] Segment Routing with IPv6
[ 5.309461] ip6_tables: (C) 2000-2006 Netfilter Core Team
[ 5.314887] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 5.321148] NET: Registered protocol family 17
[ 5.325337] NET: Registered protocol family 15
[ 5.329834] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[ 5.342799] Ebtables v2.0 registered
[ 5.352053] can: controller area network core (rev 20170425 abi 9)
[ 5.352711] NET: Registered protocol family 29
[ 5.357184] can: raw protocol (rev 20170425)
[ 5.361503] can: broadcast manager protocol (rev 20170425 t)
[ 5.367213] can: netlink gateway (rev 20170425) max_hops=1
[ 5.372824] Bluetooth: RFCOMM TTY layer initialized
[ 5.377692] Bluetooth: RFCOMM socket layer initialized
[ 5.382873] Bluetooth: RFCOMM ver 1.11
[ 5.386675] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[ 5.392035] Bluetooth: BNEP filters: protocol multicast
[ 5.397314] Bluetooth: BNEP socket layer initialized
[ 5.402328] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
[ 5.408299] Bluetooth: HIDP socket layer initialized
[ 5.413430] 9pnet: Installing 9P2000 support
[ 5.417652] Key type dns_resolver registered
[ 5.422261] mmc0: new HS200 MMC card at address 0001
[ 5.427347] mmcblk0: mmc0:0001 Q2J55L 7.09 GiB
[ 5.431649] mmcblk0boot0: mmc0:0001 Q2J55L partition 1 16.0 MiB
[ 5.437620] mmcblk0boot1: mmc0:0001 Q2J55L partition 2 16.0 MiB
[ 5.443604] mmcblk0rpmb: mmc0:0001 Q2J55L partition 3 4.00 MiB
[ 5.450074] registered taskstats version 1
[ 5.453963] mmcblk0: p1
[ 5.457684] Btrfs loaded, crc32c=crc32c-generic
[ 5.467588] dwc3-of-simple ff9d0000.usb0: dwc3_simple_set_phydata: Can't find usb3-phy
[ 5.470363] OF: /amba/usb0@ff9d0000/dwc3@fe200000: could not find phandle
[ 5.477731] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 5.482353] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
[ 5.490413] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x22010010
[ 5.498827] xhci-hcd xhci-hcd.0.auto: irq 57, io mem 0xfe200000
[ 5.504879] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 5.511580] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 5.518831] usb usb1: Product: xHCI Host Controller
[ 5.523760] usb usb1: Manufacturer: Linux 4.14.0-xilinx-v2018.2 xhci-hcd
[ 5.530507] usb usb1: SerialNumber: xhci-hcd.0.auto
[ 5.536419] mmc1: new high speed SDHC card at address 1234
[ 5.541302] hub 1-0:1.0: USB hub found
[ 5.544912] mmcblk1: mmc1:1234 SA08G 7.21 GiB (ro)
[ 5.549800] hub 1-0:1.0: 1 port detected
[ 5.553973] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 5.559159] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
[ 5.566952] mmcblk1: p1
[ 5.569918] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[ 5.577662] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
[ 5.584404] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 5.591665] usb usb2: Product: xHCI Host Controller
[ 5.596595] usb usb2: Manufacturer: Linux 4.14.0-xilinx-v2018.2 xhci-hcd
[ 5.603341] usb usb2: SerialNumber: xhci-hcd.0.auto
[ 5.608543] hub 2-0:1.0: USB hub found
[ 5.612183] hub 2-0:1.0: 1 port detected
[ 5.617168] rtc_zynqmp ffa60000.rtc: setting system clock to 2018-10-02 09:20:20 UTC (1538472020)
[ 5.625073] clk: Not disabling unused clocks
[ 5.629338] ALSA device list:
[ 5.632317] No soundcards found.
[ 5.636538] Freeing unused kernel memory: 512K
[ 5.716044] udevd[1716]: starting version 3.2.2
[ 5.723587] udevd[1717]: starting eudev-3.2.2
[ 6.749056] export_store: invalid GPIO 350
[ 6.749162] blinky[1977]: unhandled level 2 translation fault (11) at 0x00000000, esr 0x92000006, in libc-2.26.so[7f9ba55000+138000]
[ 6.761073] CPU: 0 PID: 1977 Comm: blinky Not tainted 4.14.0-xilinx-v2018.2 #1
[ 6.768318] Hardware name: xlnx,zynqmp (DT)
[ 6.772556] task: ffffffc03cf00180 task.stack: ffffff800b320000
[ 6.778525] PC is at 0x7f9bab6abc
[ 6.781896] LR is at 0x400dfc
[ 6.784928] pc : [<0000007f9bab6abc>] lr : [<0000000000400dfc>] pstate: 60000000
[ 6.792362] sp : 0000007ff93fdbb0
[ 6.795736] x29: 0000007ff93fdbb0 x28: 0000000000000000
[ 6.801099] x27: 0000000000000000 x26: 0000007ff93feedf
[ 6.806462] x25: 0000007ff93fdcc4 x24: 0000000000401140
[ 6.811825] x23: 0000000000412000 x22: 0000000000000003
[ 6.817188] x21: 0000000000000001 x20: 0000007ff93fdc18
[ 6.822551] x19: 0000000000000000 x18: 0000007ff93fd95d
[ 6.827921] x17: 0000007f9bab6aa0 x16: 0000000000412058
[ 6.833278] x15: 000000000000000a x14: 000000000000015e
[ 6.838640] x13: 0000000000000000 x12: 0000000000000000
[ 6.844003] x11: 0000000000000020 x10: 0000007ff93fd960
[ 6.849366] x9 : 0000000000000000 x8 : 0000000000000038
[ 6.854729] x7 : 0000000000000000 x6 : 0000000000401126
[ 6.860093] x5 : 0000000000000000 x4 : 0000000000945260
[ 6.865456] x3 : 0000000000000000 x2 : 0000000000000001
[ 6.870818] x1 : 0000000000000001 x0 : 0000007ff93fdc18
[ 7.073111] pps pps0: new PPS source ptp0
[ 7.073169] macb ff0e0000.ethernet: gem-ptp-timer ptp clock registered.
[ 7.078333] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 9.099345] macb ff0e0000.ethernet eth0: link up (1000/Full)
[ 9.099472] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 225.260838] random: crng init done
[-- Attachment #4: xl dmest.txt --]
[-- Type: text/plain, Size: 5077 bytes --]
(XEN) Checking for initrd in /chosen
(XEN) Initrd 0000000002bd8000-0000000005fffe60
(XEN) RAM: 0000000000000000 - 000000007fefffff
(XEN)
(XEN) MODULE[0]: 0000000007ff4000 - 0000000007ffc080 Device Tree
(XEN) MODULE[1]: 0000000002bd8000 - 0000000005fffe60 Ramdisk
(XEN) MODULE[2]: 0000000000080000 - 0000000003180000 Kernel
(XEN) RESVD[0]: 0000000007ff4000 - 0000000007ffc000
(XEN) RESVD[1]: 0000000002bd8000 - 0000000005fffe60
(XEN)
(XEN) Command line: console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native
(XEN) Placing Xen at 0x000000007fc00000-0x000000007fe00000
(XEN) Update BOOTMOD_XEN from 0000000006000000-0000000006108d81 => 000000007fc00000-000000007fd08d81
(XEN) Domain heap initialised
(XEN) Booting using Device Tree
(XEN) Looking for dtuart at "serial0", options ""
Xen 4.10.1-pre
(XEN) Xen version 4.10.1-pre (milan@) (aarch64-xilinx-linux-gcc (GCC) 7.2.0) debug=n Mon Oct 1 16:31:15 CEST 2018
(XEN) Latest ChangeSet: Thu Mar 22 22:02:18 2018 +0100 git:3bc83b8f57-dirty
(XEN) Processor: 410fd034: "ARM Limited", variant: 0x0, part 0xd03, rev 0x4
(XEN) 64-bit Execution:
(XEN) Processor Features: 0000000000002222 0000000000000000
(XEN) Exception Levels: EL3:64+32 EL2:64+32 EL1:64+32 EL0:64+32
(XEN) Extensions: FloatingPoint AdvancedSIMD
(XEN) Debug Features: 0000000010305106 0000000000000000
(XEN) Auxiliary Features: 0000000000000000 0000000000000000
(XEN) Memory Model Features: 0000000000001122 0000000000000000
(XEN) ISA Features: 0000000000011120 0000000000000000
(XEN) 32-bit Execution:
(XEN) Processor Features: 00000131:00011011
(XEN) Instruction Sets: AArch32 A32 Thumb Thumb-2 Jazelle
(XEN) Extensions: GenericTimer Security
(XEN) Debug Features: 03010066
(XEN) Auxiliary Features: 00000000
(XEN) Memory Model Features: 10201105 40000000 01260000 02102211
(XEN) ISA Features: 02101110 13112111 21232042 01112131 00011142 00011121
(XEN) Generic Timer IRQ: phys=30 hyp=26 virt=27 Freq: 99999 KHz
(XEN) GICv2 initialization:
(XEN) gic_dist_addr=00000000f9010000
(XEN) gic_cpu_addr=00000000f9020000
(XEN) gic_hyp_addr=00000000f9040000
(XEN) gic_vcpu_addr=00000000f9060000
(XEN) gic_maintenance_irq=25
(XEN) GICv2: Adjusting CPU interface base to 0xf902f000
(XEN) GICv2: 192 lines, 4 cpus, secure (IID 0200143b).
(XEN) Using scheduler: null Scheduler (null)
(XEN) Initializing null scheduler
(XEN) WARNING: This is experimental software in development.
(XEN) Use at your own risk.
(XEN) Allocated console ring of 16 KiB.
(XEN) Bringing up CPU1
(XEN) Bringing up CPU2
(XEN) Bringing up CPU3
(XEN) Brought up 4 CPUs
(XEN) P2M: 40-bit IPA with 40-bit PA and 8-bit VMID
(XEN) P2M: 3 levels with order-1 root, VTCR 0x80023558
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping enabled
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Loading kernel from boot module @ 0000000000080000
(XEN) Loading ramdisk from boot module @ 0000000002bd8000
(XEN) Allocating 1:1 mappings totalling 768MB for dom0:
(XEN) BANK[0] 0x00000020000000-0x00000040000000 (512MB)
(XEN) BANK[1] 0x00000060000000-0x00000070000000 (256MB)
(XEN) Grant table range: 0x0000007fc00000-0x0000007fc40000
(XEN) Loading zImage from 0000000000080000 to 0000000020080000-0000000023180000
(XEN) Loading dom0 initrd from 0000000002bd8000 to 0x0000000028200000-0x000000002b627e60
(XEN) Allocating PPI 16 for event channel interrupt
(XEN) Loading dom0 DTB to 0x0000000028000000-0x0000000028006e76
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: Errors and warnings
(XEN) Guest Loglevel: Nothing (Rate-limited: Errors and warnings)
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 276kB init memory.
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER4
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER8
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER12
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER16
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER20
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER0
(XEN) d1v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ34 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ35 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
[-- Attachment #5: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-10 11:22 ` Milan Boberic
2018-10-10 11:25 ` Milan Boberic
@ 2018-10-10 16:41 ` Meng Xu
2018-10-11 7:36 ` Milan Boberic
1 sibling, 1 reply; 70+ messages in thread
From: Meng Xu @ 2018-10-10 16:41 UTC (permalink / raw)
To: milanboberic94
Cc: xen-devel, Julien Grall, Stefano Stabellini, Andrii Anisov,
Dario Faggioli
[Just add some thoughts on this.]
On Wed, Oct 10, 2018 at 4:22 AM Milan Boberic <milanboberic94@gmail.com> wrote:
>
> Hi,
> sorry, my explanation wasn't precise and I missed the point.
> vCPU pinning with sched=null I put "just in case", because it doesn't hurt.
>
> Yes, PetaLinux domain is dom0.
The jitter may come from Xen or the OS in dom0.
It will be useful to know what is the jitter if you run the test on PetaLinux.
(It's understandable the jitter is gone without OS. It is also common
that OS introduces various interferences.)
Another thing you might have already done: make sure there is no print
information from either Xen or OS during your experiment. print causes
long delay.
Meng
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-10 16:41 ` Meng Xu
@ 2018-10-11 7:36 ` Milan Boberic
2018-10-11 12:17 ` Milan Boberic
` (2 more replies)
0 siblings, 3 replies; 70+ messages in thread
From: Milan Boberic @ 2018-10-11 7:36 UTC (permalink / raw)
To: Meng Xu
Cc: xen-devel, julien.grall, sstabellini, andrii_anisov, Dario Faggioli
[-- Attachment #1: Type: text/plain, Size: 1048 bytes --]
On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
>
> The jitter may come from Xen or the OS in dom0.
> It will be useful to know what is the jitter if you run the test on PetaLinux.
> (It's understandable the jitter is gone without OS. It is also common
> that OS introduces various interferences.)
Hi Meng,
well... I'm using bare-metal application and I need it exclusively to
be ran on one CPU as domU (guest) without OS (and I'm not sure how
would I make the same app to be ran on PetaLinux dom0 :D haha).
Is there a chance that PetaLinux as dom0 is creating this jitter and
how? Is there a way of decreasing it?
Yes, there are no prints.
I'm not sure about this timer interrupt passthrough because I didn't
find any example of it, in attachment I included xen-overlay.dtsi file
which I edited to add passthrough, in earlier replies there are
bare-metal configuration file. It would be helpful to know if those
setting are correct. If they are not correct it would explain the
jitter.
Thanks in advance, Milan Boberic!
[-- Attachment #2: xen-overlay.dts.txt --]
[-- Type: text/plain, Size: 1330 bytes --]
/ {
chosen {
#address-cells = <2>;
#size-cells = <1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
};
&smmu {
status = "okay";
mmu-masters = < &gem0 0x874
&gem1 0x875
&gem2 0x876
&gem3 0x877
&dwc3_0 0x860
&dwc3_1 0x861
&qspi 0x873
&lpd_dma_chan1 0x868
&lpd_dma_chan2 0x869
&lpd_dma_chan3 0x86a
&lpd_dma_chan4 0x86b
&lpd_dma_chan5 0x86c
&lpd_dma_chan6 0x86d
&lpd_dma_chan7 0x86e
&lpd_dma_chan8 0x86f
&fpd_dma_chan1 0x14e8
&fpd_dma_chan2 0x14e9
&fpd_dma_chan3 0x14ea
&fpd_dma_chan4 0x14eb
&fpd_dma_chan5 0x14ec
&fpd_dma_chan6 0x14ed
&fpd_dma_chan7 0x14ee
&fpd_dma_chan8 0x14ef
&sdhci0 0x870
&sdhci1 0x871
&nand0 0x872>;
};
&uart1 {
xen,passthrough = <0x1>;
};
&gpio {
xen,passthrough = <0x1>;
};
&ttc0 {
xen,passthrough = <0x1>;
};
&ttc1 {
xen,passthrough = <0x1>;
};
&ttc2 {
xen,passthrough = <0x1>;
};
&ttc3 {
xen,passthrough = <0x1>;
};
[-- Attachment #3: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-11 7:36 ` Milan Boberic
@ 2018-10-11 12:17 ` Milan Boberic
2018-10-11 17:05 ` Dario Faggioli
2018-10-11 15:39 ` Meng Xu
2018-10-11 22:29 ` Stefano Stabellini
2 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-11 12:17 UTC (permalink / raw)
To: Meng Xu
Cc: xen-devel, julien.grall, sstabellini, andrii_anisov, Dario Faggioli
I misunderstood the passthrough concept, it only allows guest domain
to use certain interrupts and memory. Is there are way to somehow
route interrupt from domU (bare-metal app) to hw?
On Thu, Oct 11, 2018 at 9:36 AM Milan Boberic <milanboberic94@gmail.com> wrote:
>
> On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
> >
> > The jitter may come from Xen or the OS in dom0.
> > It will be useful to know what is the jitter if you run the test on PetaLinux.
> > (It's understandable the jitter is gone without OS. It is also common
> > that OS introduces various interferences.)
>
> Hi Meng,
> well... I'm using bare-metal application and I need it exclusively to
> be ran on one CPU as domU (guest) without OS (and I'm not sure how
> would I make the same app to be ran on PetaLinux dom0 :D haha).
> Is there a chance that PetaLinux as dom0 is creating this jitter and
> how? Is there a way of decreasing it?
>
> Yes, there are no prints.
>
> I'm not sure about this timer interrupt passthrough because I didn't
> find any example of it, in attachment I included xen-overlay.dtsi file
> which I edited to add passthrough, in earlier replies there are
> bare-metal configuration file. It would be helpful to know if those
> setting are correct. If they are not correct it would explain the
> jitter.
>
> Thanks in advance, Milan Boberic!
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-11 7:36 ` Milan Boberic
2018-10-11 12:17 ` Milan Boberic
@ 2018-10-11 15:39 ` Meng Xu
2018-10-11 22:29 ` Stefano Stabellini
2 siblings, 0 replies; 70+ messages in thread
From: Meng Xu @ 2018-10-11 15:39 UTC (permalink / raw)
To: Milan Boberic
Cc: xen-devel, Julien Grall, Stefano Stabellini, Andrii Anisov,
Dario Faggioli
Hi Milan,
On Thu, Oct 11, 2018 at 12:36 AM Milan Boberic <milanboberic94@gmail.com> wrote:
>
> On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
> >
> > The jitter may come from Xen or the OS in dom0.
> > It will be useful to know what is the jitter if you run the test on PetaLinux.
> > (It's understandable the jitter is gone without OS. It is also common
> > that OS introduces various interferences.)
>
> Hi Meng,
> well... I'm using bare-metal application and I need it exclusively to
> be ran on one CPU as domU (guest) without OS (and I'm not sure how
> would I make the same app to be ran on PetaLinux dom0 :D haha).
> Is there a chance that PetaLinux as dom0 is creating this jitter and
> how? Is there a way of decreasing it?
I'm not familiar with PetaLinux. :(
From my previous experience in measuring the rt-test in the
virtualization environment, I found:
Even though the app. is the only one running on the CPU, the CPU may
be used to handle other interrupts and its context (such as TLB and
cache) might be flushed by other components. When these happen, the
interrupt handling latency can vary a lot.
Hopefully, it helps. :)
Meng
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-11 12:17 ` Milan Boberic
@ 2018-10-11 17:05 ` Dario Faggioli
0 siblings, 0 replies; 70+ messages in thread
From: Dario Faggioli @ 2018-10-11 17:05 UTC (permalink / raw)
To: Milan Boberic, Meng Xu
Cc: xen-devel, julien.grall, sstabellini, andrii_anisov
[-- Attachment #1.1: Type: text/plain, Size: 791 bytes --]
Hey,
Be a bit more careful about not top posting, please? :-)
On Thu, 2018-10-11 at 14:17 +0200, Milan Boberic wrote:
> I misunderstood the passthrough concept, it only allows guest domain
> to use certain interrupts and memory.
>
I'm afraid we totally rely on people with much more experience than me
(and I guess Meng's) on how things work on ARM.
> Is there are way to somehow
> route interrupt from domU (bare-metal app) to hw?
>
Don't interrupt _come_ from hardware and go/are routed to
hypervisor/os/app?
Regards,
Dario
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-11 7:36 ` Milan Boberic
2018-10-11 12:17 ` Milan Boberic
2018-10-11 15:39 ` Meng Xu
@ 2018-10-11 22:29 ` Stefano Stabellini
2018-10-12 15:33 ` Milan Boberic
2 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-11 22:29 UTC (permalink / raw)
To: Milan Boberic
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel
On Thu, 11 Oct 2018, Milan Boberic wrote:
> On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
> >
> > The jitter may come from Xen or the OS in dom0.
> > It will be useful to know what is the jitter if you run the test on PetaLinux.
> > (It's understandable the jitter is gone without OS. It is also common
> > that OS introduces various interferences.)
>
> Hi Meng,
> well... I'm using bare-metal application and I need it exclusively to
> be ran on one CPU as domU (guest) without OS (and I'm not sure how
> would I make the same app to be ran on PetaLinux dom0 :D haha).
> Is there a chance that PetaLinux as dom0 is creating this jitter and
> how? Is there a way of decreasing it?
>
> Yes, there are no prints.
>
> I'm not sure about this timer interrupt passthrough because I didn't
> find any example of it, in attachment I included xen-overlay.dtsi file
> which I edited to add passthrough, in earlier replies there are
> bare-metal configuration file. It would be helpful to know if those
> setting are correct. If they are not correct it would explain the
> jitter.
>
> Thanks in advance, Milan Boberic!
Hi Milan,
Sorry for taking so long to go back to this thread. But I am here now :)
First, let me ask a couple of questions to understand the scenario
better: is there any interference from other virtual machines while you
measure the jitter? Or is the baremetal app the only thing actively
running on the board?
Second, it would be worth double-checking that Dario's patch to fix
sched=null is not having unexpected side effects. I don't think so, it
would be worth testing with it and without it to be sure.
I gave a look at your VM configuration. The configuration looks correct.
There is no dtdev settings, but given that none of the devices you are
assigning to the guest does any DMA, it should be OK. You want to make
sure that Dom0 is not trying to use those same devices -- make sure to
add "xen,passthrough;" to each corresponding node on the host device
tree.
The error messages "No valid vCPU found" are due to the baremetal
applications trying to configure as target cpu for the interrupt cpu1
(the second cpu in the system), while actually only 1 vcpu is assigned
to the VM. Hence, only cpu0 is allowed. I don't think it should cause
any jitter issues, because the request is simply ignored. Just to be
safe, you might want to double check that the physical interrupt is
delivered to the right physical cpu, which would be cpu1 in your
configuration, the one running the only vcpu of the baremetal app. You
can do that by adding a printk to xen/arch/arm/vgic.c:vgic_inject_irq,
for example:
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 5a4f082..208fde7 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -591,6 +591,7 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
out:
spin_unlock_irqrestore(&v->arch.vgic.lock, flags);
+ if (v != current) printk("DEBUG irq slow path!\n");
/* we have a new higher priority irq, inject it into the guest */
vcpu_kick(v);
You don't want "DEBUG irq slow path!" to get printed.
Finally, I would try to set the timer to generate events less frequently
than every 1us and see what happens, maybe every 5-10us. In my tests,
the IRQ latency overhead caused by Xen is around 1us, so injecting 1
interrupt every 1us, plus 1us of latency caused by Xen, cannot lead to
good results.
I hope this helps, please keep us updated with your results, they are
very interesting!
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-11 22:29 ` Stefano Stabellini
@ 2018-10-12 15:33 ` Milan Boberic
2018-10-12 16:36 ` Julien Grall
2018-10-12 17:43 ` Stefano Stabellini
0 siblings, 2 replies; 70+ messages in thread
From: Milan Boberic @ 2018-10-12 15:33 UTC (permalink / raw)
To: stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel
[-- Attachment #1.1: Type: text/plain, Size: 5165 bytes --]
Hi Stefano, glad to have you back :D,
this is my setup:
- dom0 is PetaLinux, has 1 vCPU and it's pinned for pCPU0
- there is only one domU and this is my bare-metal app that also
have one vCPU and it's pinned for pCPU1
so yeah, there is only dom0 and bare-metal app on the board.
Jitter is the same with and without Dario's patch.
I'm still not sure about timer's passthrough because there is no mention of
triple timer counter is device tree so I added:
&ttc0 {
xen,passthrough = <0x1>;
};
at the end of the xen-overlay.dtsi file which I included in attachment.
About patch you sent, I can't find this funcion void vgic_inject_irq in
/xen/arch/arm/vgic.c file, this is link of git repository from where I
build my xen so you can take a look if that printk can be put somewhere
else.
https://github.com/Xilinx/xen/
I ran some more testing and realized that results are the same with or
without vwfi=native, which I think again points out that passthrough that I
need to provide in device tree isn't valid.
And of course, higher the frequency of interrupts results in higher
jitter. I'm still battling with Xilinx SDK and triple timer counter that's
why I can't figure out what is the exact frequency set (I'm just rising it
and lowering it), I'll give my best to solve that ASAP because we need to
know exact value of frequency set.
Thanks in advance!
Milan
On Fri, Oct 12, 2018 at 12:29 AM Stefano Stabellini <
stefano.stabellini@xilinx.com> wrote:
> On Thu, 11 Oct 2018, Milan Boberic wrote:
> > On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
> > >
> > > The jitter may come from Xen or the OS in dom0.
> > > It will be useful to know what is the jitter if you run the test on
> PetaLinux.
> > > (It's understandable the jitter is gone without OS. It is also common
> > > that OS introduces various interferences.)
> >
> > Hi Meng,
> > well... I'm using bare-metal application and I need it exclusively to
> > be ran on one CPU as domU (guest) without OS (and I'm not sure how
> > would I make the same app to be ran on PetaLinux dom0 :D haha).
> > Is there a chance that PetaLinux as dom0 is creating this jitter and
> > how? Is there a way of decreasing it?
> >
> > Yes, there are no prints.
> >
> > I'm not sure about this timer interrupt passthrough because I didn't
> > find any example of it, in attachment I included xen-overlay.dtsi file
> > which I edited to add passthrough, in earlier replies there are
> > bare-metal configuration file. It would be helpful to know if those
> > setting are correct. If they are not correct it would explain the
> > jitter.
> >
> > Thanks in advance, Milan Boberic!
>
> Hi Milan,
>
> Sorry for taking so long to go back to this thread. But I am here now :)
>
> First, let me ask a couple of questions to understand the scenario
> better: is there any interference from other virtual machines while you
> measure the jitter? Or is the baremetal app the only thing actively
> running on the board?
>
> Second, it would be worth double-checking that Dario's patch to fix
> sched=null is not having unexpected side effects. I don't think so, it
> would be worth testing with it and without it to be sure.
>
> I gave a look at your VM configuration. The configuration looks correct.
> There is no dtdev settings, but given that none of the devices you are
> assigning to the guest does any DMA, it should be OK. You want to make
> sure that Dom0 is not trying to use those same devices -- make sure to
> add "xen,passthrough;" to each corresponding node on the host device
> tree.
>
> The error messages "No valid vCPU found" are due to the baremetal
> applications trying to configure as target cpu for the interrupt cpu1
> (the second cpu in the system), while actually only 1 vcpu is assigned
> to the VM. Hence, only cpu0 is allowed. I don't think it should cause
> any jitter issues, because the request is simply ignored. Just to be
> safe, you might want to double check that the physical interrupt is
> delivered to the right physical cpu, which would be cpu1 in your
> configuration, the one running the only vcpu of the baremetal app. You
> can do that by adding a printk to xen/arch/arm/vgic.c:vgic_inject_irq,
> for example:
>
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 5a4f082..208fde7 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -591,6 +591,7 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v,
> unsigned int virq,
> out:
> spin_unlock_irqrestore(&v->arch.vgic.lock, flags);
>
> + if (v != current) printk("DEBUG irq slow path!\n");
> /* we have a new higher priority irq, inject it into the guest */
> vcpu_kick(v);
>
> You don't want "DEBUG irq slow path!" to get printed.
>
> Finally, I would try to set the timer to generate events less frequently
> than every 1us and see what happens, maybe every 5-10us. In my tests,
> the IRQ latency overhead caused by Xen is around 1us, so injecting 1
> interrupt every 1us, plus 1us of latency caused by Xen, cannot lead to
> good results.
>
> I hope this helps, please keep us updated with your results, they are
> very interesting!
>
[-- Attachment #1.2: Type: text/html, Size: 6197 bytes --]
[-- Attachment #2: xen-overlay.dts.txt --]
[-- Type: text/plain, Size: 1330 bytes --]
/ {
chosen {
#address-cells = <2>;
#size-cells = <1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
};
&smmu {
status = "okay";
mmu-masters = < &gem0 0x874
&gem1 0x875
&gem2 0x876
&gem3 0x877
&dwc3_0 0x860
&dwc3_1 0x861
&qspi 0x873
&lpd_dma_chan1 0x868
&lpd_dma_chan2 0x869
&lpd_dma_chan3 0x86a
&lpd_dma_chan4 0x86b
&lpd_dma_chan5 0x86c
&lpd_dma_chan6 0x86d
&lpd_dma_chan7 0x86e
&lpd_dma_chan8 0x86f
&fpd_dma_chan1 0x14e8
&fpd_dma_chan2 0x14e9
&fpd_dma_chan3 0x14ea
&fpd_dma_chan4 0x14eb
&fpd_dma_chan5 0x14ec
&fpd_dma_chan6 0x14ed
&fpd_dma_chan7 0x14ee
&fpd_dma_chan8 0x14ef
&sdhci0 0x870
&sdhci1 0x871
&nand0 0x872>;
};
&uart1 {
xen,passthrough = <0x1>;
};
&gpio {
xen,passthrough = <0x1>;
};
&ttc0 {
xen,passthrough = <0x1>;
};
&ttc1 {
xen,passthrough = <0x1>;
};
&ttc2 {
xen,passthrough = <0x1>;
};
&ttc3 {
xen,passthrough = <0x1>;
};
[-- Attachment #3: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-12 15:33 ` Milan Boberic
@ 2018-10-12 16:36 ` Julien Grall
2018-10-12 17:43 ` Stefano Stabellini
1 sibling, 0 replies; 70+ messages in thread
From: Julien Grall @ 2018-10-12 16:36 UTC (permalink / raw)
To: Milan Boberic
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, stefano.stabellini
[-- Attachment #1.1: Type: text/plain, Size: 6081 bytes --]
Hi,
Sorry for the formatting.
On Fri, 12 Oct 2018, 17:36 Milan Boberic, <milanboberic94@gmail.com> wrote:
> Hi Stefano, glad to have you back :D,
> this is my setup:
> - dom0 is PetaLinux, has 1 vCPU and it's pinned for pCPU0
> - there is only one domU and this is my bare-metal app that also
> have one vCPU and it's pinned for pCPU1
> so yeah, there is only dom0 and bare-metal app on the board.
>
> Jitter is the same with and without Dario's patch.
>
> I'm still not sure about timer's passthrough because there is no mention
> of triple timer counter is device tree so I added:
>
> &ttc0 {
> xen,passthrough = <0x1>;
> };
>
Would you mind to explain what is the triple timer counter?
> at the end of the xen-overlay.dtsi file which I included in attachment.
>
> About patch you sent, I can't find this funcion void vgic_inject_irq in
> /xen/arch/arm/vgic.c file, this is link of git repository from where I
> build my xen so you can take a look if that printk can be put somewhere
> else.
>
There was some vGIC rework in Xen 4.11. There was also a new vGIC added
(selectable using NEW_VGIC). It might be worth to look at it.
> https://github.com/Xilinx/xen/
>
This is not the official Xen repository and look like patches have been
applied on top. I am afraid, I am not going to be able help here. Could you
do the same experiment with Xen 4.11?
>
> I ran some more testing and realized that results are the same with or
> without vwfi=native, which I think again points out that passthrough that I
> need to provide in device tree isn't valid.
>
This could also means that wfi is not used by the guest or you never go to
the idle vCPU.
> And of course, higher the frequency of interrupts results in higher
> jitter. I'm still battling with Xilinx SDK and triple timer counter that's
> why I can't figure out what is the exact frequency set (I'm just rising it
> and lowering it), I'll give my best to solve that ASAP because we need to
> know exact value of frequency set.
>
> Thanks in advance!
>
> Milan
>
>
>
> On Fri, Oct 12, 2018 at 12:29 AM Stefano Stabellini <
> stefano.stabellini@xilinx.com> wrote:
>
>> On Thu, 11 Oct 2018, Milan Boberic wrote:
>> > On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
>> > >
>> > > The jitter may come from Xen or the OS in dom0.
>> > > It will be useful to know what is the jitter if you run the test on
>> PetaLinux.
>> > > (It's understandable the jitter is gone without OS. It is also common
>> > > that OS introduces various interferences.)
>> >
>> > Hi Meng,
>> > well... I'm using bare-metal application and I need it exclusively to
>> > be ran on one CPU as domU (guest) without OS (and I'm not sure how
>> > would I make the same app to be ran on PetaLinux dom0 :D haha).
>> > Is there a chance that PetaLinux as dom0 is creating this jitter and
>> > how? Is there a way of decreasing it?
>> >
>> > Yes, there are no prints.
>> >
>> > I'm not sure about this timer interrupt passthrough because I didn't
>> > find any example of it, in attachment I included xen-overlay.dtsi file
>> > which I edited to add passthrough, in earlier replies there are
>> > bare-metal configuration file. It would be helpful to know if those
>> > setting are correct. If they are not correct it would explain the
>> > jitter.
>> >
>> > Thanks in advance, Milan Boberic!
>>
>> Hi Milan,
>>
>> Sorry for taking so long to go back to this thread. But I am here now :)
>>
>> First, let me ask a couple of questions to understand the scenario
>> better: is there any interference from other virtual machines while you
>> measure the jitter? Or is the baremetal app the only thing actively
>> running on the board?
>>
>> Second, it would be worth double-checking that Dario's patch to fix
>> sched=null is not having unexpected side effects. I don't think so, it
>> would be worth testing with it and without it to be sure.
>>
>> I gave a look at your VM configuration. The configuration looks correct.
>> There is no dtdev settings, but given that none of the devices you are
>> assigning to the guest does any DMA, it should be OK. You want to make
>> sure that Dom0 is not trying to use those same devices -- make sure to
>> add "xen,passthrough;" to each corresponding node on the host device
>> tree.
>>
>> The error messages "No valid vCPU found" are due to the baremetal
>> applications trying to configure as target cpu for the interrupt cpu1
>> (the second cpu in the system), while actually only 1 vcpu is assigned
>> to the VM. Hence, only cpu0 is allowed. I don't think it should cause
>> any jitter issues, because the request is simply ignored. Just to be
>> safe, you might want to double check that the physical interrupt is
>> delivered to the right physical cpu, which would be cpu1 in your
>> configuration, the one running the only vcpu of the baremetal app. You
>> can do that by adding a printk to xen/arch/arm/vgic.c:vgic_inject_irq,
>> for example:
>>
>> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
>> index 5a4f082..208fde7 100644
>> --- a/xen/arch/arm/vgic.c
>> +++ b/xen/arch/arm/vgic.c
>> @@ -591,6 +591,7 @@ void vgic_inject_irq(struct domain *d, struct vcpu
>> *v, unsigned int virq,
>> out:
>> spin_unlock_irqrestore(&v->arch.vgic.lock, flags);
>>
>> + if (v != current) printk("DEBUG irq slow path!\n");
>> /* we have a new higher priority irq, inject it into the guest */
>> vcpu_kick(v);
>>
>> You don't want "DEBUG irq slow path!" to get printed.
>>
>> Finally, I would try to set the timer to generate events less frequently
>> than every 1us and see what happens, maybe every 5-10us. In my tests,
>> the IRQ latency overhead caused by Xen is around 1us, so injecting 1
>> interrupt every 1us, plus 1us of latency caused by Xen, cannot lead to
>> good results.
>>
>> I hope this helps, please keep us updated with your results, they are
>> very interesting!
>>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xenproject.org
> https://lists.xenproject.org/mailman/listinfo/xen-devel
[-- Attachment #1.2: Type: text/html, Size: 8482 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-12 15:33 ` Milan Boberic
2018-10-12 16:36 ` Julien Grall
@ 2018-10-12 17:43 ` Stefano Stabellini
2018-10-13 16:01 ` Milan Boberic
1 sibling, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-12 17:43 UTC (permalink / raw)
To: Milan Boberic
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, stefano.stabellini
[-- Attachment #1: Type: TEXT/PLAIN, Size: 6891 bytes --]
On Fri, 12 Oct 2018, Milan Boberic wrote:
> Hi Stefano, glad to have you back :D,
> this is my setup:
> - dom0 is PetaLinux, has 1 vCPU and it's pinned for pCPU0
> - there is only one domU and this is my bare-metal app that also have one vCPU and it's pinned for pCPU1
> so yeah, there is only dom0 and bare-metal app on the board.
>
> Jitter is the same with and without Dario's patch.
>
> I'm still not sure about timer's passthrough because there is no mention of triple timer counter is device tree so I added:
>
> &ttc0 {
> xen,passthrough = <0x1>;
> };
>
> at the end of the xen-overlay.dtsi file which I included in attachment.
This is definitely wrong. Can you please also post the full host device
tree with your modifications that you are using for Xen and Dom0? You
should have something like:
timer@ff110000 {
compatible = "cdns,ttc";
interrupt-parent = <0x2>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
For each of the nodes of the devices you are assigning to the DomU.
> About patch you sent, I can't find this funcion void vgic_inject_irq in /xen/arch/arm/vgic.c file, this is link of git repository
> from where I build my xen so you can take a look if that printk can be put somewhere else.
>
> https://github.com/Xilinx/xen/
It's here: https://github.com/Xilinx/xen/blob/xilinx/stable-4.9/xen/arch/arm/vgic.c#L462
BTW you are using a pretty old branch, I suggest you moving to:
https://github.com/Xilinx/xen/tree/xilinx/versal/xen/arch/arm
It will work on your board too and it is based on the much newer Xen
4.11.
> I ran some more testing and realized that results are the same with or without vwfi=native, which I think again points out that
> passthrough that I need to provide in device tree isn't valid.
In reality, the results are the same with and without vwfi=native only
if the baremetal app never issues any wfi instructions.
> And of course, higher the frequency of interrupts results in higher jitter. I'm still battling with Xilinx SDK and triple timer
> counter that's why I can't figure out what is the exact frequency set (I'm just rising it and lowering it), I'll give my best to
> solve that ASAP because we need to know exact value of frequency set.
Yep, that's important :-)
>
> Thanks in advance!
>
> Milan
>
>
>
> On Fri, Oct 12, 2018 at 12:29 AM Stefano Stabellini <stefano.stabellini@xilinx.com> wrote:
> On Thu, 11 Oct 2018, Milan Boberic wrote:
> > On Wed, Oct 10, 2018 at 6:41 PM Meng Xu <xumengpanda@gmail.com> wrote:
> > >
> > > The jitter may come from Xen or the OS in dom0.
> > > It will be useful to know what is the jitter if you run the test on PetaLinux.
> > > (It's understandable the jitter is gone without OS. It is also common
> > > that OS introduces various interferences.)
> >
> > Hi Meng,
> > well... I'm using bare-metal application and I need it exclusively to
> > be ran on one CPU as domU (guest) without OS (and I'm not sure how
> > would I make the same app to be ran on PetaLinux dom0 :D haha).
> > Is there a chance that PetaLinux as dom0 is creating this jitter and
> > how? Is there a way of decreasing it?
> >
> > Yes, there are no prints.
> >
> > I'm not sure about this timer interrupt passthrough because I didn't
> > find any example of it, in attachment I included xen-overlay.dtsi file
> > which I edited to add passthrough, in earlier replies there are
> > bare-metal configuration file. It would be helpful to know if those
> > setting are correct. If they are not correct it would explain the
> > jitter.
> >
> > Thanks in advance, Milan Boberic!
>
> Hi Milan,
>
> Sorry for taking so long to go back to this thread. But I am here now :)
>
> First, let me ask a couple of questions to understand the scenario
> better: is there any interference from other virtual machines while you
> measure the jitter? Or is the baremetal app the only thing actively
> running on the board?
>
> Second, it would be worth double-checking that Dario's patch to fix
> sched=null is not having unexpected side effects. I don't think so, it
> would be worth testing with it and without it to be sure.
>
> I gave a look at your VM configuration. The configuration looks correct.
> There is no dtdev settings, but given that none of the devices you are
> assigning to the guest does any DMA, it should be OK. You want to make
> sure that Dom0 is not trying to use those same devices -- make sure to
> add "xen,passthrough;" to each corresponding node on the host device
> tree.
>
> The error messages "No valid vCPU found" are due to the baremetal
> applications trying to configure as target cpu for the interrupt cpu1
> (the second cpu in the system), while actually only 1 vcpu is assigned
> to the VM. Hence, only cpu0 is allowed. I don't think it should cause
> any jitter issues, because the request is simply ignored. Just to be
> safe, you might want to double check that the physical interrupt is
> delivered to the right physical cpu, which would be cpu1 in your
> configuration, the one running the only vcpu of the baremetal app. You
> can do that by adding a printk to xen/arch/arm/vgic.c:vgic_inject_irq,
> for example:
>
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 5a4f082..208fde7 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -591,6 +591,7 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
> out:
> spin_unlock_irqrestore(&v->arch.vgic.lock, flags);
>
> + if (v != current) printk("DEBUG irq slow path!\n");
> /* we have a new higher priority irq, inject it into the guest */
> vcpu_kick(v);
>
> You don't want "DEBUG irq slow path!" to get printed.
>
> Finally, I would try to set the timer to generate events less frequently
> than every 1us and see what happens, maybe every 5-10us. In my tests,
> the IRQ latency overhead caused by Xen is around 1us, so injecting 1
> interrupt every 1us, plus 1us of latency caused by Xen, cannot lead to
> good results.
>
> I hope this helps, please keep us updated with your results, they are
> very interesting!
>
>
>
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-12 17:43 ` Stefano Stabellini
@ 2018-10-13 16:01 ` Milan Boberic
2018-10-14 22:46 ` Stefano Stabellini
2018-10-15 8:14 ` Julien Grall
0 siblings, 2 replies; 70+ messages in thread
From: Milan Boberic @ 2018-10-13 16:01 UTC (permalink / raw)
To: stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel
[-- Attachment #1: Type: text/plain, Size: 3788 bytes --]
Hi,
> Don't interrupt _come_ from hardware and go/are routed to
> hypervisor/os/app?
Yes they do, sorry, I reversed the order because I'm a newbie :) .
> Would you mind to explain what is the triple timer counter?
On this link on page 342 is explanation.
> This is not the official Xen repository and look like patches have been applied on top. I am afraid, I am not going to be able help here. Could you do the same experiment with Xen 4.11?
I think I have to get Xen from Xilinx because I use board that has
Zynq Ultrascale. Stefano sent branch with Xen 4.11 so I built with it.
> This could also means that wfi is not used by the guest or you never go to the idle vCPU.
Right.
> This is definitely wrong. Can you please also post the full host device
> tree with your modifications that you are using for Xen and Dom0? You
> should have something like:
>
> timer@ff110000 {
> compatible = "cdns,ttc";
> interrupt-parent = <0x2>;
> interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> reg = <0x0 0xff110000 0x0 0x1000>;
> timer-width = <0x20>;
> power-domains = <0x3b>;
> xen,passthrough;
> };
> For each of the nodes of the devices you are assigning to the DomU.
I put
&ttc0 {
xen,passthrough = <0x1>;
};
because when I was making bm app I was following this guide. Now I see
it's wrong. When I copied directly:
timer@ff110000 {
compatible = "cdns,ttc";
interrupt-parent = <0x2>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
in to the xen-overlay.dtsi file it resulted an error during
device-tree build. I modified it a little bit so I can get successful
build, there are all device-tree files included in attachment. I'm not
sure how to set this passthrough properly, if you could take a look at
those files in attachment I'd be more then grateful.
> It's here: https://github.com/Xilinx/xen/blob/xilinx/stable-4.9/xen/arch/arm/vgic.c#L462
Oh, about that. I sent you wrong branch, I was using Xen 4.10. Anyway
now I moved to Xen 4.11 like you suggested and applied your patch and
Dario's also.
Okay, now when I want to xl create my domU (bare-metal app) I get error:
Parsing config from timer.cfg
(XEN) IRQ 68 is already used by domain 0
libxl: error: libxl_create.c:1354:domcreate_launch_dm: Domain 1:failed
give domain access to irq 68: Device or resource busy
libxl: error: libxl_domain.c:1034:libxl__destroy_domid: Domain
1:Non-existant domain
libxl: error: libxl_domain.c:993:domain_destroy_callback: Domain
1:Unable to destroy guest
libxl: error: libxl_domain.c:920:domain_destroy_cb: Domain
1:Destruction of domain failed
I guess my modifications of:
timer@ff110000 {
compatible = "cdns,ttc";
interrupt-parent = <0x2>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
are not correct. I tried to change interrupts to:
interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x46 0x4>;
because if you check here on page 310 interrupts for TTC0 are 68:70.
But that didn't work either I still get same error.
I also tried to change xen,passthrough; line with:
xen,passthrough = <0x1>;
but also without success, still the same error.
Are you sure about this line:
reg = <0x0 0xff110000 0x0 0x1000>; ?
Or it should be like this?
reg = <0x0 0xff110000 0x1000>;
I also included xl dmesg and dmesg in attachments (after xl create of bm app).
Thanks in advance!
Milan
[-- Attachment #2: device-tree.bbappend.txt --]
[-- Type: text/plain, Size: 124 bytes --]
FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
SRC_URI += "file://system-user.dtsi"
SRC_URI += "file://xen-overlay.dtsi"
[-- Attachment #3: xl dmesg.txt --]
[-- Type: text/plain, Size: 4349 bytes --]
(XEN) Checking for initrd in /chosen
(XEN) Initrd 0000000002bd7000-0000000005fffd97
(XEN) RAM: 0000000000000000 - 000000007fefffff
(XEN)
(XEN) MODULE[0]: 0000000007ff4000 - 0000000007ffc080 Device Tree
(XEN) MODULE[1]: 0000000002bd7000 - 0000000005fffd97 Ramdisk
(XEN) MODULE[2]: 0000000000080000 - 0000000003180000 Kernel
(XEN) RESVD[0]: 0000000007ff4000 - 0000000007ffc000
(XEN) RESVD[1]: 0000000002bd7000 - 0000000005fffd97
(XEN)
(XEN) Command line: console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native
(XEN) Placing Xen at 0x000000007fc00000-0x000000007fe00000
(XEN) Update BOOTMOD_XEN from 0000000006000000-0000000006108d81 => 000000007fc00000-000000007fd08d81
(XEN) Domain heap initialised
(XEN) Booting using Device Tree
(XEN) Looking for dtuart at "serial0", options ""
Xen 4.11.1-pre
(XEN) Xen version 4.11.1-pre (milan@) (aarch64-xilinx-linux-gcc (GCC) 7.2.0) debug=n Sat Oct 13 16:34:51 CEST 2018
(XEN) Latest ChangeSet: Mon Sep 24 16:07:33 2018 -0700 git:8610a91abc-dirty
(XEN) Processor: 410fd034: "ARM Limited", variant: 0x0, part 0xd03, rev 0x4
(XEN) 64-bit Execution:
(XEN) Processor Features: 0000000000002222 0000000000000000
(XEN) Exception Levels: EL3:64+32 EL2:64+32 EL1:64+32 EL0:64+32
(XEN) Extensions: FloatingPoint AdvancedSIMD
(XEN) Debug Features: 0000000010305106 0000000000000000
(XEN) Auxiliary Features: 0000000000000000 0000000000000000
(XEN) Memory Model Features: 0000000000001122 0000000000000000
(XEN) ISA Features: 0000000000011120 0000000000000000
(XEN) 32-bit Execution:
(XEN) Processor Features: 00000131:00011011
(XEN) Instruction Sets: AArch32 A32 Thumb Thumb-2 Jazelle
(XEN) Extensions: GenericTimer Security
(XEN) Debug Features: 03010066
(XEN) Auxiliary Features: 00000000
(XEN) Memory Model Features: 10201105 40000000 01260000 02102211
(XEN) ISA Features: 02101110 13112111 21232042 01112131 00011142 00011121
(XEN) Generic Timer IRQ: phys=30 hyp=26 virt=27 Freq: 99999 KHz
(XEN) GICv2 initialization:
(XEN) gic_dist_addr=00000000f9010000
(XEN) gic_cpu_addr=00000000f9020000
(XEN) gic_hyp_addr=00000000f9040000
(XEN) gic_vcpu_addr=00000000f9060000
(XEN) gic_maintenance_irq=25
(XEN) GICv2: Adjusting CPU interface base to 0xf902f000
(XEN) GICv2: 192 lines, 4 cpus, secure (IID 0200143b).
(XEN) Using scheduler: null Scheduler (null)
(XEN) Initializing null scheduler
(XEN) WARNING: This is experimental software in development.
(XEN) Use at your own risk.
(XEN) Allocated console ring of 16 KiB.
(XEN) Bringing up CPU1
(XEN) Bringing up CPU2
(XEN) Bringing up CPU3
(XEN) Brought up 4 CPUs
(XEN) P2M: 40-bit IPA with 40-bit PA and 8-bit VMID
(XEN) P2M: 3 levels with order-1 root, VTCR 0x80023558
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping enabled
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Loading kernel from boot module @ 0000000000080000
(XEN) Loading ramdisk from boot module @ 0000000002bd7000
(XEN) Allocating 1:1 mappings totalling 768MB for dom0:
(XEN) BANK[0] 0x00000020000000-0x00000040000000 (512MB)
(XEN) BANK[1] 0x00000060000000-0x00000070000000 (256MB)
(XEN) Grant table range: 0x0000007fc00000-0x0000007fc40000
(XEN) Allocating PPI 16 for event channel interrupt
(XEN) Loading zImage from 0000000000080000 to 0000000020080000-0000000023180000
(XEN) Loading dom0 initrd from 0000000002bd7000 to 0x0000000028200000-0x000000002b628d97
(XEN) Loading dom0 DTB to 0x0000000028000000-0x0000000028006f3a
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: Errors and warnings
(XEN) Guest Loglevel: Nothing (Rate-limited: Errors and warnings)
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 280kB init memory.
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER4
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER8
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER12
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER16
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER20
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER0
(XEN) IRQ 68 is already used by domain 0
[-- Attachment #4: system-user.dtsi.txt --]
[-- Type: text/plain, Size: 1828 bytes --]
/include/ "system-conf.dtsi"
/include/ "xen-overlay.dtsi"
/ {
};
&gem3 {
status = "okay";
local-mac-address = [00 0a 35 00 02 90];
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
phy0: phy@9 {
reg = <0x9>;
ti,rx-internal-delay = <0x5>;
ti,tx-internal-delay = <0x5>;
ti,fifo-depth = <0x1>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
i2cswitch@70 { /* U7 on UZ3EG SOM */
compatible = "nxp,pca9542";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c@0 { /* i2c mw 70 0 1 */
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* IIC_EEPROM */
eeprom@51 { /* U5 on UZ3EG IOCC and U7 on the UZ7EV EVCC*/
compatible = "at,24c08";
reg = <0x51>;
};
};
};
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
is-dual = <1>; /* Set for dual-parallel QSPI config */
num-cs = <2>;
xlnx,fb-clk = <0x1>;
flash0: flash@0 {
/* The Flash described below doesn't match our board ("micron,n25qu256a"), but is needed */
/* so the Flash MTD partitions are correctly identified in /proc/mtd */
compatible = "micron,m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Set to 108000000 Based on DC1 spec */
};
};
/* SD0 eMMC, 8-bit wide data bus */
&sdhci0 {
status = "okay";
bus-width = <8>;
max-frequency = <50000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
max-frequency = <50000000>;
no-1-8-v; /* for 1.0 silicon */
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
phy-names = "usb3-phy";
};
[-- Attachment #5: dmesg.txt --]
[-- Type: text/plain, Size: 24486 bytes --]
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.14.0-xilinx-v2018.2 (oe-user@oe-host) (gcc version 7.2.0 (GCC)) #1 SMP Sat Oct 13 16:46:47 CEST 2018
[ 0.000000] Boot CPU: AArch64 Processor [410fd034]
[ 0.000000] Machine model: xlnx,zynqmp
[ 0.000000] Xen 4.11 support found
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 256 MiB at 0x0000000060000000
[ 0.000000] On node 0 totalpages: 196608
[ 0.000000] DMA zone: 2688 pages used for memmap
[ 0.000000] DMA zone: 0 pages reserved
[ 0.000000] DMA zone: 196608 pages, LIFO batch:31
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] random: fast init done
[ 0.000000] percpu: Embedded 21 pages/cpu @ffffffc03ffb7000 s46488 r8192 d31336 u86016
[ 0.000000] pcpu-alloc: s46488 r8192 d31336 u86016 alloc=21*4096
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: enabling workaround for ARM erratum 845719
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 193920
[ 0.000000] Kernel command line: console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
[ 0.000000] Memory: 423788K/786432K available (9980K kernel code, 644K rwdata, 3132K rodata, 512K init, 2168K bss, 100500K reserved, 262144K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB)
[ 0.000000] vmalloc : 0xffffff8008000000 - 0xffffffbebfff0000 ( 250 GB)
[ 0.000000] .text : 0xffffff8008080000 - 0xffffff8008a40000 ( 9984 KB)
[ 0.000000] .rodata : 0xffffff8008a40000 - 0xffffff8008d60000 ( 3200 KB)
[ 0.000000] .init : 0xffffff8008d60000 - 0xffffff8008de0000 ( 512 KB)
[ 0.000000] .data : 0xffffff8008de0000 - 0xffffff8008e81200 ( 645 KB)
[ 0.000000] .bss : 0xffffff8008e81200 - 0xffffff800909f2b0 ( 2169 KB)
[ 0.000000] fixed : 0xffffffbefe7fd000 - 0xffffffbefec00000 ( 4108 KB)
[ 0.000000] PCI I/O : 0xffffffbefee00000 - 0xffffffbeffe00000 ( 16 MB)
[ 0.000000] vmemmap : 0xffffffbf00000000 - 0xffffffc000000000 ( 4 GB maximum)
[ 0.000000] 0xffffffbf00700000 - 0xffffffbf01880000 ( 17 MB actual)
[ 0.000000] memory : 0xffffffc020000000 - 0xffffffc070000000 ( 1280 MB)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] RCU event tracing is enabled.
[ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] arch_timer: cp15 timer(s) running at 99.99MHz (virt).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171015c90f, max_idle_ns: 440795203080 ns
[ 0.000003] sched_clock: 56 bits at 99MHz, resolution 10ns, wraps every 4398046511101ns
[ 0.000292] Console: colour dummy device 80x25
[ 0.283133] console [hvc0] enabled
[ 0.286605] Calibrating delay loop (skipped), value calculated using timer frequency.. 199.99 BogoMIPS (lpj=399996)
[ 0.297061] pid_max: default: 32768 minimum: 301
[ 0.301820] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.308486] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.316412] ASID allocator initialised with 65536 entries
[ 0.321590] xen:grant_table: Grant tables using version 1 layout
[ 0.327185] Grant table initialized
[ 0.330729] xen:events: Using FIFO-based ABI
[ 0.335054] Xen: initializing cpu0
[ 0.338560] Hierarchical SRCU implementation.
[ 0.343223] EFI services will not be available.
[ 0.347515] zynqmp_plat_init Platform Management API v1.0
[ 0.352945] zynqmp_plat_init Trustzone version v1.0
[ 0.357920] smp: Bringing up secondary CPUs ...
[ 0.362458] smp: Brought up 1 node, 1 CPU
[ 0.366523] SMP: Total of 1 processors activated.
[ 0.371282] CPU features: detected feature: 32-bit EL0 Support
[ 0.377166] CPU: All CPU(s) started at EL1
[ 0.381323] alternatives: patching kernel code
[ 0.386227] devtmpfs: initialized
[ 0.392895] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.398968] futex hash table entries: 256 (order: 3, 32768 bytes)
[ 0.411050] xor: measuring software checksum speed
[ 0.449286] 8regs : 2111.000 MB/sec
[ 0.489344] 8regs_prefetch: 1882.000 MB/sec
[ 0.529400] 32regs : 2594.000 MB/sec
[ 0.569460] 32regs_prefetch: 2183.000 MB/sec
[ 0.569498] xor: using function: 32regs (2594.000 MB/sec)
[ 0.574058] pinctrl core: initialized pinctrl subsystem
[ 0.580529] NET: Registered protocol family 16
[ 0.585122] vdso: 2 pages (1 code @ ffffff8008a46000, 1 data @ ffffff8008de4000)
[ 0.591204] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.599068] DMA: preallocated 256 KiB pool for atomic allocations
[ 0.604234] xen:swiotlb_xen: Warning: only able to allocate 4 MB for software IO TLB
[ 0.613084] software IO TLB [mem 0x3d400000-0x3d800000] (4MB) mapped at [ffffffc03d400000-ffffffc03d7fffff]
[ 0.654723] reset_zynqmp reset-controller: Xilinx zynqmp reset driver probed
[ 0.656706] ARM CCI_400_r1 PMU driver probed
[ 0.661969] zynqmp-pinctrl ff180000.pinctrl: zynqmp pinctrl initialized
[ 0.698018] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.763759] raid6: int64x1 gen() 368 MB/s
[ 0.831857] raid6: int64x1 xor() 407 MB/s
[ 0.900045] raid6: int64x2 gen() 631 MB/s
[ 0.968092] raid6: int64x2 xor() 552 MB/s
[ 1.036264] raid6: int64x4 gen() 957 MB/s
[ 1.104340] raid6: int64x4 xor() 680 MB/s
[ 1.172461] raid6: int64x8 gen() 898 MB/s
[ 1.240574] raid6: int64x8 xor() 683 MB/s
[ 1.308717] raid6: neonx1 gen() 666 MB/s
[ 1.376784] raid6: neonx1 xor() 781 MB/s
[ 1.444907] raid6: neonx2 gen() 1071 MB/s
[ 1.513024] raid6: neonx2 xor() 1103 MB/s
[ 1.581154] raid6: neonx4 gen() 1377 MB/s
[ 1.649254] raid6: neonx4 xor() 1317 MB/s
[ 1.717400] raid6: neonx8 gen() 1511 MB/s
[ 1.785484] raid6: neonx8 xor() 1398 MB/s
[ 1.785520] raid6: using algorithm neonx8 gen() 1511 MB/s
[ 1.789652] raid6: .... xor() 1398 MB/s, rmw enabled
[ 1.794668] raid6: using neon recovery algorithm
[ 1.800596] XGpio: /amba_pl@0/gpio@80000000: registered, base is 504
[ 1.806570] XGpio: /amba_pl@0/gpio@80001000: registered, base is 496
[ 1.812521] XGpio: /amba_pl@0/gpio@80002000: registered, base is 493
[ 1.818944] xen:balloon: Initialising balloon driver
[ 1.823976] SCSI subsystem initialized
[ 1.827395] libata version 3.00 loaded.
[ 1.827524] usbcore: registered new interface driver usbfs
[ 1.832932] usbcore: registered new interface driver hub
[ 1.838288] usbcore: registered new device driver usb
[ 1.843425] media: Linux media interface: v0.10
[ 1.847972] Linux video capture interface: v2.00
[ 1.852656] pps_core: LinuxPPS API ver. 1 registered
[ 1.857641] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 1.866822] PTP clock support registered
[ 1.870802] EDAC MC: Ver: 3.0.0
[ 1.876358] zynqmp-ipi ff9905c0.mailbox: Probed ZynqMP IPI Mailbox driver.
[ 1.881082] FPGA manager framework
[ 1.884466] fpga-region fpga-full: FPGA Region probed
[ 1.889558] Advanced Linux Sound Architecture Driver Initialized.
[ 1.895877] Bluetooth: Core ver 2.22
[ 1.899272] NET: Registered protocol family 31
[ 1.903747] Bluetooth: HCI device and connection manager initialized
[ 1.910150] Bluetooth: HCI socket layer initialized
[ 1.915079] Bluetooth: L2CAP socket layer initialized
[ 1.920192] Bluetooth: SCO socket layer initialized
[ 1.926965] clocksource: Switched to clocksource arch_sys_counter
[ 1.931355] VFS: Disk quotas dquot_6.6.0
[ 1.935279] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 1.949778] NET: Registered protocol family 2
[ 1.950164] TCP established hash table entries: 8192 (order: 4, 65536 bytes)
[ 1.955759] TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
[ 1.962399] TCP: Hash tables configured (established 8192 bind 8192)
[ 1.968742] UDP hash table entries: 512 (order: 2, 16384 bytes)
[ 1.974656] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
[ 1.981131] NET: Registered protocol family 1
[ 1.986362] RPC: Registered named UNIX socket transport module.
[ 1.991422] RPC: Registered udp transport module.
[ 1.996174] RPC: Registered tcp transport module.
[ 2.000930] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 2.007422] PCI: CLS 0 bytes, default 128
[ 2.007535] Trying to unpack rootfs image as initramfs...
[ 4.321785] Freeing initrd memory: 53408K
[ 4.322750] audit: initializing netlink subsys (disabled)
[ 4.326591] audit: type=2000 audit(4.088:1): state=initialized audit_enabled=0 res=1
[ 4.333667] workingset: timestamp_bits=62 max_order=18 bucket_order=0
[ 4.340758] NFS: Registering the id_resolver key type
[ 4.345125] Key type id_resolver registered
[ 4.349334] Key type id_legacy registered
[ 4.353405] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 4.360160] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
[ 4.396256] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
[ 4.398099] io scheduler noop registered
[ 4.402093] io scheduler deadline registered
[ 4.406423] io scheduler cfq registered (default)
[ 4.411165] io scheduler mq-deadline registered
[ 4.415748] io scheduler kyber registered
[ 4.420808] OF: /amba/dma@fd500000: could not find phandle
[ 4.425674] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
[ 4.432401] OF: /amba/dma@fd510000: could not find phandle
[ 4.438018] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
[ 4.444937] OF: /amba/dma@fd520000: could not find phandle
[ 4.450553] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
[ 4.457476] OF: /amba/dma@fd530000: could not find phandle
[ 4.463098] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
[ 4.470018] OF: /amba/dma@fd540000: could not find phandle
[ 4.475643] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
[ 4.482562] OF: /amba/dma@fd550000: could not find phandle
[ 4.488181] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
[ 4.495104] OF: /amba/dma@fd560000: could not find phandle
[ 4.500729] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
[ 4.507646] OF: /amba/dma@fd570000: could not find phandle
[ 4.513264] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
[ 4.520382] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
[ 4.527308] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
[ 4.534315] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
[ 4.541323] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
[ 4.548334] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
[ 4.555345] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
[ 4.562341] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
[ 4.569352] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
[ 4.579373] xen:xen_evtchn: Event-channel device installed
[ 4.633733] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 4.638567] cacheinfo: Unable to detect cache hierarchy for CPU 0
[ 4.647441] brd: module loaded
[ 4.652005] loop: module loaded
[ 4.652051] Invalid max_queues (4), will use default max: 1.
[ 4.656058] OF: /amba/ahci@fd0c0000: could not find phandle
[ 4.661248] ahci-ceva fd0c0000.ahci: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl platform mode
[ 4.669948] ahci-ceva fd0c0000.ahci: flags: 64bit ncq sntf pm clo only pmp fbs pio slum part ccc sds apst
[ 4.681699] scsi host0: ahci-ceva
[ 4.683322] scsi host1: ahci-ceva
[ 4.686476] ata1: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x100 irq 32
[ 4.694347] ata2: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x180 irq 32
[ 4.702449] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 4.709110] OF: /amba/spi@ff0f0000: could not find phandle
[ 4.715631] m25p80 spi0.0: found n25q256a, expected m25p80
[ 4.720190] m25p80 spi0.0: n25q256a (65536 Kbytes)
[ 4.724720] 3 ofpart partitions found on MTD device spi0.0
[ 4.730232] Creating 3 MTD partitions on "spi0.0":
[ 4.735080] 0x000000000000-0x000001360000 : "boot"
[ 4.740454] 0x000001360000-0x0000013a0000 : "bootenv"
[ 4.745604] 0x0000013a0000-0x000002aa0000 : "kernel"
[ 4.751513] libphy: Fixed MDIO Bus: probed
[ 4.755253] tun: Universal TUN/TAP device driver, 1.6
[ 4.765845] CAN device driver interface
[ 4.766294] OF: /amba/ethernet@ff0e0000: could not find phandle
[ 4.770500] macb ff0e0000.ethernet: Not enabling partial store and forward
[ 4.777550] libphy: MACB_mii_bus: probed
[ 4.785639] macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 25 (00:0a:35:00:22:01)
[ 4.790905] TI DP83867 ff0e0000.ethernet-ffffffff:09: attached PHY driver [TI DP83867] (mii_bus:phy_addr=ff0e0000.ethernet-ffffffff:09, irq=POLL)
[ 4.804511] xen_netfront: Initialising Xen virtual ethernet driver
[ 4.810247] usbcore: registered new interface driver asix
[ 4.815667] usbcore: registered new interface driver ax88179_178a
[ 4.821790] usbcore: registered new interface driver cdc_ether
[ 4.827671] usbcore: registered new interface driver net1080
[ 4.833380] usbcore: registered new interface driver cdc_subset
[ 4.839349] usbcore: registered new interface driver zaurus
[ 4.844982] usbcore: registered new interface driver cdc_ncm
[ 4.851982] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APM
[ 4.857366] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 4.863548] ehci-pci: EHCI PCI platform driver
[ 4.868320] usbcore: registered new interface driver cdc_acm
[ 4.873754] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
[ 4.881821] usbcore: registered new interface driver uas
[ 4.887192] usbcore: registered new interface driver usb-storage
[ 4.894503] rtc_zynqmp ffa60000.rtc: rtc core: registered ffa60000.rtc as rtc0
[ 4.900540] i2c /dev entries driver
[ 4.904780] cdns-i2c ff030000.i2c: 400 kHz mmio ff030000 irq 26
[ 4.939386] i2c i2c-0: Added multiplexed i2c bus 1
[ 4.939632] i2c i2c-0: Added multiplexed i2c bus 2
[ 4.943487] pca954x 0-0070: registered 2 multiplexed busses for I2C mux pca9542
[ 4.950915] IR NEC protocol handler initialized
[ 4.955413] IR RC5(x/sz) protocol handler initialized
[ 4.960514] IR RC6 protocol handler initialized
[ 4.965099] IR JVC protocol handler initialized
[ 4.969683] IR Sony protocol handler initialized
[ 4.974354] IR SANYO protocol handler initialized
[ 4.979112] IR Sharp protocol handler initialized
[ 4.983869] IR MCE Keyboard/mouse protocol handler initialized
[ 4.989752] IR XMP protocol handler initialized
[ 4.995347] usbcore: registered new interface driver uvcvideo
[ 5.000133] USB Video Class driver (1.1.1)
[ 5.006325] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer at ffffff800917d000 with timeout 10s
[ 5.013701] Bluetooth: HCI UART driver ver 2.3
[ 5.017787] Bluetooth: HCI UART protocol H4 registered
[ 5.022974] Bluetooth: HCI UART protocol BCSP registered
[ 5.028352] Bluetooth: HCI UART protocol LL registered
[ 5.033522] Bluetooth: HCI UART protocol ATH3K registered
[ 5.038971] Bluetooth: HCI UART protocol Three-wire (H5) registered
[ 5.045322] Bluetooth: HCI UART protocol Intel registered
[ 5.050735] Bluetooth: HCI UART protocol QCA registered
[ 5.056044] usbcore: registered new interface driver bcm203x
[ 5.061747] usbcore: registered new interface driver bpa10x
[ 5.067375] usbcore: registered new interface driver bfusb
[ 5.072906] usbcore: registered new interface driver btusb
[ 5.078416] Bluetooth: Generic Bluetooth SDIO driver ver 0.1
[ 5.084170] usbcore: registered new interface driver ath3k
[ 5.089787] EDAC MC: ECC not enabled
[ 5.093448] EDAC DEVICE0: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
[ 5.105762] cpu cpu0: failed to get clock: -2
[ 5.109908] cpufreq-dt: probe of cpufreq-dt failed with error -2
[ 5.116099] sdhci: Secure Digital Host Controller Interface driver
[ 5.122185] sdhci: Copyright(c) Pierre Ossman
[ 5.126595] sdhci-pltfm: SDHCI platform and OF driver helper
[ 5.132412] OF: /amba/sdhci@ff160000: could not find phandle
[ 5.138739] ata1: SATA link down (SStatus 0 SControl 330)
[ 5.143510] ata2: SATA link down (SStatus 0 SControl 330)
[ 5.194950] mmc0: SDHCI controller on ff160000.sdhci [ff160000.sdhci] using ADMA 64-bit
[ 5.197446] PLL: shutdown
[ 5.200175] PLL: enable
[ 5.208319] OF: /amba/sdhci@ff170000: could not find phandle
[ 5.250947] mmc1: SDHCI controller on ff170000.sdhci [ff170000.sdhci] using ADMA 64-bit
[ 5.259333] ledtrig-cpu: registered to indicate activity on CPUs
[ 5.259973] usbcore: registered new interface driver usbhid
[ 5.265414] usbhid: USB HID core driver
[ 5.278136] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
[ 5.280501] pktgen: Packet Generator for packet performance testing. Version: 2.75
[ 5.287288] Netfilter messages via NETLINK v0.30.
[ 5.291520] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 5.296790] Initializing XFRM netlink socket
[ 5.301139] NET: Registered protocol family 10
[ 5.306112] Segment Routing with IPv6
[ 5.309345] ip6_tables: (C) 2000-2006 Netfilter Core Team
[ 5.314775] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 5.321031] NET: Registered protocol family 17
[ 5.325222] NET: Registered protocol family 15
[ 5.329719] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[ 5.342684] Ebtables v2.0 registered
[ 5.351967] can: controller area network core (rev 20170425 abi 9)
[ 5.352629] NET: Registered protocol family 29
[ 5.357102] can: raw protocol (rev 20170425)
[ 5.361421] can: broadcast manager protocol (rev 20170425 t)
[ 5.367132] can: netlink gateway (rev 20170425) max_hops=1
[ 5.372732] mmc0: new HS200 MMC card at address 0001
[ 5.378006] mmcblk0: mmc0:0001 Q2J55L 7.09 GiB
[ 5.382358] mmcblk0boot0: mmc0:0001 Q2J55L partition 1 16.0 MiB
[ 5.388327] mmcblk0boot1: mmc0:0001 Q2J55L partition 2 16.0 MiB
[ 5.394290] mmcblk0rpmb: mmc0:0001 Q2J55L partition 3 4.00 MiB
[ 5.400284] Bluetooth: RFCOMM TTY layer initialized
[ 5.405030] Bluetooth: RFCOMM socket layer initialized
[ 5.410211] Bluetooth: RFCOMM ver 1.11
[ 5.414021] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[ 5.419375] Bluetooth: BNEP filters: protocol multicast
[ 5.424654] Bluetooth: BNEP socket layer initialized
[ 5.429668] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
[ 5.435639] Bluetooth: HIDP socket layer initialized
[ 5.440781] 9pnet: Installing 9P2000 support
[ 5.444994] Key type dns_resolver registered
[ 5.450112] registered taskstats version 1
[ 5.453894] mmcblk0: p1
[ 5.457626] Btrfs loaded, crc32c=crc32c-generic
[ 5.467481] dwc3-of-simple ff9d0000.usb0: dwc3_simple_set_phydata: Can't find usb3-phy
[ 5.470263] OF: /amba/usb0@ff9d0000/dwc3@fe200000: could not find phandle
[ 5.477636] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 5.482254] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
[ 5.490311] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x22010010
[ 5.498728] xhci-hcd xhci-hcd.0.auto: irq 57, io mem 0xfe200000
[ 5.504791] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 5.511481] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 5.518732] usb usb1: Product: xHCI Host Controller
[ 5.523662] usb usb1: Manufacturer: Linux 4.14.0-xilinx-v2018.2 xhci-hcd
[ 5.530409] usb usb1: SerialNumber: xhci-hcd.0.auto
[ 5.536315] mmc1: new high speed SDHC card at address 1234
[ 5.541191] hub 1-0:1.0: USB hub found
[ 5.544816] mmcblk1: mmc1:1234 SA08G 7.21 GiB (ro)
[ 5.549702] hub 1-0:1.0: 1 port detected
[ 5.553875] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 5.559062] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
[ 5.566857] mmcblk1: p1
[ 5.569822] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[ 5.577565] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
[ 5.584306] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 5.591567] usb usb2: Product: xHCI Host Controller
[ 5.596496] usb usb2: Manufacturer: Linux 4.14.0-xilinx-v2018.2 xhci-hcd
[ 5.603243] usb usb2: SerialNumber: xhci-hcd.0.auto
[ 5.608446] hub 2-0:1.0: USB hub found
[ 5.612083] hub 2-0:1.0: 1 port detected
[ 5.617068] rtc_zynqmp ffa60000.rtc: setting system clock to 1970-01-01 00:00:24 UTC (24)
[ 5.624286] clk: Not disabling unused clocks
[ 5.628546] ALSA device list:
[ 5.631527] No soundcards found.
[ 5.635749] Freeing unused kernel memory: 512K
[ 5.715208] udevd[1716]: starting version 3.2.2
[ 5.722808] udevd[1717]: starting eudev-3.2.2
[ 6.759791] export_store: invalid GPIO 350
[ 6.759904] blinky[1980]: unhandled level 2 translation fault (11) at 0x00000000, esr 0x92000006, in libc-2.26.so[7fad112000+138000]
[ 6.770323] CPU: 0 PID: 1980 Comm: blinky Not tainted 4.14.0-xilinx-v2018.2 #1
[ 6.777560] Hardware name: xlnx,zynqmp (DT)
[ 6.781799] task: ffffffc03d355000 task.stack: ffffff800b318000
[ 6.787768] PC is at 0x7fad173abc
[ 6.791141] LR is at 0x400dfc
[ 6.794161] pc : [<0000007fad173abc>] lr : [<0000000000400dfc>] pstate: 60000000
[ 6.801605] sp : 0000007fd208a760
[ 6.804979] x29: 0000007fd208a760 x28: 0000000000000000
[ 6.810342] x27: 0000000000000000 x26: 0000007fd208aedf
[ 6.815705] x25: 0000007fd208a874 x24: 0000000000401140
[ 6.821068] x23: 0000000000412000 x22: 0000000000000003
[ 6.826431] x21: 0000000000000001 x20: 0000007fd208a7c8
[ 6.831794] x19: 0000000000000000 x18: 0000007fd208a50d
[ 6.837157] x17: 0000007fad173aa0 x16: 0000000000412058
[ 6.842521] x15: 000000000000000a x14: 000000000000015e
[ 6.847884] x13: 0000000000000000 x12: 0000000000000000
[ 6.853247] x11: 0000000000000020 x10: 0000007fd208a510
[ 6.858609] x9 : 0000000000000000 x8 : 0000000000000038
[ 6.863973] x7 : 0000000000000000 x6 : 0000000000401126
[ 6.869336] x5 : 0000000000000000 x4 : 000000002dddd260
[ 6.874699] x3 : 0000000000000000 x2 : 0000000000000001
[ 6.880062] x1 : 0000000000000001 x0 : 0000007fd208a7c8
[ 7.081682] pps pps0: new PPS source ptp0
[ 7.081741] macb ff0e0000.ethernet: gem-ptp-timer ptp clock registered.
[ 7.086922] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 9.131228] macb ff0e0000.ethernet eth0: link up (1000/Full)
[ 9.131354] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 339.162342] random: crng init done
[-- Attachment #6: xen-overlay.dtsi.txt --]
[-- Type: text/plain, Size: 1513 bytes --]
/ {
chosen {
#address-cells = <2>;
#size-cells = <1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
};
&smmu {
status = "okay";
mmu-masters = < &gem0 0x874
&gem1 0x875
&gem2 0x876
&gem3 0x877
&dwc3_0 0x860
&dwc3_1 0x861
&qspi 0x873
&lpd_dma_chan1 0x868
&lpd_dma_chan2 0x869
&lpd_dma_chan3 0x86a
&lpd_dma_chan4 0x86b
&lpd_dma_chan5 0x86c
&lpd_dma_chan6 0x86d
&lpd_dma_chan7 0x86e
&lpd_dma_chan8 0x86f
&fpd_dma_chan1 0x14e8
&fpd_dma_chan2 0x14e9
&fpd_dma_chan3 0x14ea
&fpd_dma_chan4 0x14eb
&fpd_dma_chan5 0x14ec
&fpd_dma_chan6 0x14ed
&fpd_dma_chan7 0x14ee
&fpd_dma_chan8 0x14ef
&sdhci0 0x870
&sdhci1 0x871
&nand0 0x872>;
};
&ttc0 {
ttc0@ff110000 {
compatible = "cdns,ttc";
interrupt-parent = <0x2>;
interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x46 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough = <0x1>;
};
};
&uart1 {
xen,passthrough = <0x1>;
};
&gpio {
xen,passthrough = <0x1>;
};
[-- Attachment #7: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-13 16:01 ` Milan Boberic
@ 2018-10-14 22:46 ` Stefano Stabellini
2018-10-15 12:27 ` Milan Boberic
2018-10-15 8:14 ` Julien Grall
1 sibling, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-14 22:46 UTC (permalink / raw)
To: Milan Boberic
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, stefano.stabellini
On Sat, 13 Oct 2018, Milan Boberic wrote:
> > This is definitely wrong. Can you please also post the full host device
> > tree with your modifications that you are using for Xen and Dom0? You
> > should have something like:
> >
> > timer@ff110000 {
> > compatible = "cdns,ttc";
> > interrupt-parent = <0x2>;
> > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > reg = <0x0 0xff110000 0x0 0x1000>;
> > timer-width = <0x20>;
> > power-domains = <0x3b>;
> > xen,passthrough;
> > };
> > For each of the nodes of the devices you are assigning to the DomU.
>
> I put
> &ttc0 {
> xen,passthrough = <0x1>;
> };
> because when I was making bm app I was following this guide. Now I see
> it's wrong. When I copied directly:
> timer@ff110000 {
> compatible = "cdns,ttc";
> interrupt-parent = <0x2>;
> interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> reg = <0x0 0xff110000 0x0 0x1000>;
> timer-width = <0x20>;
> power-domains = <0x3b>;
> xen,passthrough;
> };
> in to the xen-overlay.dtsi file it resulted an error during
> device-tree build. I modified it a little bit so I can get successful
> build, there are all device-tree files included in attachment. I'm not
> sure how to set this passthrough properly, if you could take a look at
> those files in attachment I'd be more then grateful.
>
> > It's here: https://github.com/Xilinx/xen/blob/xilinx/stable-4.9/xen/arch/arm/vgic.c#L462
> Oh, about that. I sent you wrong branch, I was using Xen 4.10. Anyway
> now I moved to Xen 4.11 like you suggested and applied your patch and
> Dario's also.
>
> Okay, now when I want to xl create my domU (bare-metal app) I get error:
>
> Parsing config from timer.cfg
> (XEN) IRQ 68 is already used by domain 0
> libxl: error: libxl_create.c:1354:domcreate_launch_dm: Domain 1:failed
> give domain access to irq 68: Device or resource busy
> libxl: error: libxl_domain.c:1034:libxl__destroy_domid: Domain
> 1:Non-existant domain
> libxl: error: libxl_domain.c:993:domain_destroy_callback: Domain
> 1:Unable to destroy guest
> libxl: error: libxl_domain.c:920:domain_destroy_cb: Domain
> 1:Destruction of domain failed
That means that the "xen,passthrough" addition to the host device tree went wrong.
> I guess my modifications of:
> timer@ff110000 {
> compatible = "cdns,ttc";
> interrupt-parent = <0x2>;
> interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> reg = <0x0 0xff110000 0x0 0x1000>;
> timer-width = <0x20>;
> power-domains = <0x3b>;
> xen,passthrough;
> };
> are not correct.
Right
> I tried to change interrupts to:
> interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x46 0x4>;
> because if you check here on page 310 interrupts for TTC0 are 68:70.
> But that didn't work either I still get same error.
The interrupt numbers specified in the DTS are the real interrupt minus
32: 68-32 = 36 = 0x24. The DTS was correct.
> I also tried to change xen,passthrough; line with:
> xen,passthrough = <0x1>;
> but also without success, still the same error.
>
> Are you sure about this line:
> reg = <0x0 0xff110000 0x0 0x1000>; ?
> Or it should be like this?
> reg = <0x0 0xff110000 0x1000>;
Yes, that could be a problem. The format depends on the #address-cells
and #size-cells parameters. You didn't send me system-conf.dtsi, so I
don't know for sure which one of the two is right. In any case, you
should not duplicate the timer@ff110000 node in device tree. You should
only add "xen,passthrough;" to the existing timer@ff110000 node, which
is probably in system-conf.dtsi. So, avoid adding a new timer node to
xen-overlay.dtsi, and instead modify system-conf.dtsi.
> I also included xl dmesg and dmesg in attachments (after xl create of bm app).
>
> Thanks in advance!
>
> Milan
>
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-13 16:01 ` Milan Boberic
2018-10-14 22:46 ` Stefano Stabellini
@ 2018-10-15 8:14 ` Julien Grall
2018-10-15 12:50 ` Julien Grall
1 sibling, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-15 8:14 UTC (permalink / raw)
To: Milan Boberic, stefano.stabellini
Cc: xen-devel, sstabellini, Meng Xu, andrii_anisov, Dario Faggioli
On 10/13/2018 05:01 PM, Milan Boberic wrote:
> Hi,
Hi,
>
>> Don't interrupt _come_ from hardware and go/are routed to
>> hypervisor/os/app?
> Yes they do, sorry, I reversed the order because I'm a newbie :) .
>
>> Would you mind to explain what is the triple timer counter?
> On this link on page 342 is explanation.
Which link?
>
>> This is not the official Xen repository and look like patches have been applied on top. I am afraid, I am not going to be able help here. Could you do the same experiment with Xen 4.11?
>
> I think I have to get Xen from Xilinx because I use board that has
> Zynq Ultrascale. Stefano sent branch with Xen 4.11 so I built with it.
The board should be fully supported upstreamed. If Xilinx has more patch
on top, then you would need to seek support from them because I don't
know what they changed in Xen.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-14 22:46 ` Stefano Stabellini
@ 2018-10-15 12:27 ` Milan Boberic
2018-10-16 7:13 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-15 12:27 UTC (permalink / raw)
To: stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel
[-- Attachment #1: Type: text/plain, Size: 6347 bytes --]
In attachment are device-tree files I found in my project:
device-tree.bbappend - under
<path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/
xen-overlay.dtsi , system-user.dtsi and zunqmp-qemu-arm.dts - under
<path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/files
zynqmp-qemu-multiarch-arm and zynqmp-qemu-pmu - under
<path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/files/multi-arch
pcw.dtsi , pl.dtsi , system-conf.dtsi , sistem-top.dts ,
zynqmp-clk-ccf.dtsi and zynqmp.dtsi -
under<path_to_project>/uz3eg_iocc_2018_2/components/plnx_workspace/device-tree/device-tree/
In system-conf.dtsi file first line says:
/*
* CAUTION: This file is automatically generated by PetaLinux SDK.
* DO NOT modify this file
*/
and there is no sigh of timer.
If you could take a look at this and other files in attachment it
would be great.
I also tried to run bare-metal app with this changes and it worked, added:
&ttc0 {
status = "okay";
compatible = "cdns,ttc";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
in xen-overlay.dtsi file, because it's overlay it shouldn't duplicate
timer nod, right?
After build I ran:
dtc -I dtb -O dts -o system.dts system.dtb
and checked for ttc0, it seems okay except interrupt-parent is <0x4>
not <0x2> like in your example:
timer@ff110000 {
compatible = "cdns,ttc";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
xen,passthrough;
};
status was "disable" before.
system.dts is also added in attachment.
Is this the working passthrough?Because jitter is the same .
When legit, working passthrough is set correctly, jitter should be
smaller, right?
Thanks in advance!
Milan
On Mon, Oct 15, 2018 at 12:50 AM Stefano Stabellini
<stefano.stabellini@xilinx.com> wrote:
>
> On Sat, 13 Oct 2018, Milan Boberic wrote:
> > > This is definitely wrong. Can you please also post the full host device
> > > tree with your modifications that you are using for Xen and Dom0? You
> > > should have something like:
> > >
> > > timer@ff110000 {
> > > compatible = "cdns,ttc";
> > > interrupt-parent = <0x2>;
> > > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > > reg = <0x0 0xff110000 0x0 0x1000>;
> > > timer-width = <0x20>;
> > > power-domains = <0x3b>;
> > > xen,passthrough;
> > > };
> > > For each of the nodes of the devices you are assigning to the DomU.
> >
> > I put
> > &ttc0 {
> > xen,passthrough = <0x1>;
> > };
> > because when I was making bm app I was following this guide. Now I see
> > it's wrong. When I copied directly:
> > timer@ff110000 {
> > compatible = "cdns,ttc";
> > interrupt-parent = <0x2>;
> > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > reg = <0x0 0xff110000 0x0 0x1000>;
> > timer-width = <0x20>;
> > power-domains = <0x3b>;
> > xen,passthrough;
> > };
> > in to the xen-overlay.dtsi file it resulted an error during
> > device-tree build. I modified it a little bit so I can get successful
> > build, there are all device-tree files included in attachment. I'm not
> > sure how to set this passthrough properly, if you could take a look at
> > those files in attachment I'd be more then grateful.
> >
> > > It's here: https://github.com/Xilinx/xen/blob/xilinx/stable-4.9/xen/arch/arm/vgic.c#L462
> > Oh, about that. I sent you wrong branch, I was using Xen 4.10. Anyway
> > now I moved to Xen 4.11 like you suggested and applied your patch and
> > Dario's also.
> >
> > Okay, now when I want to xl create my domU (bare-metal app) I get error:
> >
> > Parsing config from timer.cfg
> > (XEN) IRQ 68 is already used by domain 0
> > libxl: error: libxl_create.c:1354:domcreate_launch_dm: Domain 1:failed
> > give domain access to irq 68: Device or resource busy
> > libxl: error: libxl_domain.c:1034:libxl__destroy_domid: Domain
> > 1:Non-existant domain
> > libxl: error: libxl_domain.c:993:domain_destroy_callback: Domain
> > 1:Unable to destroy guest
> > libxl: error: libxl_domain.c:920:domain_destroy_cb: Domain
> > 1:Destruction of domain failed
>
> That means that the "xen,passthrough" addition to the host device tree went wrong.
>
>
> > I guess my modifications of:
> > timer@ff110000 {
> > compatible = "cdns,ttc";
> > interrupt-parent = <0x2>;
> > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > reg = <0x0 0xff110000 0x0 0x1000>;
> > timer-width = <0x20>;
> > power-domains = <0x3b>;
> > xen,passthrough;
> > };
> > are not correct.
>
> Right
>
>
> > I tried to change interrupts to:
> > interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x46 0x4>;
> > because if you check here on page 310 interrupts for TTC0 are 68:70.
> > But that didn't work either I still get same error.
>
> The interrupt numbers specified in the DTS are the real interrupt minus
> 32: 68-32 = 36 = 0x24. The DTS was correct.
>
>
> > I also tried to change xen,passthrough; line with:
> > xen,passthrough = <0x1>;
> > but also without success, still the same error.
> >
> > Are you sure about this line:
> > reg = <0x0 0xff110000 0x0 0x1000>; ?
> > Or it should be like this?
> > reg = <0x0 0xff110000 0x1000>;
>
> Yes, that could be a problem. The format depends on the #address-cells
> and #size-cells parameters. You didn't send me system-conf.dtsi, so I
> don't know for sure which one of the two is right. In any case, you
> should not duplicate the timer@ff110000 node in device tree. You should
> only add "xen,passthrough;" to the existing timer@ff110000 node, which
> is probably in system-conf.dtsi. So, avoid adding a new timer node to
> xen-overlay.dtsi, and instead modify system-conf.dtsi.
>
>
> > I also included xl dmesg and dmesg in attachments (after xl create of bm app).
> >
> > Thanks in advance!
> >
> > Milan
> >
[-- Attachment #2: pl.dtsi.txt --]
[-- Type: text/plain, Size: 2357 bytes --]
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 15 10:35:07 2018
*/
/ {
amba_pl: amba_pl@0 {
#address-cells = <2>;
#size-cells = <2>;
compatible = "simple-bus";
ranges ;
axi_gpio_0: gpio@80000000 {
#gpio-cells = <3>;
clock-names = "s_axi_aclk";
clocks = <&clk 71>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x0 0x80000000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x00000000>;
xlnx,dout-default-2 = <0x00000000>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xFFFFFFFF>;
xlnx,tri-default-2 = <0xFFFFFFFF>;
};
axi_gpio_1: gpio@80001000 {
#gpio-cells = <3>;
clock-names = "s_axi_aclk";
clocks = <&clk 71>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x0 0x80001000 0x0 0x1000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x1>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x00000000>;
xlnx,dout-default-2 = <0x00000000>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xFFFFFFFF>;
xlnx,tri-default-2 = <0xFFFFFFFF>;
};
axi_gpio_2: gpio@80002000 {
#gpio-cells = <3>;
clock-names = "s_axi_aclk";
clocks = <&clk 71>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller ;
reg = <0x0 0x80002000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x00000000>;
xlnx,dout-default-2 = <0x00000000>;
xlnx,gpio-width = <0x3>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xFFFFFFFF>;
xlnx,tri-default-2 = <0xFFFFFFFF>;
};
psu_ctrl_ipi: PERIPHERAL@ff380000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff380000 0x0 0x80000>;
};
psu_message_buffers: PERIPHERAL@ff990000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff990000 0x0 0x10000>;
};
};
};
[-- Attachment #3: device-tree.bbappend.txt --]
[-- Type: text/plain, Size: 124 bytes --]
FILESEXTRAPATHS_prepend := "${THISDIR}/files:"
SRC_URI += "file://system-user.dtsi"
SRC_URI += "file://xen-overlay.dtsi"
[-- Attachment #4: pcw.dtsi.txt --]
[-- Type: text/plain, Size: 2965 bytes --]
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 15 10:35:07 2018
*/
&lpd_dma_chan1 {
status = "okay";
};
&lpd_dma_chan2 {
status = "okay";
};
&lpd_dma_chan3 {
status = "okay";
};
&lpd_dma_chan4 {
status = "okay";
};
&lpd_dma_chan5 {
status = "okay";
};
&lpd_dma_chan6 {
status = "okay";
};
&lpd_dma_chan7 {
status = "okay";
};
&lpd_dma_chan8 {
status = "okay";
};
&xilinx_ams {
status = "okay";
};
&perf_monitor_ocm {
xlnx,enable-32bit-filter-id = <0x1>;
xlnx,enable-advanced = <0x1>;
xlnx,enable-event-count = <0x1>;
xlnx,enable-event-log = <0x0>;
xlnx,enable-profile = <0x0>;
xlnx,enable-trace = <0x0>;
xlnx,fifo-axis-depth = <0x20>;
xlnx,fifo-axis-tdata-width = <0x38>;
xlnx,fifo-axis-tid-width = <0x1>;
xlnx,global-count-width = <0x20>;
xlnx,have-sampled-metric-cnt = <0x1>;
xlnx,metric-count-scale = <0x1>;
xlnx,metrics-sample-count-width = <0x20>;
xlnx,num-monitor-slots = <0x1>;
xlnx,num-of-counters = <0x3>;
};
&gem3 {
phy-mode = "rgmii-id";
status = "okay";
xlnx,ptp-enet-clock = <0x0>;
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&gpio {
emio-gpio-width = <32>;
gpio-mask-high = <0x0>;
gpio-mask-low = <0x5600>;
status = "okay";
};
&gpu {
status = "okay";
};
&i2c1 {
clock-frequency = <400000>;
status = "okay";
};
&pinctrl0 {
status = "okay";
};
&qspi {
is-dual = <1>;
num-cs = <1>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
status = "okay";
};
&rtc {
status = "okay";
};
&sata {
ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
status = "okay";
};
&sdhci0 {
clock-frequency = <199998000>;
status = "okay";
xlnx,mio_bank = <0x0>;
};
&sdhci1 {
clock-frequency = <199998000>;
status = "okay";
xlnx,mio_bank = <0x1>;
};
&serdes {
status = "okay";
};
&uart0 {
device_type = "serial";
port-number = <0>;
status = "okay";
u-boot,dm-pre-reloc ;
};
&uart1 {
device_type = "serial";
port-number = <1>;
status = "okay";
u-boot,dm-pre-reloc ;
};
&usb0 {
status = "okay";
xlnx,usb-reset = <0x2faf080>;
};
&dwc3_0 {
status = "okay";
};
&watchdog0 {
status = "okay";
};
&ams_ps {
status = "okay";
};
&ams_pl {
status = "okay";
};
[-- Attachment #5: system-conf.dtsi.txt --]
[-- Type: text/plain, Size: 834 bytes --]
/*
* CAUTION: This file is automatically generated by PetaLinux SDK.
* DO NOT modify this file
*/
/ {
chosen {
bootargs = "earlycon clk_ignore_unused root=/dev/ram rw";
stdout-path = "serial0:115200n8";
};
};
&gem3 {
local-mac-address = [00 0a 35 00 22 01];
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
flash0: flash@0 {
compatible = "n25q512a","micron,m25p80";
spi-tx-bus-width=<1>;
spi-rx-bus-width=<4>;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <108000000>;
partition@0x00000000 {
label = "boot";
reg = <0x00000000 0x01360000>;
};
partition@0x01360000 {
label = "bootenv";
reg = <0x01360000 0x00040000>;
};
partition@0x013a0000 {
label = "kernel";
reg = <0x013a0000 0x01700000>;
};
};
};
[-- Attachment #6: system-top.dts.txt --]
[-- Type: text/plain, Size: 566 bytes --]
/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Mon Oct 15 10:35:07 2018
*/
/dts-v1/;
/include/ "zynqmp.dtsi"
/include/ "zynqmp-clk-ccf.dtsi"
/include/ "pl.dtsi"
/include/ "pcw.dtsi"
/ {
chosen {
bootargs = "earlycon clk_ignore_unused";
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &gem3;
i2c0 = &i2c1;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &qspi;
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x7ff00000>;
};
};
#include "system-user.dtsi"
[-- Attachment #7: system-user.dtsi.txt --]
[-- Type: text/plain, Size: 1828 bytes --]
/include/ "system-conf.dtsi"
/include/ "xen-overlay.dtsi"
/ {
};
&gem3 {
status = "okay";
local-mac-address = [00 0a 35 00 02 90];
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
phy0: phy@9 {
reg = <0x9>;
ti,rx-internal-delay = <0x5>;
ti,tx-internal-delay = <0x5>;
ti,fifo-depth = <0x1>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
i2cswitch@70 { /* U7 on UZ3EG SOM */
compatible = "nxp,pca9542";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
i2c@0 { /* i2c mw 70 0 1 */
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* IIC_EEPROM */
eeprom@51 { /* U5 on UZ3EG IOCC and U7 on the UZ7EV EVCC*/
compatible = "at,24c08";
reg = <0x51>;
};
};
};
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
is-dual = <1>; /* Set for dual-parallel QSPI config */
num-cs = <2>;
xlnx,fb-clk = <0x1>;
flash0: flash@0 {
/* The Flash described below doesn't match our board ("micron,n25qu256a"), but is needed */
/* so the Flash MTD partitions are correctly identified in /proc/mtd */
compatible = "micron,m25p80"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Set to 108000000 Based on DC1 spec */
};
};
/* SD0 eMMC, 8-bit wide data bus */
&sdhci0 {
status = "okay";
bus-width = <8>;
max-frequency = <50000000>;
};
/* SD1 with level shifter */
&sdhci1 {
status = "okay";
max-frequency = <50000000>;
no-1-8-v; /* for 1.0 silicon */
};
/* ULPI SMSC USB3320 */
&usb0 {
status = "okay";
};
&dwc3_0 {
status = "okay";
dr_mode = "host";
phy-names = "usb3-phy";
};
[-- Attachment #8: xen-overlay.dtsi.txt --]
[-- Type: text/plain, Size: 1475 bytes --]
/ {
chosen {
#address-cells = <2>;
#size-cells = <1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
};
&smmu {
status = "okay";
mmu-masters = < &gem0 0x874
&gem1 0x875
&gem2 0x876
&gem3 0x877
&dwc3_0 0x860
&dwc3_1 0x861
&qspi 0x873
&lpd_dma_chan1 0x868
&lpd_dma_chan2 0x869
&lpd_dma_chan3 0x86a
&lpd_dma_chan4 0x86b
&lpd_dma_chan5 0x86c
&lpd_dma_chan6 0x86d
&lpd_dma_chan7 0x86e
&lpd_dma_chan8 0x86f
&fpd_dma_chan1 0x14e8
&fpd_dma_chan2 0x14e9
&fpd_dma_chan3 0x14ea
&fpd_dma_chan4 0x14eb
&fpd_dma_chan5 0x14ec
&fpd_dma_chan6 0x14ed
&fpd_dma_chan7 0x14ee
&fpd_dma_chan8 0x14ef
&sdhci0 0x870
&sdhci1 0x871
&nand0 0x872>;
};
&ttc0 {
status = "okay";
compatible = "cdns,ttc";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
xen,passthrough;
};
&uart1 {
xen,passthrough = <0x1>;
};
&gpio {
xen,passthrough = <0x1>;
};
[-- Attachment #9: zynqmp-clk-ccf.dtsi.txt --]
[-- Type: text/plain, Size: 4559 bytes --]
// SPDX-License-Identifier: GPL-2.0+
/*
* Clock specification for Xilinx ZynqMP
*
* (C) Copyright 2017, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/ {
fclk0: fclk0 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 71>;
};
fclk1: fclk1 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 72>;
};
fclk2: fclk2 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 73>;
};
fclk3: fclk3 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <&clk 74>;
};
pss_ref_clk: pss_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>;
};
video_clk: video_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
pss_alt_ref_clk: pss_alt_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
gt_crx_ref_clk: gt_crx_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <108000000>;
};
aux_ref_clk: aux_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
clk: clk {
u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,zynqmp-clk";
clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <>_crx_ref_clk>;
clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
};
dp_aclk: dp_aclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-accuracy = <100>;
};
};
&can0 {
clocks = <&clk 63>, <&clk 31>;
};
&can1 {
clocks = <&clk 64>, <&clk 31>;
};
&cpu0 {
clocks = <&clk 10>;
};
&fpd_dma_chan1 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan2 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan3 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan4 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan5 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan6 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan7 {
clocks = <&clk 19>, <&clk 31>;
};
&fpd_dma_chan8 {
clocks = <&clk 19>, <&clk 31>;
};
&gpu {
clocks = <&clk 24>, <&clk 25>, <&clk 26>;
};
&lpd_dma_chan1 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan2 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan3 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan4 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan5 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan6 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan7 {
clocks = <&clk 68>, <&clk 31>;
};
&lpd_dma_chan8 {
clocks = <&clk 68>, <&clk 31>;
};
&nand0 {
clocks = <&clk 60>, <&clk 31>;
};
&gem0 {
clocks = <&clk 31>, <&clk 49>, <&clk 45>, <&clk 49>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem1 {
clocks = <&clk 31>, <&clk 50>, <&clk 46>, <&clk 50>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem2 {
clocks = <&clk 31>, <&clk 51>, <&clk 47>, <&clk 51>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem3 {
clocks = <&clk 31>, <&clk 52>, <&clk 48>, <&clk 52>, <&clk 44>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gpio {
clocks = <&clk 31>;
};
&i2c0 {
clocks = <&clk 61>;
};
&i2c1 {
clocks = <&clk 62>;
};
&perf_monitor_ocm {
clocks = <&clk 31>;
};
&pcie {
clocks = <&clk 23>;
};
&qspi {
clocks = <&clk 53>, <&clk 31>;
};
&sata {
clocks = <&clk 22>;
};
&sdhci0 {
clocks = <&clk 54>, <&clk 31>;
};
&sdhci1 {
clocks = <&clk 55>, <&clk 31>;
};
&spi0 {
clocks = <&clk 58>, <&clk 31>;
};
&spi1 {
clocks = <&clk 59>, <&clk 31>;
};
&ttc0 {
clocks = <&clk 31>;
};
&ttc1 {
clocks = <&clk 31>;
};
&ttc2 {
clocks = <&clk 31>;
};
&ttc3 {
clocks = <&clk 31>;
};
&uart0 {
clocks = <&clk 56>, <&clk 31>;
};
&uart1 {
clocks = <&clk 57>, <&clk 31>;
};
&usb0 {
clocks = <&clk 32>, <&clk 34>;
};
&usb1 {
clocks = <&clk 33>, <&clk 34>;
};
&watchdog0 {
clocks = <&clk 75>;
};
&xilinx_ams {
clocks = <&clk 70>;
};
&zynqmp_dpsub {
clocks = <&dp_aclk>, <&clk 17>, <&clk 16>;
};
&xlnx_dpdma {
clocks = <&clk 20>;
};
&zynqmp_dp_snd_codec0 {
clocks = <&clk 17>;
};
[-- Attachment #10: zynqmp.dtsi.txt --]
[-- Type: text/plain, Size: 30180 bytes --]
// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP
*
* (C) Copyright 2014 - 2015, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
/ {
compatible = "xlnx,zynqmp";
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
operating-points-v2 = <&cpu_opp_table>;
reg = <0x0>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
operating-points-v2 = <&cpu_opp_table>;
cpu-idle-states = <&CPU_SLEEP_0>;
};
idle-states {
entry-method = "arm,psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000000>;
local-timer-stop;
entry-latency-us = <300>;
exit-latency-us = <600>;
min-residency-us = <10000>;
};
};
};
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <1199999988>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp01 {
opp-hz = /bits/ 64 <599999994>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp02 {
opp-hz = /bits/ 64 <399999996>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
opp03 {
opp-hz = /bits/ 64 <299999997>;
opp-microvolt = <1000000>;
clock-latency-ns = <500000>;
};
};
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
power-domains {
compatible = "xlnx,zynqmp-genpd";
pd_usb0: pd-usb0 {
#power-domain-cells = <0x0>;
pd-id = <0x16>;
};
pd_usb1: pd-usb1 {
#power-domain-cells = <0x0>;
pd-id = <0x17>;
};
pd_sata: pd-sata {
#power-domain-cells = <0x0>;
pd-id = <0x1c>;
};
pd_spi0: pd-spi0 {
#power-domain-cells = <0x0>;
pd-id = <0x23>;
};
pd_spi1: pd-spi1 {
#power-domain-cells = <0x0>;
pd-id = <0x24>;
};
pd_uart0: pd-uart0 {
#power-domain-cells = <0x0>;
pd-id = <0x21>;
};
pd_uart1: pd-uart1 {
#power-domain-cells = <0x0>;
pd-id = <0x22>;
};
pd_eth0: pd-eth0 {
#power-domain-cells = <0x0>;
pd-id = <0x1d>;
};
pd_eth1: pd-eth1 {
#power-domain-cells = <0x0>;
pd-id = <0x1e>;
};
pd_eth2: pd-eth2 {
#power-domain-cells = <0x0>;
pd-id = <0x1f>;
};
pd_eth3: pd-eth3 {
#power-domain-cells = <0x0>;
pd-id = <0x20>;
};
pd_i2c0: pd-i2c0 {
#power-domain-cells = <0x0>;
pd-id = <0x25>;
};
pd_i2c1: pd-i2c1 {
#power-domain-cells = <0x0>;
pd-id = <0x26>;
};
pd_dp: pd-dp {
#power-domain-cells = <0x0>;
pd-id = <0x29>;
};
pd_gdma: pd-gdma {
#power-domain-cells = <0x0>;
pd-id = <0x2a>;
};
pd_adma: pd-adma {
#power-domain-cells = <0x0>;
pd-id = <0x2b>;
};
pd_ttc0: pd-ttc0 {
#power-domain-cells = <0x0>;
pd-id = <0x18>;
};
pd_ttc1: pd-ttc1 {
#power-domain-cells = <0x0>;
pd-id = <0x19>;
};
pd_ttc2: pd-ttc2 {
#power-domain-cells = <0x0>;
pd-id = <0x1a>;
};
pd_ttc3: pd-ttc3 {
#power-domain-cells = <0x0>;
pd-id = <0x1b>;
};
pd_sd0: pd-sd0 {
#power-domain-cells = <0x0>;
pd-id = <0x27>;
};
pd_sd1: pd-sd1 {
#power-domain-cells = <0x0>;
pd-id = <0x28>;
};
pd_nand: pd-nand {
#power-domain-cells = <0x0>;
pd-id = <0x2c>;
};
pd_qspi: pd-qspi {
#power-domain-cells = <0x0>;
pd-id = <0x2d>;
};
pd_gpio: pd-gpio {
#power-domain-cells = <0x0>;
pd-id = <0x2e>;
};
pd_can0: pd-can0 {
#power-domain-cells = <0x0>;
pd-id = <0x2f>;
};
pd_can1: pd-can1 {
#power-domain-cells = <0x0>;
pd-id = <0x30>;
};
pd_pcie: pd-pcie {
#power-domain-cells = <0x0>;
pd-id = <0x3b>;
};
pd_gpu: pd-gpu {
#power-domain-cells = <0x0>;
pd-id = <0x3a 0x14 0x15>;
};
};
/* PMU1<->APU IPI mailbox controller */
ipi_mailbox_pmu1: mailbox@ff990400 {
compatible = "xlnx,zynqmp-ipi-mailbox";
reg = <0x0 0xff9905c0 0x0 0x20>,
<0x0 0xff9905e0 0x0 0x20>,
<0x0 0xff990e80 0x0 0x20>,
<0x0 0xff990ea0 0x0 0x20>;
reg-names = "local_request_region", "local_response_region",
"remote_request_region", "remote_response_region";
#mbox-cells = <1>;
xlnx,ipi-ids = <0 4>;
interrupt-parent = <&gic>;
interrupts = <0 35 4>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
interrupts = <0 143 4>,
<0 144 4>,
<0 145 4>,
<0 146 4>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
firmware {
zynqmp_firmware: zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
method = "smc";
};
};
zynqmp_power: zynqmp-power {
compatible = "xlnx,zynqmp-power";
mboxes = <&ipi_mailbox_pmu1 0>,
<&ipi_mailbox_pmu1 1>;
mbox-names = "tx", "rx";
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
};
edac {
compatible = "arm,cortex-a53-edac";
};
fpga_full: fpga-full {
compatible = "fpga-region";
fpga-mgr = <&pcap>;
#address-cells = <2>;
#size-cells = <2>;
};
nvmem_firmware {
compatible = "xlnx,zynqmp-nvmem-fw";
#address-cells = <1>;
#size-cells = <1>;
soc_revision: soc_revision@0 {
reg = <0x0 0x4>;
};
};
pcap: pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
};
rst: reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <1>;
};
xlnx_rsa: zynqmp_rsa {
compatible = "xlnx,zynqmp-rsa";
};
xlnx_keccak_384: sha384 {
compatible = "xlnx,zynqmp-keccak-384";
};
amba_apu: amba_apu@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0 0 0xffffffff>;
gic: interrupt-controller@f9010000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
reg = <0x0 0xf9010000 0x10000>,
<0x0 0xf9020000 0x20000>,
<0x0 0xf9040000 0x20000>,
<0x0 0xf9060000 0x20000>;
interrupt-controller;
interrupt-parent = <&gic>;
interrupts = <1 9 0xf04>;
};
};
amba: amba {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
#address-cells = <2>;
#size-cells = <2>;
ranges;
can0: can@ff060000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff060000 0x0 0x1000>;
interrupts = <0 23 4>;
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&pd_can0>;
};
can1: can@ff070000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff070000 0x0 0x1000>;
interrupts = <0 24 4>;
interrupt-parent = <&gic>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <&pd_can1>;
};
cci: cci@fd6e0000 {
compatible = "arm,cci-400";
reg = <0x0 0xfd6e0000 0x0 0x9000>;
ranges = <0x0 0x0 0xfd6e0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
pmu@9000 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupt-parent = <&gic>;
interrupts = <0 123 4>,
<0 123 4>,
<0 123 4>,
<0 123 4>,
<0 123 4>;
};
};
/* GDMA */
fpd_dma_chan1: dma@fd500000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd500000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 124 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e8>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan2: dma@fd510000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd510000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 125 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14e9>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan3: dma@fd520000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd520000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 126 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ea>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan4: dma@fd530000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd530000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 127 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14eb>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan5: dma@fd540000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd540000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 128 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ec>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan6: dma@fd550000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd550000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 129 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ed>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan7: dma@fd560000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd560000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 130 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ee>;
power-domains = <&pd_gdma>;
};
fpd_dma_chan8: dma@fd570000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd570000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 131 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
#stream-id-cells = <1>;
iommus = <&smmu 0x14ef>;
power-domains = <&pd_gdma>;
};
gpu: gpu@fd4b0000 {
status = "disabled";
compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <&gic>;
interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
power-domains = <&pd_gpu>;
};
/* LPDDMA default allows only secured access. inorder to enable
* These dma channels, Users should ensure that these dma
* Channels are allowed for non secure access.
*/
lpd_dma_chan1: dma@ffa80000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 77 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x868>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan2: dma@ffa90000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 78 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x869>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan3: dma@ffaa0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 79 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86a>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan4: dma@ffab0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 80 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86b>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan5: dma@ffac0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 81 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86c>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan6: dma@ffad0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 82 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86d>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan7: dma@ffae0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 83 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86e>; */
power-domains = <&pd_adma>;
};
lpd_dma_chan8: dma@ffaf0000 {
status = "disabled";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 84 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <64>;
#stream-id-cells = <1>;
/* iommus = <&smmu 0x86f>; */
power-domains = <&pd_adma>;
};
mc: memory-controller@fd070000 {
compatible = "xlnx,zynqmp-ddrc-2.40a";
reg = <0x0 0xfd070000 0x0 0x30000>;
interrupt-parent = <&gic>;
interrupts = <0 112 4>;
};
nand0: nand@ff100000 {
compatible = "arasan,nfc-v3p10";
status = "disabled";
reg = <0x0 0xff100000 0x0 0x1000>;
clock-names = "clk_sys", "clk_flash";
interrupt-parent = <&gic>;
interrupts = <0 14 4>;
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x872>;
power-domains = <&pd_nand>;
};
gem0: ethernet@ff0b0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 57 4>, <0 57 4>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x874>;
power-domains = <&pd_eth0>;
};
gem1: ethernet@ff0c0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 59 4>, <0 59 4>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x875>;
power-domains = <&pd_eth1>;
};
gem2: ethernet@ff0d0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 61 4>, <0 61 4>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x876>;
power-domains = <&pd_eth2>;
};
gem3: ethernet@ff0e0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 63 4>, <0 63 4>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x877>;
power-domains = <&pd_eth3>;
};
gpio: gpio@ff0a0000 {
compatible = "xlnx,zynqmp-gpio-1.0";
status = "disabled";
#gpio-cells = <0x2>;
interrupt-parent = <&gic>;
interrupts = <0 16 4>;
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
gpio-controller;
power-domains = <&pd_gpio>;
};
i2c0: i2c@ff020000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 17 4>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_i2c0>;
};
i2c1: i2c@ff030000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 18 4>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_i2c1>;
};
ocm: memory-controller@ff960000 {
compatible = "xlnx,zynqmp-ocmc-1.0";
reg = <0x0 0xff960000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <0 10 4>;
};
perf_monitor_ocm: perf-monitor@ffa00000 {
compatible = "xlnx,axi-perf-monitor";
reg = <0x0 0xffa00000 0x0 0x10000>;
interrupts = <0 25 4>;
interrupt-parent = <&gic>;
xlnx,enable-profile = <0>;
xlnx,enable-trace = <0>;
xlnx,num-monitor-slots = <4>;
xlnx,enable-event-count = <1>;
xlnx,enable-event-log = <1>;
xlnx,have-sampled-metric-cnt = <1>;
xlnx,num-of-counters = <8>;
xlnx,metric-count-width = <32>;
xlnx,metrics-sample-count-width = <32>;
xlnx,global-count-width = <32>;
xlnx,metric-count-scale = <1>;
};
pcie: pcie@fd0e0000 {
compatible = "xlnx,nwl-pcie-2.11";
status = "disabled";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
msi-controller;
device_type = "pci";
interrupt-parent = <&gic>;
interrupts = <0 118 4>,
<0 117 4>,
<0 116 4>,
<0 115 4>, /* MSI_1 [63...32] */
<0 114 4>; /* MSI_0 [31...0] */
interrupt-names = "misc", "dummy", "intx",
"msi1", "msi0";
msi-parent = <&pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
<0x80 0x00000000 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
bus-range = <0x00 0xff>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
power-domains = <&pd_pcie>;
pcie_intc: legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
qspi: spi@ff0f0000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-qspi-1.0";
status = "disabled";
clock-names = "ref_clk", "pclk";
interrupts = <0 15 4>;
interrupt-parent = <&gic>;
num-cs = <1>;
reg = <0x0 0xff0f0000 0x0 0x1000>,
<0x0 0xc0000000 0x0 0x8000000>;
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x873>;
power-domains = <&pd_qspi>;
};
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
status = "disabled";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 26 4>, <0 27 4>;
interrupt-names = "alarm", "sec";
calibration = <0x8000>;
};
serdes: zynqmp_phy@fd400000 {
compatible = "xlnx,zynqmp-psgtr-v1.1";
status = "disabled";
reg = <0x0 0xfd400000 0x0 0x40000>,
<0x0 0xfd3d0000 0x0 0x1000>;
reg-names = "serdes", "siou";
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
resets = <&rst 16>, <&rst 59>, <&rst 60>,
<&rst 61>, <&rst 62>, <&rst 63>,
<&rst 64>, <&rst 3>, <&rst 29>,
<&rst 30>, <&rst 31>, <&rst 32>;
reset-names = "sata_rst", "usb0_crst", "usb1_crst",
"usb0_hibrst", "usb1_hibrst", "usb0_apbrst",
"usb1_apbrst", "dp_rst", "gem0_rst",
"gem1_rst", "gem2_rst", "gem3_rst";
lane0: lane0 {
#phy-cells = <4>;
};
lane1: lane1 {
#phy-cells = <4>;
};
lane2: lane2 {
#phy-cells = <4>;
};
lane3: lane3 {
#phy-cells = <4>;
};
};
sata: ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
status = "disabled";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <&gic>;
interrupts = <0 133 4>;
power-domains = <&pd_sata>;
#stream-id-cells = <4>;
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
<&smmu 0x4c2>, <&smmu 0x4c3>;
};
sdhci0: sdhci@ff160000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 48 4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x870>;
power-domains = <&pd_sd0>;
};
sdhci1: sdhci@ff170000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 49 4>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <1>;
#stream-id-cells = <1>;
iommus = <&smmu 0x871>;
power-domains = <&pd_sd1>;
};
pinctrl0: pinctrl@ff180000 {
compatible = "xlnx,zynqmp-pinctrl";
status = "disabled";
reg = <0x0 0xff180000 0x0 0x1000>;
};
smmu: smmu@fd800000 {
compatible = "arm,mmu-500";
reg = <0x0 0xfd800000 0x0 0x20000>;
#iommu-cells = <1>;
status = "disabled";
#global-interrupts = <1>;
interrupt-parent = <&gic>;
interrupts = <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
};
spi0: spi@ff040000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 19 4>;
reg = <0x0 0xff040000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_spi0>;
};
spi1: spi@ff050000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 20 4>;
reg = <0x0 0xff050000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_spi1>;
};
ttc0: timer@ff110000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc0>;
};
ttc1: timer@ff120000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc1>;
};
ttc2: timer@ff130000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc2>;
};
ttc3: timer@ff140000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <32>;
power-domains = <&pd_ttc3>;
};
uart0: serial@ff000000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 21 4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&pd_uart0>;
};
uart1: serial@ff010000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 22 4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <&pd_uart1>;
};
usb0: usb0@ff9d0000 {
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <&pd_usb0>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
dwc3_0: dwc3@fe200000 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
#stream-id-cells = <1>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
/* snps,enable-hibernation; */
};
};
usb1: usb1@ff9e0000 {
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <&pd_usb1>;
ranges;
nvmem-cells = <&soc_revision>;
nvmem-cell-names = "soc_revision";
dwc3_1: dwc3@fe300000 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <0 70 4>, <0 74 4>, <0 76 4>;
#stream-id-cells = <1>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
};
};
watchdog0: watchdog@fd4d0000 {
compatible = "cdns,wdt-r1p2";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 113 1>;
reg = <0x0 0xfd4d0000 0x0 0x1000>;
timeout-sec = <10>;
};
xilinx_ams: ams@ffa50000 {
compatible = "xlnx,zynqmp-ams";
status = "disabled";
interrupt-parent = <&gic>;
interrupts = <0 56 4>;
interrupt-names = "ams-irq";
reg = <0x0 0xffa50000 0x0 0x800>;
reg-names = "ams-base";
#address-cells = <2>;
#size-cells = <2>;
#io-channel-cells = <1>;
ranges;
ams_ps: ams_ps@ffa50800 {
compatible = "xlnx,zynqmp-ams-ps";
status = "disabled";
reg = <0x0 0xffa50800 0x0 0x400>;
};
ams_pl: ams_pl@ffa50c00 {
compatible = "xlnx,zynqmp-ams-pl";
status = "disabled";
reg = <0x0 0xffa50c00 0x0 0x400>;
};
};
xlnx_dpdma: dma@fd4c0000 {
compatible = "xlnx,dpdma";
status = "disabled";
reg = <0x0 0xfd4c0000 0x0 0x1000>;
interrupts = <0 122 4>;
interrupt-parent = <&gic>;
clock-names = "axi_clk";
power-domains = <&pd_dp>;
dma-channels = <6>;
#dma-cells = <1>;
dma-video0channel {
compatible = "xlnx,video0";
};
dma-video1channel {
compatible = "xlnx,video1";
};
dma-video2channel {
compatible = "xlnx,video2";
};
dma-graphicschannel {
compatible = "xlnx,graphics";
};
dma-audio0channel {
compatible = "xlnx,audio0";
};
dma-audio1channel {
compatible = "xlnx,audio1";
};
};
zynqmp_dpsub: zynqmp-display@fd4a0000 {
compatible = "xlnx,zynqmp-dpsub-1.7";
status = "disabled";
reg = <0x0 0xfd4a0000 0x0 0x1000>,
<0x0 0xfd4aa000 0x0 0x1000>,
<0x0 0xfd4ab000 0x0 0x1000>,
<0x0 0xfd4ac000 0x0 0x1000>;
reg-names = "dp", "blend", "av_buf", "aud";
interrupts = <0 119 4>;
interrupt-parent = <&gic>;
clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
power-domains = <&pd_dp>;
vid-layer {
dma-names = "vid0", "vid1", "vid2";
dmas = <&xlnx_dpdma 0>,
<&xlnx_dpdma 1>,
<&xlnx_dpdma 2>;
};
gfx-layer {
dma-names = "gfx0";
dmas = <&xlnx_dpdma 3>;
};
/* dummy node to to indicate there's no child i2c device */
i2c-bus {
};
zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 {
compatible = "xlnx,dp-snd-codec";
clock-names = "aud_clk";
};
zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 {
compatible = "xlnx,dp-snd-pcm";
dmas = <&xlnx_dpdma 4>;
dma-names = "tx";
};
zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 {
compatible = "xlnx,dp-snd-pcm";
dmas = <&xlnx_dpdma 5>;
dma-names = "tx";
};
zynqmp_dp_snd_card0: zynqmp_dp_snd_card {
compatible = "xlnx,dp-snd-card";
xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>,
<&zynqmp_dp_snd_pcm1>;
xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>;
};
};
};
};
[-- Attachment #11: zynqmp-qemu-arm.dts.txt --]
[-- Type: text/plain, Size: 75645 bytes --]
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x1>;
model = "ZynqMP ZCU102 RevA";
compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
ddr_bank1_1: ddr_bank1_1@0x0 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x30000>;
};
ddr_bank1_2: ddr_bank1_2@0x30000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x30000 0x10000>;
linux,phandle = <0x65>;
phandle = <0x65>;
};
ddr_bank1_3: ddr_bank1_3@0x40000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x40000 0x3ffc0000>;
};
ddr_bank2: ddr_bank2@0x40000000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x0 0x40000000 0x40000000>;
};
ddr_bank3: ddr_bank3@0x800000000 {
compatible = "qemu:memory-region-spec";
container = <0x1>;
qemu,ram = <0x1>;
reg = <0x8 0x0 0x8 0x0>;
};
amba: amba@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
interrupt-map-mask = <0x0 0x0 0xffff>;
interrupt-map = <0x0 0x0 0x8 0x2 0x0 0x8 0x4 0x0 0x0 0x9 0x2 0x0 0x9 0x4 0x0 0x0 0xa 0x2 0x0 0xa 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xb 0x2 0x0 0xb 0x4 0x0 0x0 0xc 0x2 0x0 0xc 0x4 0x0 0x0 0xd 0x2 0x0 0xd 0x4 0x0 0x0 0xe 0x2 0x0 0xe 0x4 0x0 0x0 0xf 0x2 0x0 0xf 0x4 0x0 0x0 0x10 0x2 0x0 0x10 0x4 0x0 0x0 0x11 0x2 0x0 0x11 0x4 0x0 0x0 0x12 0x2 0x0 0x12 0x4 0x0 0x0 0x13 0x2 0x0 0x13 0x4 0x0 0x0 0x14 0x2 0x0 0x14 0x4 0x0 0x0 0x15 0x2 0x0 0x15 0x4 0x0 0x0 0x16 0x2 0x0 0x16 0x4 0x0 0x0 0x17 0x2 0x0 0x17 0x4 0x0 0x0 0x18 0x2 0x0 0x18 0x4 0x0 0x0 0x19 0x2 0x0 0x19 0x4 0x0 0x0 0x19 0x2 0x0 0x19 0x4 0x0 0x0 0x1a 0x2 0x0 0x1a 0x4 0x0 0x0 0x1b 0x2 0x0 0x1b 0x4 0x0 0x0 0x1c 0x2 0x0 0x1c 0x4 0x0 0x0 0x1d 0x2 0x0 0x1d 0x4 0x0 0x0 0x1e 0x2 0x0 0x1e 0x4 0x0 0x0 0x1f 0x2 0x0 0x1f 0x4 0x0 0x0 0x20 0x2 0x0 0x20 0x4 0x0 0x0 0x21 0x2 0x0 0x21 0x4 0x0 0x0 0x22 0x2 0x0 0x22 0x4 0x0 0x0 0x23 0x2 0x0 0x23 0x4 0x0 0x0 0x24 0x2 0x0 0x24 0x4 0x0 0x0 0x25 0x2 0x0 0x25 0x4 0x0 0x0 0x26 0x2 0x0 0x26 0x4 0x0 0x0 0x27 0x2 0x0 0x27 0x4 0x0 0x0 0x28 0x2 0x0 0x28 0x4 0x0 0x0 0x29 0x2 0x0 0x29 0x4 0x0 0x0 0x2a 0x2 0x0 0x2a 0x4 0x0 0x0 0x2b 0x2 0x0 0x2b 0x4 0x0 0x0 0x2c 0x2 0x0 0x2c 0x4 0x0 0x0 0x2d 0x2 0x0 0x2d 0x4 0x0 0x0 0x2e 0x2 0x0 0x2e 0x4 0x0 0x0 0x2f 0x2 0x0 0x2f 0x4 0x0 0x0 0x30 0x2 0x0 0x30 0x4 0x0 0x0 0x31 0x2 0x0 0x31 0x4 0x0 0x0 0x32 0x2 0x0 0x32 0x4 0x0 0x0 0x33 0x2 0x0 0x33 0x4 0x0 0x0 0x34 0x2 0x0 0x34 0x4 0x0 0x0 0x35 0x2 0x0 0x35 0x4 0x0 0x0 0x36 0x2 0x0 0x36 0x4 0x0 0x0 0x37 0x2 0x0 0x37 0x4 0x0 0x0 0x38 0x2 0x0 0x38 0x4 0x0 0x0 0x39 0x2 0x0 0x39 0x4 0x0 0x0 0x3a 0x2 0x0 0x3a 0x4 0x0 0x0 0x3b 0x2 0x0 0x3b 0x4 0x0 0x0 0x3c 0x2 0x0 0x3c 0x4 0x0 0x0 0x3d 0x2 0x0 0x3d 0x4 0x0 0x0 0x3e 0x2 0x0 0x3e 0x4 0x0 0x0 0x3f 0x2 0x0 0x3f 0x4 0x0 0x0 0x40 0x2 0x0 0x40 0x4 0x0 0x0 0x41 0x2 0x0 0x41 0x4 0x0 0x0 0x42 0x2 0x0 0x42 0x4 0x0 0x0 0x43 0x2 0x0 0x43 0x4 0x0 0x0 0x44 0x2 0x0 0x44 0x4 0x0 0x0 0x45 0x2 0x0 0x45 0x4 0x0 0x0 0x46 0x2 0x0 0x46 0x4 0x0 0x0 0x47 0x2 0x0 0x47 0x4 0x0 0x0 0x48 0x2 0x0 0x48 0x4 0x0 0x0 0x49 0x2 0x0 0x49 0x4 0x0 0x0 0x4a 0x2 0x0 0x4a 0x4 0x0 0x0 0x4b 0x2 0x0 0x4b 0x4 0x0 0x0 0x4c 0x2 0x0 0x4c 0x4 0x0 0x0 0x4d 0x2 0x0 0x4d 0x4 0x0 0x0 0x4e 0x2 0x0 0x4e 0x4 0x0 0x0 0x4f 0x2 0x0 0x4f 0x4 0x0 0x0 0x50 0x2 0x0 0x50 0x4 0x0 0x0 0x51 0x2 0x0 0x51 0x4 0x0 0x0 0x52 0x2 0x0 0x52 0x4 0x0 0x0 0x53 0x2 0x0 0x53 0x4 0x0 0x0 0x54 0x2 0x0 0x54 0x4 0x0 0x0 0x55 0x2 0x0 0x55 0x4 0x0 0x0 0x56 0x2 0x0 0x56 0x4 0x0 0x0 0x57 0x2 0x0 0x57 0x4 0x0 0x0 0x58 0x2 0x0 0x58 0x4 0x0 0x0 0x58 0x2 0x0 0x58 0x4 0x0 0x0 0x59 0x2 0x0 0x59 0x4 0x0 0x0 0x5a 0x2 0x0 0x5a 0x4 0x0 0x0 0x5b 0x2 0x0 0x5b 0x4 0x0 0x0 0x5c 0x2 0x0 0x5c 0x4 0x0 0x0 0x5d 0x2 0x0 0x5d 0x4 0x0 0x0 0x5e 0x2 0x0 0x5e 0x4 0x0 0x0 0x5f 0x2 0x0 0x5f 0x4 0x0 0x0 0x60 0x2 0x0 0x60 0x4 0x0 0x0 0x68 0x2 0x0 0x68 0x4 0x0 0x0 0x69 0x2 0x0 0x69 0x4 0x0 0x0 0x6a 0x2 0x0 0x6a 0x4 0x0 0x0 0x6b 0x2 0x0 0x6b 0x4 0x0 0x0 0x6c 0x2 0x0 0x6c 0x4 0x0 0x0 0x6d 0x2 0x0 0x6d 0x4 0x0 0x0 0x6e 0x2 0x0 0x6e 0x4 0x0 0x0 0x6f 0x2 0x0 0x6f 0x4 0x0 0x0 0x70 0x2 0x0 0x70 0x4 0x0 0x0 0x71 0x2 0x0 0x71 0x4 0x0 0x0 0x72 0x2 0x0 0x72 0x4 0x0 0x0 0x73 0x2 0x0 0x73 0x4 0x0 0x0 0x74 0x2 0x0 0x74 0x4 0x0 0x0 0x75 0x2 0x0 0x75 0x4 0x0 0x0 0x76 0x2 0x0 0x76 0x4 0x0 0x0 0x77 0x2 0x0 0x77 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x78 0x2 0x0 0x78 0x4 0x0 0x0 0x79 0x2 0x0 0x79 0x4 0x0 0x0 0x7a 0x2 0x0 0x7a 0x4 0x0 0x0 0x7b 0x2 0x0 0x7b 0x4 0x0 0x0 0x7b 0x2 0x0 0x7b 0x4 0x0 0x0 0x7c 0x2 0x0 0x7c 0x4 0x0 0x0 0x7d 0x2 0x0 0x7d 0x4 0x0 0x0 0x7e 0x2 0x0 0x7e 0x4 0x0 0x0 0x7f 0x2 0x0 0x7f 0x4 0x0 0x0 0x80 0x2 0x0 0x80 0x4 0x0 0x0 0x81 0x2 0x0 0x81 0x4 0x0 0x0 0x82 0x2 0x0 0x82 0x4 0x0 0x0 0x83 0x2 0x0 0x83 0x4 0x0 0x0 0x84 0x2 0x0 0x84 0x4 0x0 0x0 0x85 0x2 0x0 0x85 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x86 0x2 0x0 0x86 0x4 0x0 0x0 0x87 0x2 0x0 0x87 0x4 0x0 0x0 0x88 0x2 0x0 0x88 0x4 0x0 0x0 0x89 0x2 0x0 0x89 0x4 0x0 0x0 0x8a 0x2 0x0 0x8a 0x4 0x0 0x0 0x8b 0x2 0x0 0x8b 0x4 0x0 0x0 0x8c 0x2 0x0 0x8c 0x4 0x0 0x0 0x8d 0x2 0x0 0x8d 0x4 0x0 0x0 0x8e 0x2 0x0 0x8e 0x4 0x0 0x0 0x8f 0x2 0x0 0x8f 0x4 0x0 0x0 0x90 0x2 0x0 0x90 0x4 0x0 0x0 0x91 0x2 0x0 0x91 0x4 0x0 0x0 0x92 0x2 0x0 0x92 0x4 0x0 0x0 0x93 0x2 0x0 0x93 0x4 0x0 0x0 0x94 0x2 0x0 0x94 0x4 0x0 0x0 0x95 0x2 0x0 0x95 0x4 0x0 0x0 0x96 0x2 0x0 0x96 0x4 0x0 0x0 0x97 0x2 0x0 0x97 0x4 0x0 0x0 0x98 0x2 0x0 0x98 0x4 0x0 0x0 0x99 0x2 0x0 0x99 0x4 0x0 0x0 0x9a 0x2 0x0 0x9a 0x4 0x0 0x0 0x9b 0x2 0x0 0x9b 0x4 0x0 0x0 0x8 0x3 0x0 0x8 0x4 0x0 0x0 0x9 0x3 0x0 0x9 0x4 0x0 0x0 0xa 0x3 0x0 0xa 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xb 0x3 0x0 0xb 0x4 0x0 0x0 0xc 0x3 0x0 0xc 0x4 0x0 0x0 0xd 0x3 0x0 0xd 0x4 0x0 0x0 0xe 0x3 0x0 0xe 0x4 0x0 0x0 0xf 0x3 0x0 0xf 0x4 0x0 0x0 0x10 0x3 0x0 0x10 0x4 0x0 0x0 0x11 0x3 0x0 0x11 0x4 0x0 0x0 0x12 0x3 0x0 0x12 0x4 0x0 0x0 0x13 0x3 0x0 0x13 0x4 0x0 0x0 0x14 0x3 0x0 0x14 0x4 0x0 0x0 0x15 0x3 0x0 0x15 0x4 0x0 0x0 0x16 0x3 0x0 0x16 0x4 0x0 0x0 0x17 0x3 0x0 0x17 0x4 0x0 0x0 0x18 0x3 0x0 0x18 0x4 0x0 0x0 0x19 0x3 0x0 0x19 0x4 0x0 0x0 0x19 0x3 0x0 0x19 0x4 0x0 0x0 0x1a 0x3 0x0 0x1a 0x4 0x0 0x0 0x1b 0x3 0x0 0x1b 0x4 0x0 0x0 0x1c 0x3 0x0 0x1c 0x4 0x0 0x0 0x1d 0x3 0x0 0x1d 0x4 0x0 0x0 0x1e 0x3 0x0 0x1e 0x4 0x0 0x0 0x1f 0x3 0x0 0x1f 0x4 0x0 0x0 0x20 0x3 0x0 0x20 0x4 0x0 0x0 0x21 0x3 0x0 0x21 0x4 0x0 0x0 0x22 0x3 0x0 0x22 0x4 0x0 0x0 0x23 0x3 0x0 0x23 0x4 0x0 0x0 0x24 0x3 0x0 0x24 0x4 0x0 0x0 0x25 0x3 0x0 0x25 0x4 0x0 0x0 0x26 0x3 0x0 0x26 0x4 0x0 0x0 0x27 0x3 0x0 0x27 0x4 0x0 0x0 0x28 0x3 0x0 0x28 0x4 0x0 0x0 0x29 0x3 0x0 0x29 0x4 0x0 0x0 0x2a 0x3 0x0 0x2a 0x4 0x0 0x0 0x2b 0x3 0x0 0x2b 0x4 0x0 0x0 0x2c 0x3 0x0 0x2c 0x4 0x0 0x0 0x2d 0x3 0x0 0x2d 0x4 0x0 0x0 0x2e 0x3 0x0 0x2e 0x4 0x0 0x0 0x2f 0x3 0x0 0x2f 0x4 0x0 0x0 0x30 0x3 0x0 0x30 0x4 0x0 0x0 0x31 0x3 0x0 0x31 0x4 0x0 0x0 0x32 0x3 0x0 0x32 0x4 0x0 0x0 0x33 0x3 0x0 0x33 0x4 0x0 0x0 0x34 0x3 0x0 0x34 0x4 0x0 0x0 0x35 0x3 0x0 0x35 0x4 0x0 0x0 0x36 0x3 0x0 0x36 0x4 0x0 0x0 0x37 0x3 0x0 0x37 0x4 0x0 0x0 0x38 0x3 0x0 0x38 0x4 0x0 0x0 0x39 0x3 0x0 0x39 0x4 0x0 0x0 0x3a 0x3 0x0 0x3a 0x4 0x0 0x0 0x3b 0x3 0x0 0x3b 0x4 0x0 0x0 0x3c 0x3 0x0 0x3c 0x4 0x0 0x0 0x3d 0x3 0x0 0x3d 0x4 0x0 0x0 0x3e 0x3 0x0 0x3e 0x4 0x0 0x0 0x3f 0x3 0x0 0x3f 0x4 0x0 0x0 0x40 0x3 0x0 0x40 0x4 0x0 0x0 0x41 0x3 0x0 0x41 0x4 0x0 0x0 0x42 0x3 0x0 0x42 0x4 0x0 0x0 0x43 0x3 0x0 0x43 0x4 0x0 0x0 0x44 0x3 0x0 0x44 0x4 0x0 0x0 0x45 0x3 0x0 0x45 0x4 0x0 0x0 0x46 0x3 0x0 0x46 0x4 0x0 0x0 0x47 0x3 0x0 0x47 0x4 0x0 0x0 0x48 0x3 0x0 0x48 0x4 0x0 0x0 0x49 0x3 0x0 0x49 0x4 0x0 0x0 0x4a 0x3 0x0 0x4a 0x4 0x0 0x0 0x4b 0x3 0x0 0x4b 0x4 0x0 0x0 0x4c 0x3 0x0 0x4c 0x4 0x0 0x0 0x4d 0x3 0x0 0x4d 0x4 0x0 0x0 0x4e 0x3 0x0 0x4e 0x4 0x0 0x0 0x4f 0x3 0x0 0x4f 0x4 0x0 0x0 0x50 0x3 0x0 0x50 0x4 0x0 0x0 0x51 0x3 0x0 0x51 0x4 0x0 0x0 0x52 0x3 0x0 0x52 0x4 0x0 0x0 0x53 0x3 0x0 0x53 0x4 0x0 0x0 0x54 0x3 0x0 0x54 0x4 0x0 0x0 0x55 0x3 0x0 0x55 0x4 0x0 0x0 0x56 0x3 0x0 0x56 0x4 0x0 0x0 0x57 0x3 0x0 0x57 0x4 0x0 0x0 0x58 0x3 0x0 0x58 0x4 0x0 0x0 0x58 0x3 0x0 0x58 0x4 0x0 0x0 0x59 0x3 0x0 0x59 0x4 0x0 0x0 0x5a 0x3 0x0 0x5a 0x4 0x0 0x0 0x5b 0x3 0x0 0x5b 0x4 0x0 0x0 0x5c 0x3 0x0 0x5c 0x4 0x0 0x0 0x5d 0x3 0x0 0x5d 0x4 0x0 0x0 0x5e 0x3 0x0 0x5e 0x4 0x0 0x0 0x5f 0x3 0x0 0x5f 0x4 0x0 0x0 0x60 0x3 0x0 0x60 0x4 0x0 0x0 0x68 0x3 0x0 0x68 0x4 0x0 0x0 0x69 0x3 0x0 0x69 0x4 0x0 0x0 0x6a 0x3 0x0 0x6a 0x4 0x0 0x0 0x6b 0x3 0x0 0x6b 0x4 0x0 0x0 0x6c 0x3 0x0 0x6c 0x4 0x0 0x0 0x6d 0x3 0x0 0x6d 0x4 0x0 0x0 0x6e 0x3 0x0 0x6e 0x4 0x0 0x0 0x6f 0x3 0x0 0x6f 0x4 0x0 0x0 0x70 0x3 0x0 0x70 0x4 0x0 0x0 0x71 0x3 0x0 0x71 0x4 0x0 0x0 0x72 0x3 0x0 0x72 0x4 0x0 0x0 0x73 0x3 0x0 0x73 0x4 0x0 0x0 0x74 0x3 0x0 0x74 0x4 0x0 0x0 0x75 0x3 0x0 0x75 0x4 0x0 0x0 0x76 0x3 0x0 0x76 0x4 0x0 0x0 0x77 0x3 0x0 0x77 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x78 0x3 0x0 0x78 0x4 0x0 0x0 0x79 0x3 0x0 0x79 0x4 0x0 0x0 0x7a 0x3 0x0 0x7a 0x4 0x0 0x0 0x7b 0x3 0x0 0x7b 0x4 0x0 0x0 0x7b 0x3 0x0 0x7b 0x4 0x0 0x0 0x7c 0x3 0x0 0x7c 0x4 0x0 0x0 0x7d 0x3 0x0 0x7d 0x4 0x0 0x0 0x7e 0x3 0x0 0x7e 0x4 0x0 0x0 0x7f 0x3 0x0 0x7f 0x4 0x0 0x0 0x80 0x3 0x0 0x80 0x4 0x0 0x0 0x81 0x3 0x0 0x81 0x4 0x0 0x0 0x82 0x3 0x0 0x82 0x4 0x0 0x0 0x83 0x3 0x0 0x83 0x4 0x0 0x0 0x84 0x3 0x0 0x84 0x4 0x0 0x0 0x85 0x3 0x0 0x85 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x86 0x3 0x0 0x86 0x4 0x0 0x0 0x87 0x3 0x0 0x87 0x4 0x0 0x0 0x88 0x3 0x0 0x88 0x4 0x0 0x0 0x89 0x3 0x0 0x89 0x4 0x0 0x0 0x8a 0x3 0x0 0x8a 0x4 0x0 0x0 0x8b 0x3 0x0 0x8b 0x4 0x0 0x0 0x8c 0x3 0x0 0x8c 0x4 0x0 0x0 0x8d 0x3 0x0 0x8d 0x4 0x0 0x0 0x8e 0x3 0x0 0x8e 0x4 0x0 0x0 0x8f 0x3 0x0 0x8f 0x4 0x0 0x0 0x90 0x3 0x0 0x90 0x4 0x0 0x0 0x91 0x3 0x0 0x91 0x4 0x0 0x0 0x92 0x3 0x0 0x92 0x4 0x0 0x0 0x93 0x3 0x0 0x93 0x4 0x0 0x0 0x94 0x3 0x0 0x94 0x4 0x0 0x0 0x95 0x3 0x0 0x95 0x4 0x0 0x0 0x96 0x3 0x0 0x96 0x4 0x0 0x0 0x97 0x3 0x0 0x97 0x4 0x0 0x0 0x98 0x3 0x0 0x98 0x4 0x0 0x0 0x99 0x3 0x0 0x99 0x4 0x0 0x0 0x9a 0x3 0x0 0x9a 0x4 0x0 0x0 0x9b 0x3 0x0 0x9b 0x4>;
#address-cells = <0x2>;
#size-cells = <0x1>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
apu: apu@0xFD5C0000 {
compatible = "xlnx,apu";
#gpio-cells = <0x1>;
reg = <0x0 0xfd5c0000 0x1000>;
cpu0 = <0x4>;
cpu1 = <0x5>;
cpu2 = <0x6>;
cpu3 = <0x7>;
};
rpu_ctrl: rpu_control@0xFF9A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,rpu-control";
reg = <0x0 0xff9a0000 0x400>;
gpio-controller;
atcm1-for-rpu0 = <0x8>;
btcm1-for-rpu0 = <0x9>;
icache-for-rpu1 = <0xa>;
dcache-for-rpu1 = <0xb>;
gic-for-rpu = <0x3>;
gpios = <0xc 0x6 0xc 0x7>;
ddr-mem-for-rpu = <0xd>;
linux,phandle = <0x5d>;
phandle = <0x5d>;
};
apu_ipi: apu_ipi@0xFF300000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x23 0x4 0x0 0x0 0x0 0x3 0x0 0x23 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff300000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x0 0x0 0xf 0x0 0x0 0x10 0x0 0x0 0x11 0x0 0x0 0x12 0x0 0x0 0x13 0x0 0x0 0x14 0x0 0x0 0x15 0x0 0x0 0x16 0x0 0x0 0x17 0x0 0x0 0x18 0x0 0x0>;
gpios = <0xe 0x20 0x0 0xf 0x20 0x0 0x10 0x20 0x0 0x11 0x20 0x0 0x12 0x20 0x0 0x13 0x20 0x0 0x14 0x20 0x0 0x15 0x20 0x0 0x16 0x20 0x0 0x17 0x20 0x0 0x18 0x20 0x0>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
rpu_0_ipi: rpu_0_ipi@0xFF310000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x21 0x4 0x0 0x0 0x0 0x3 0x0 0x21 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff310000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x8 0x0 0xf 0x8 0x0 0x10 0x8 0x0 0x11 0x8 0x0 0x12 0x8 0x0 0x13 0x8 0x0 0x14 0x8 0x0 0x15 0x8 0x0 0x16 0x8 0x0 0x17 0x8 0x0 0x18 0x8 0x0>;
gpios = <0xe 0x28 0x0 0xf 0x28 0x0 0x10 0x28 0x0 0x11 0x28 0x0 0x12 0x28 0x0 0x13 0x28 0x0 0x14 0x28 0x0 0x15 0x28 0x0 0x16 0x28 0x0 0x17 0x28 0x0 0x18 0x28 0x0>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
rpu_1_ipi: rpu_1_ipi@0xFF320000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x22 0x4 0x0 0x0 0x0 0x3 0x0 0x22 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff320000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x9 0x0 0xf 0x9 0x0 0x10 0x9 0x0 0x11 0x9 0x0 0x12 0x9 0x0 0x13 0x9 0x0 0x14 0x9 0x0 0x15 0x9 0x0 0x16 0x9 0x0 0x17 0x9 0x0 0x18 0x9 0x0>;
gpios = <0xe 0x29 0x0 0xf 0x29 0x0 0x10 0x29 0x0 0x11 0x29 0x0 0x12 0x29 0x0 0x13 0x29 0x0 0x14 0x29 0x0 0x15 0x29 0x0 0x16 0x29 0x0 0x17 0x29 0x0 0x18 0x29 0x0>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
pmu_0_ipi: pmu_0_ipi@0xFF330000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x13 0x0>;
reg = <0x0 0xff330000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x10 0x0 0xf 0x10 0x0 0x10 0x10 0x0 0x11 0x10 0x0 0x12 0x10 0x0 0x13 0x10 0x0 0x14 0x10 0x0 0x15 0x10 0x0 0x16 0x10 0x0 0x17 0x10 0x0 0x18 0x10 0x0>;
gpios = <0xe 0x30 0x0 0xf 0x30 0x0 0x10 0x30 0x0 0x11 0x30 0x0 0x12 0x30 0x0 0x13 0x30 0x0 0x14 0x30 0x0 0x15 0x30 0x0 0x16 0x30 0x0 0x17 0x30 0x0 0x18 0x30 0x0>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
pmu_1_ipi: pmu_1_ipi@0xFF331000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x14 0x0>;
reg = <0x0 0xff331000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x11 0x0 0xf 0x11 0x0 0x10 0x11 0x0 0x11 0x11 0x0 0x12 0x11 0x0 0x13 0x11 0x0 0x14 0x11 0x0 0x15 0x11 0x0 0x16 0x11 0x0 0x17 0x11 0x0 0x18 0x11 0x0>;
gpios = <0xe 0x31 0x0 0xf 0x31 0x0 0x10 0x31 0x0 0x11 0x31 0x0 0x12 0x31 0x0 0x13 0x31 0x0 0x14 0x31 0x0 0x15 0x31 0x0 0x16 0x31 0x0 0x17 0x31 0x0 0x18 0x31 0x0>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
pmu_2_ipi: pmu_2_ipi@0xFF332000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x15 0x0>;
reg = <0x0 0xff332000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x12 0x0 0xf 0x12 0x0 0x10 0x12 0x0 0x11 0x12 0x0 0x12 0x12 0x0 0x13 0x12 0x0 0x14 0x12 0x0 0x15 0x12 0x0 0x16 0x12 0x0 0x17 0x12 0x0 0x18 0x12 0x0>;
gpios = <0xe 0x32 0x0 0xf 0x32 0x0 0x10 0x32 0x0 0x11 0x32 0x0 0x12 0x32 0x0 0x13 0x32 0x0 0x14 0x32 0x0 0x15 0x32 0x0 0x16 0x32 0x0 0x17 0x32 0x0 0x18 0x32 0x0>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
pmu_3_ipi: pmu_3_ipi@0xFF333000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x19>;
interrupts = <0x16 0x0>;
reg = <0x0 0xff333000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x13 0x0 0xf 0x13 0x0 0x10 0x13 0x0 0x11 0x13 0x0 0x12 0x13 0x0 0x13 0x13 0x0 0x14 0x13 0x0 0x15 0x13 0x0 0x16 0x13 0x0 0x17 0x13 0x0 0x18 0x13 0x0>;
gpios = <0xe 0x33 0x0 0xf 0x33 0x0 0x10 0x33 0x0 0x11 0x33 0x0 0x12 0x33 0x0 0x13 0x33 0x0 0x14 0x33 0x0 0x15 0x33 0x0 0x16 0x33 0x0 0x17 0x33 0x0 0x18 0x33 0x0>;
linux,phandle = <0x14>;
phandle = <0x14>;
};
pl_0_ipi: pl_0_ipi@0xFF340000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1d 0x4 0x0 0x0 0x0 0x3 0x0 0x1d 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff340000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x18 0x0 0xf 0x18 0x0 0x10 0x18 0x0 0x11 0x18 0x0 0x12 0x18 0x0 0x13 0x18 0x0 0x14 0x18 0x0 0x15 0x18 0x0 0x16 0x18 0x0 0x17 0x18 0x0 0x18 0x18 0x0>;
gpios = <0xe 0x34 0x0 0xf 0x34 0x0 0x10 0x34 0x0 0x11 0x34 0x0 0x12 0x34 0x0 0x13 0x34 0x0 0x14 0x34 0x0 0x15 0x34 0x0 0x16 0x34 0x0 0x17 0x34 0x0 0x18 0x34 0x0>;
linux,phandle = <0x15>;
phandle = <0x15>;
};
pl_1_ipi: pl_1_ipi@0xFF350000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1e 0x4 0x0 0x0 0x0 0x3 0x0 0x1e 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff350000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x19 0x0 0xf 0x19 0x0 0x10 0x19 0x0 0x11 0x19 0x0 0x12 0x19 0x0 0x13 0x19 0x0 0x14 0x19 0x0 0x15 0x19 0x0 0x16 0x19 0x0 0x17 0x19 0x0 0x18 0x19 0x0>;
gpios = <0xe 0x35 0x0 0xf 0x35 0x0 0x10 0x35 0x0 0x11 0x35 0x0 0x12 0x35 0x0 0x13 0x35 0x0 0x14 0x35 0x0 0x15 0x35 0x0 0x16 0x35 0x0 0x17 0x35 0x0 0x18 0x35 0x0>;
linux,phandle = <0x16>;
phandle = <0x16>;
};
pl_2_ipi: pl_2_ipi@0xFF360000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x1f 0x4 0x0 0x0 0x0 0x3 0x0 0x1f 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff360000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x1a 0x0 0xf 0x1a 0x0 0x10 0x1a 0x0 0x11 0x1a 0x0 0x12 0x1a 0x0 0x13 0x1a 0x0 0x14 0x1a 0x0 0x15 0x1a 0x0 0x16 0x1a 0x0 0x17 0x1a 0x0 0x18 0x1a 0x0>;
gpios = <0xe 0x36 0x0 0xf 0x36 0x0 0x10 0x36 0x0 0x11 0x36 0x0 0x12 0x36 0x0 0x13 0x36 0x0 0x14 0x36 0x0 0x15 0x36 0x0 0x16 0x36 0x0 0x17 0x36 0x0 0x18 0x36 0x0>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
pl_3_ipi: pl_3_ipi@0xFF370000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x2 0x0 0x20 0x4 0x0 0x0 0x0 0x3 0x0 0x20 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff370000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0xe 0x1b 0x0 0xf 0x1b 0x0 0x10 0x1b 0x0 0x11 0x1b 0x0 0x12 0x1b 0x0 0x13 0x1b 0x0 0x14 0x1b 0x0 0x15 0x1b 0x0 0x16 0x1b 0x0 0x17 0x1b 0x0 0x18 0x1b 0x0>;
gpios = <0xe 0x37 0x0 0xf 0x37 0x0 0x10 0x37 0x0 0x11 0x37 0x0 0x12 0x37 0x0 0x13 0x37 0x0 0x14 0x37 0x0 0x15 0x37 0x0 0x16 0x37 0x0 0x17 0x37 0x0 0x18 0x37 0x0>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
xlnx_zynqmp_csu_core: csu_core {
compatible = "xlnx,zynqmp-csu-core";
reg = <0x0 0xffca0000 0x100>;
};
lpd_slcr_0: zynqmp_lpd_slcr@0xFF410000 {
compatible = "xlnx,lpd-slcr";
reg = <0x0 0xff410000 0x9000>;
gic-for-rpu = <0x3>;
gic-for-apu = <0x2>;
};
lpd_slcr_secure: zynqmp_lpd_slcr_secure@0xFF4B0000 {
compatible = "xlnx.lpd-slcr-secure";
reg = <0x0 0xff4b0000 0x38>;
};
xppu: xppu@0 {
compatible = "xlnx,xppu";
reg-extended = <0x1a 0x0 0xff980000 0x10000 0x1b 0x0 0xff990000 0x0 0x1000 0x3 0x1b 0x0 0xff000000 0x0 0xfc0000 0x2 0x1b 0x0 0xfe000000 0x0 0x1000000 0x2 0x1b 0x0 0xc0000000 0x0 0x20000000 0x2>;
mr = <0x1a>;
interrupts = <0x58>;
};
smmu0: smmu0@0xFD800000 {
compatible = "arm,mmu-500";
reg-extended = <0x1a 0x0 0xfd800000 0x10000 0x1c 0x0 0x0 0xffffffff 0xffffffff 0x1d 0x0 0x0 0xffffffff 0xffffffff 0x1e 0x0 0x0 0xffffffff 0xffffffff 0x1f 0x0 0x0 0xffffffff 0xffffffff 0x20 0x0 0x0 0xffffffff 0xffffffff 0x21 0x0 0x0 0xffffffff 0xffffffff>;
interrupt-parent = <0x22>;
interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11>;
dma = <0x23>;
mr-0 = <0x23>;
mr-1 = <0x23>;
mr-2 = <0x23>;
mr-3 = <0x24>;
mr-4 = <0x25>;
mr-5 = <0x26>;
};
smmu_reg: smmu0@0xFD5F0000 {
compatible = "xlnx,smmu-reg";
reg = <0x0 0xfd5f0000 0x1000>;
interrupt-controller;
interrupts = <0x9b>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
cci_mem1: cci_mem1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x27>;
phandle = <0x27>;
};
cci_mem2: cci_mem2@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x28>;
phandle = <0x28>;
};
cci: cci@0xFD6E0000 {
compatible = "arm,cci-400";
gpio-controller;
#gpio-cells = <0x1>;
reg-extended = <0x1a 0x0 0xfd6e0000 0xf000 0x23 0x0 0x0 0xffffffff 0xffffffff 0x2>;
M0 = <0x1b>;
M1 = <0x27>;
M2 = <0x28>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
ocm_xmpu: ocm_xmpu@0xFFA70000 {
compatible = "xlnx,xmpu";
interrupts = <0x58>;
reg-extended = <0x1a 0x0 0xffa70000 0x1000 0x1a 0x0 0xfffc0000 0x40000>;
protected-mr = <0x29>;
mr-0 = <0x1a>;
protected-base = <0xfffc0000>;
};
ddr_xmpu0: ddr_xmpu0_@_DDR_XMPU0_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd000000 0x1000 0x2a 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2a>;
};
ddr_xmpu1: ddr_xmpu1_@_DDR_XMPU1_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd010000 0x1000 0x27 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x27>;
gpios = <0x2b 0x0>;
};
ddr_xmpu2: ddr_xmpu2_@_DDR_XMPU2_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd020000 0x1000 0x28 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x28>;
gpios = <0x2b 0x1>;
};
ddr_xmpu3: ddr_xmpu3_@_DDR_XMPU3_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd030000 0x1000 0x24 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x24>;
};
ddr_xmpu4: ddr_xmpu4_@_DDR_XMPU4_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd040000 0x1000 0x25 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x25>;
};
ddr_xmpu5: ddr_xmpu5_@_DDR_XMPU5_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x1a 0x0 0xfd050000 0x1000 0x26 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x26>;
};
ps7_afi_0: ps7-afi@0xFD360000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd360000 0x1000>;
};
ps7_afi_1: ps7-afi@0xFD370000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd370000 0x1000>;
};
ps7_afi_2: ps7-afi@0xFD380000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd380000 0x1000>;
};
ps7_afi_3: ps7-afi@0xFD390000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd390000 0x1000>;
};
ps7_afi_4: ps7-afi@0xFD3A0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3a0000 0x1000>;
};
ps7_afi_5: ps7-afi@0xFD3B0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3b0000 0x1000>;
};
gdma0_mr: gdma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma0_mattr: gdma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e8>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
gdma0: gdma0@0xFD500000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd500000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7c>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2c>;
};
gdma1_mr: gdma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma1_mattr: gdma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e9>;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};
gdma1: gdma1@0xFD510000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd510000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7d>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2d>;
};
gdma2_mr: gdma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma2_mattr: gdma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ea>;
linux,phandle = <0x2e>;
phandle = <0x2e>;
};
gdma2: gdma2@0xFD520000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd520000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7e>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2e>;
};
gdma3_mr: gdma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma3_mattr: gdma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14eb>;
linux,phandle = <0x2f>;
phandle = <0x2f>;
};
gdma3: gdma3@0xFD530000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd530000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7f>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x2f>;
};
gdma4_mr: gdma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma4_mattr: gdma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ec>;
linux,phandle = <0x30>;
phandle = <0x30>;
};
gdma4: gdma4@0xFD540000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd540000 0x1000>;
bus-width = <0x80>;
interrupts = <0x80>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x30>;
};
gdma5_mr: gdma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma5_mattr: gdma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ed>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
gdma5: gdma5@0xFD550000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd550000 0x1000>;
bus-width = <0x80>;
interrupts = <0x81>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x31>;
};
gdma6_mr: gdma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma6_mattr: gdma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ee>;
linux,phandle = <0x32>;
phandle = <0x32>;
};
gdma6: gdma6@0xFD560000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd560000 0x1000>;
bus-width = <0x80>;
interrupts = <0x82>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x32>;
};
gdma7_mr: gdma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma7_mattr: gdma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ef>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
gdma7: gdma7@0xFD570000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd570000 0x1000>;
bus-width = <0x80>;
interrupts = <0x83>;
#stream-id-cells = <0x1>;
dma = <0x21>;
memattr = <0x33>;
};
crf: crf@0xFD1A0000 {
compatible = "xlnx,zynqmp_crf";
reg = <0x0 0xfd1a0000 0x110>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x53>;
phandle = <0x53>;
};
xlnx_dpdma: axidpdma@0xFD4C0000 {
compatible = "xlnx,axi-dpdma-1.0";
reg = <0x0 0xfd4c0000 0x1000>;
clocks = <0x34>;
clock-names = "axi_clk";
xlnx,axi-clock-freq = <0xbebc200>;
interrupts = <0x7a>;
dma = <0x1b>;
dma-channels = <0x6>;
#dma-cells = <0x1>;
linux,phandle = <0x36>;
phandle = <0x36>;
dma-video0channel@fe4c0000 {
compatible = "xlnx,video0";
};
dma-video1channel@fe4c0000 {
compatible = "xlnx,video1";
};
dma-video2channel@fe4c0000 {
compatible = "xlnx,video2";
};
dma-graphicschannel@fe4c0000 {
compatible = "xlnx,graphics";
};
dma-audio0channel@fe4c0000 {
compatible = "xlnx,audio0";
};
dma-audio1channel@fe4c0000 {
compatible = "xlnx,audio1";
};
};
dp_aclk: clock0 {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
clock-accuracy = <0x64>;
linux,phandle = <0x35>;
phandle = <0x35>;
};
dummy_clk: clock1 {
compatible = "dummy-clk";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
xlnx_dp_sub: dp_sub@fd4aa000 {
compatible = "xlnx,v-dp-sub-1.6";
reg = <0x0 0xfd4aa000 0x4000>;
xlnx,output-fmt = "rgb";
linux,phandle = <0x37>;
phandle = <0x37>;
};
xlnx_dp: dp@0xFD4A0000 {
compatible = "xlnx,v-dp-4.1";
reg = <0x0 0xfd4a0000 0x1000>;
interrupts = <0x77>;
clock-names = "aclk";
clocks = <0x35>;
dpdma = <0x36>;
xlnx,dp-version = "v1.2";
xlnx,max-lanes = <0x2>;
xlnx,max-link-rate = <0x278d0>;
xlnx,max-bpc = <0x10>;
xlnx,max-pclock = <0x7530>;
xlnx,enable-ycrcb;
xlnx,colormetry = "rgb";
xlnx,bpc = <0x8>;
xlnx,dp-sub = <0x37>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
xilinx_drm {
compatible = "xlnx,drm";
xlnx,encoder-slave = <0x38>;
clocks = <0x34 0x0>;
xlnx,connector-type = "DisplayPort";
xlnx,dp-sub = <0x37>;
planes {
xlnx,pixel-format = "rgb565";
plane0 {
dmas = <0x36 0x3>;
dma-names = "dma";
};
plane1 {
dmas = <0x36 0x0>;
dma-names = "dma";
};
};
};
ddrphy_0: ddr-phy@0xFD080000 {
compatible = "xlnx,zynqmp-ddr-phy";
reg = <0x0 0xfd080000 0x2000>;
};
ddrc_0: memory-controller@0xFD070000 {
compatible = "xlnx,zynqmp-ddrc";
reg = <0x0 0xfd070000 0x1000>;
};
swdt@0xFF150000 {
compatible = "xlnx,swdt";
reg = <0x0 0xff150000 0x10>;
pclk = <0xf4240>;
};
wdt@0xFD4D0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xfd4d0000 0x10>;
pclk = <0xf4240>;
};
csu_wdt@0xFFCB0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xffcb0000 0x10>;
pclk = <0xf4240>;
};
iou_slcr_0: zynqmp_iou_slcr@0xFF180000 {
compatible = "xilinx,zynqmp-iou-slcr";
reg = <0x0 0xff180000 0x1000>;
gpio-controller;
#gpio-cells = <0x2>;
mio-bank0-1.8v = <0x1>;
mio-bank1-1.8v = <0x1>;
mio-bank2-1.8v = <0x1>;
linux,phandle = <0x42>;
phandle = <0x42>;
};
ps7_can_0: ps7-can@0xFF060000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x17>;
reg = <0x0 0xff060000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
ps7_can_1: ps7-can@0xFF070000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x18>;
reg = <0x0 0xff070000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
serdes_0: serdes@0xFD400000 {
compatible = "xlnx,zynqmp-serdes";
reg = <0x0 0xfd400000 0x20000>;
};
gem0: ethernet@0xFF0B0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x39 0x39>;
dma = <0x1e>;
memattr = <0x3a>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0b0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem1: ethernet@0xFF0C0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3b 0x3b>;
dma = <0x1e>;
memattr = <0x3b>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0c0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem2: ethernet@0xFF0D0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3d 0x3d>;
dma = <0x1e>;
memattr = <0x3c>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0d0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem3: ethernet@0xFF0E0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x39 0x39>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3f 0x3f>;
dma = <0x1e>;
memattr = <0x3d>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0e0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
mdio = <0x3e>;
};
sata: ahci@0xFD0C0000 {
compatible = "generic-ahci", "sysbus-ahci";
reg = <0x0 0xfd0c0000 0x2000>;
interrupts = <0x85>;
num-ports = <0x2>;
dma = <0x1b>;
};
lpd_gpv@0xFE100000 {
compatible = "xlnx,lpd-gpv";
reg = <0x0 0xfe100000 0xc8130>;
};
usb3_0: usb3@0xFE200000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe200000 0x4000>;
interrupts = <0x4b>;
};
usb3_1: usb3@0xFE300000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe300000 0x4000>;
interrupts = <0x4c>;
};
nand: arasan_nfc@0xFF100000 {
compatible = "arasan,nfc";
reg = <0x0 0xff100000 0x1000>;
interrupts = <0xe>;
dma = <0x1b>;
has-mdma = <0x1>;
nand {
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "all";
reg = <0x0 0x100000>;
};
};
};
psu_gpio: psu_gpio@0xFF0A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,zynqmp-gpio";
gpio-controller;
interrupts = <0x10>;
reg = <0x0 0xff0a0000 0x1000>;
};
qspi_dma_0: csu_dma@0xFF0F0800 {
compatible = "zynqmp,csu-dma";
interrupts = <0xf>;
#stream-id-cells = <0x1>;
reg = <0x0 0xff0f0800 0x800>;
dma = <0x1e>;
memattr = <0x3f>;
is-dst = <0x1>;
linux,phandle = <0x40>;
phandle = <0x40>;
};
ps7_qspi_0: ps7-qspi@0xFF0F0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
#bus-cells = <0x1>;
clock-names = "ref_clk", "pclk";
compatible = "xlnx,usmp-gqspi", "cdns,spi-r1p6";
stream-connected-dma = <0x40>;
clocks = <0x39 0x39>;
dma = <0x1b>;
interrupts = <0xf>;
num-ss-bits = <0x2>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
speed-hz = <0x989680>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-clk-freq-hz = <0xbebc200>;
xlnx,qspi-mode = <0x2>;
qspi_flash_lcs_lb: qspi_flash_lcs_lb@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
qspi_flash_lcs_lb@0x00000000 {
label = "qspi_flash_lcs_lb";
reg = <0x0 0x2000000>;
};
};
qspi_flash_ucs_ub: qspi_flash_ucs_ub@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x1>;
qspi_flash_ucs_ub@0x00000000 {
label = "qspi_flash_ucs_ub";
reg = <0x0 0x2000000>;
};
};
};
sd_clk: sd_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x41>;
phandle = <0x41>;
};
ps7_sd_0: ps7-sdio@0xFF160000 {
clock-names = "ref_clk", "aper_clk";
clock-frequency = <0x17d7840>;
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x41 0x41>;
drive-index = <0x0>;
interrupts = <0x30>;
reg = <0x0 0xff160000 0x1000>;
dma = <0x1b>;
gpios = <0x42 0x0 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x0>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_sd_1: ps7-sdio@0xFF170000 {
clock-names = "ref_clk", "aper_clk";
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x39 0x39>;
drive-index = <0x1>;
interrupts = <0x31>;
reg = <0x0 0xff170000 0x1000>;
dma = <0x1b>;
gpios = <0x42 0x1 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x1>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_spi_0: ps7-spi@0xFF040000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x39 0x39>;
compatible = "cdns,spi-r1p6";
interrupts = <0x13>;
num-ss-bits = <0x4>;
reg = <0x0 0xff040000 0x1000>;
spi0_flash0: spi0_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi0_flash0@0x00000000 {
label = "spi0_flash0";
reg = <0x0 0x100000>;
};
};
spi0_flash1: spi0_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi0_flash1@0x00000000 {
label = "spi0_flash1";
reg = <0x0 0x100000>;
};
};
spi0_flash2: spi0_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi0_flash2@0x00000000 {
label = "spi0_flash2";
reg = <0x0 0x100000>;
};
};
spi0_flash3: spi0_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi0_flash3@0x00000000 {
label = "spi0_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_spi_1: ps7-spi@0xFF050000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x39 0x39>;
compatible = "cdns,spi-r1p6";
interrupts = <0x14>;
num-ss-bits = <0x4>;
reg = <0x0 0xff050000 0x1000>;
spi1_flash0: spi1_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi1_flash0@0x00000000 {
label = "spi1_flash0";
reg = <0x0 0x100000>;
};
};
spi1_flash1: spi1_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi1_flash1@0x00000000 {
label = "spi1_flash1";
reg = <0x0 0x100000>;
};
};
spi1_flash2: spi1_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi1_flash2@0x00000000 {
label = "spi1_flash2";
reg = <0x0 0x100000>;
};
};
spi1_flash3: spi1_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi1_flash3@0x00000000 {
label = "spi1_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_ttc_0: ps7-ttc@0xFF110000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x24 0x25 0x26>;
reg = <0x0 0xff110000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_1: ps7-ttc@0xFF120000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x27 0x28 0x29>;
reg = <0x0 0xff120000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_2: ps7-ttc@0xFF130000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2a 0x2b 0x2c>;
reg = <0x0 0xff130000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_3: ps7-ttc@0xFF140000 {
clocks = <0x39>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2d 0x2e 0x2f>;
reg = <0x0 0xff140000 0x1000>;
timer-width = <0x20>;
};
uart_clk: uart_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x43>;
phandle = <0x43>;
};
ps7_uart_0: serial@0xFF000000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x15>;
port-number = <0x1>;
reg = <0x0 0xff000000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x43 0x43>;
ttrig-polarity = <0x1>;
};
ps7_uart_1: serial@0xFF010000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x16>;
port-number = <0x0>;
reg = <0x0 0xff010000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x43 0x43>;
ttrig-polarity = <0x1>;
status = "disabled";
};
ocm_ctrl0: ocm_ctrl@0xFF960000 {
compatible = "xlnx,zynqmp-ocmc";
memsize = <0x40000>;
reg = <0x0 0xff960000 0x1000>;
};
adma0_mr: adma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma0_mattr: adma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x868>;
linux,phandle = <0x44>;
phandle = <0x44>;
};
adma0: adma0@0xFFA80000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa80000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4d>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x44>;
};
adma1_mr: adma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma1_mattr: adma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x869>;
linux,phandle = <0x45>;
phandle = <0x45>;
};
adma1: adma1@0xFFA90000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa90000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4e>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x45>;
};
adma2_mr: adma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma2_mattr: adma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86a>;
linux,phandle = <0x46>;
phandle = <0x46>;
};
adma2: adma2@0xFFAA0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaa0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4f>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x46>;
};
adma3_mr: adma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma3_mattr: adma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86b>;
linux,phandle = <0x47>;
phandle = <0x47>;
};
adma3: adma3@0xFFAB0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffab0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x50>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x47>;
};
adma4_mr: adma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma4_mattr: adma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86c>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
adma4: adma4@0xFFAC0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffac0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x51>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x48>;
};
adma5_mr: adma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma5_mattr: adma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86d>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
adma5: adma5@0xFFAD0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffad0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x52>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x49>;
};
adma6_mr: adma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma6_mattr: adma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86e>;
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
adma6: adma6@0xFFAE0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffae0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x53>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x4a>;
};
adma7_mr: adma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma7_mattr: adma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86f>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
adma7: adma7@0xFFAF0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaf0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x54>;
#stream-id-cells = <0x1>;
dma = <0x1e>;
memattr = <0x4b>;
};
crl: crl@0xFF5E0000 {
compatible = "xlnx,zynqmp-crl";
reg = <0x0 0xff5e0000 0x1000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x3>;
gpios = <0xc 0x1a>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
zynqmp_anms: zynqmp_anms@0xFFA50000 {
compatible = "xlnx,zynqmp_ams";
reg = <0x0 0xffa50000 0x68>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_ps: zynqmp_sysmon_ps@0xFFA50800 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50800 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_pl: zynqmp_sysmon_pl@0xFFA50C00 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50c00 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_rtc: zynqmp_rtc@0xFFA60000 {
compatible = "xlnx-zynmp.rtc";
reg = <0x0 0xffa60000 0x100>;
};
dummy_gpio: dummy_gpio@0 {
gpio-controller;
#gpio-cells = <0x1>;
};
pmu_global: pmu_global@0xFFD80000 {
compatible = "xlnx,pmu_global";
reg = <0x0 0xffd80000 0x40000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x1a>;
ignore-pwr-req = <0x1>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
cxtsgen: cxtsgen@0xFF250000 {
compatible = "arm.generic-timer";
reg = <0x0 0xff260000 0x1000>;
};
ps_reset@0 {
compatible = "qemu,reset-device";
gpios = <0x4c 0x2 0xc 0x3>;
};
pcie_attrib: pcie_attrib@0xFD480000 {
compatible = "xlnx.nwl-pcie-attrib";
reg = <0x0 0xfd480000 0x1000>;
interrupts = <0x76>;
};
pcie_main: pcie_main@0xFD0E0000 {
compatible = "xlnx.nwl-pcie-main";
reg-extended = <0x1a 0x0 0xfd0e0000 0x1000 0x4d 0x0 0xfd480000 0x0 0x1000 0x2 0x1a 0x80 0x0 0x10000000 0x4e 0x0 0x0 0xffffffff 0xffffffff 0x0>;
interrupts = <0x74 0x72 0x73>;
dma = <0x4d>;
memattr = <0x4f>;
};
zynqmp_boot: zynqmp_boot@0 {
compatible = "xlnx,zynqmp-boot";
dma = <0x1a>;
};
rpu0_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x50>;
reg = <0x0 0xffe00000 0x60000>;
};
rpu1_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x51>;
reg = <0x0 0xffe90000 0x50000>;
};
i2c1: i2c1@0xFF030000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clocks = <0x39>;
compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10";
interrupts = <0x12>;
reg = <0x0 0xff030000 0x1000>;
i2cswitch@74 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "nxp,pca9548";
reg = <0x74>;
i2c@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
eeprom@54 {
compatible = "at,24c08";
reg = <0x54>;
};
eeprom@55 {
compatible = "at,24c08";
reg = <0x55>;
};
eeprom@56 {
compatible = "at,24c08";
reg = <0x56>;
};
eeprom@57 {
compatible = "at,24c08";
reg = <0x57>;
};
};
i2c@2 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x2>;
si570_1: clock-generator@5d {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
i2c@3 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x3>;
si570_2: clock-generator@5e {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
};
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu0: apu_cpu@0 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x0>;
enable-method = "psci";
reg = <0x0>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x0>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #0";
memattr_s = <0x54>;
memattr_ns = <0x55>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
cpu1: apu_cpu@1 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x1>;
enable-method = "psci";
reg = <0x1>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x1>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #1";
memattr_s = <0x56>;
memattr_ns = <0x57>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
cpu2: apu_cpu@2 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x2>;
enable-method = "psci";
reg = <0x2>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x2>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #2";
memattr_s = <0x58>;
memattr_ns = <0x59>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
cpu3: apu_cpu@3 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x3>;
enable-method = "psci";
reg = <0x3>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x52>;
memory = <0x52>;
gpios = <0x53 0x3>;
gpio-names = "rst_cntrl";
gdb-id = "Cortex-A53 #3";
memattr_s = <0x5a>;
memattr_ns = <0x5b>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
rpu_cpu0: rpu_cpu@0 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x100>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x0>;
mr = <0x5c>;
memory = <0x5c>;
gpios = <0x4c 0x0 0x5d 0x0 0x5d 0x5>;
gpio-names = "reset", "ncpuhalt", "vinithi";
gdb-id = "Cortex-R5 #0";
memattr_ns = <0x5e>;
linux,phandle = <0x63>;
phandle = <0x63>;
};
rpu_cpu1: rpu_cpu@1 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x101>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x1>;
mr = <0x5f>;
memory = <0x5f>;
gpios = <0x4c 0x1 0x5d 0x2 0x5d 0x1 0x5d 0x6>;
gpio-names = "reset", "halt", "ncpuhalt", "vinithi";
gdb-id = "Cortex-R5 #1";
memattr_ns = <0x60>;
linux,phandle = <0x64>;
phandle = <0x64>;
};
};
aliases {
serial0 = "/amba@0/serial@0xFF000000";
serial1 = "/amba@0/serial@0xFF010000";
ethernet0 = "/amba@0/ethernet@0xFF0E0000";
main_bus_for_apu {
compatible = "qemu:memory-region";
container = <0x52>;
alias = <0x23>;
priority = <0xffffffff>;
};
main_bus_for_pl {
compatible = "qemu:memory-region";
container = <0x1a>;
alias = <0x61>;
priority = <0xffffffff>;
};
};
amba_apu: amba_apu@0 {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x52>;
phandle = <0x52>;
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x2>;
interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
clock-frequency = <0x5f5e100>;
};
dummy: dymmy@0 {
interrupt-controller;
#interrupt-cells = <0x1>;
linux,phandle = <0x62>;
phandle = <0x62>;
};
};
amba_apu_gic: amba_apu_gic@0 {
#address-cells = <0x2>;
#priority-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
container = <0x1a>;
priority = <0xffffffff>;
gic: interrupt-controller@0xFD3FF000 {
#address-cells = <0x0>;
#size-cells = <0x0>;
#interrupt-cells = <0x3>;
#gpio-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9010000 0x1000 0x0 0x0 0xf9020000 0x20000 0x0 0x0 0xf9040000 0x20000 0x0 0x0 0xf9060000 0x20000 0x0>;
interrupt-controller;
num-irq = <0xc0>;
interrupts-extended = <0x4 0x0 0x5 0x0 0x6 0x0 0x7 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x2 0x5 0x2 0x6 0x2 0x7 0x2 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x1 0x5 0x1 0x6 0x1 0x7 0x1 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x4 0x3 0x5 0x3 0x6 0x3 0x7 0x3 0x62 0x0 0x62 0x0 0x62 0x0 0x62 0x0 0x2 0x1 0x9 0x104 0x2 0x1 0x9 0x204 0x2 0x1 0x9 0x404 0x2 0x1 0x9 0x804>;
num-cpu = <0x4>;
revision = <0x2>;
map-stride = <0x10000>;
int-id = <0x202143b>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
zynqmp-gic-cpu-alias@0xf9021000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9021000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9022000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9022000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9023000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9023000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9024000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9024000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9025000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9025000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9026000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9026000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9027000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9027000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9028000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9028000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9029000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf9029000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902a000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902a000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902b000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902b000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902c000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902c000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902d000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902d000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902e000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902e000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902f000 {
compatible = "qemu:memory-region";
alias = <0x2 0x1>;
reg = <0x0 0xf902f000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9061000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9061000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9062000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9062000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9063000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9063000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9064000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9064000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9065000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9065000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9066000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9066000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9067000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9067000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9068000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9068000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9069000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf9069000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906a000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906a000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906b000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906b000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906c000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906c000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906d000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906d000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906e000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906e000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906f000 {
compatible = "qemu:memory-region";
alias = <0x2 0x3>;
reg = <0x0 0xf906f000 0x1000 0x1>;
};
};
amba_rpu: amba_rpu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x2a>;
phandle = <0x2a>;
rpu_gic: interrupt-controller@0xF9000000 {
#address-cells = <0x0>;
#interrupt-cells = <0x3>;
#size-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9000000 0x0 0x1000 0x0 0x0 0xf9001000 0x0 0x100 0x0>;
status = "disabled";
interrupt-controller;
num-irq = <0x100>;
num-cpu = <0x2>;
interrupts-extended = <0x63 0x0 0x64 0x0>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
ddr_memory_2_for_rpu: ddr_memory_2_for_rpu {
compatible = "qemu:memory-region";
alias = <0x65>;
reg = <0x0 0x30000 0x0 0x10000 0x0>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
main_bus_for_rpu {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
pmu_io_intc: dummy_pmu_intc@0 {
#interrupt-cells = <0x2>;
interrupt-controller;
linux,phandle = <0x19>;
phandle = <0x19>;
};
smmu_tbu0: tbu0_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
smmu_tbu1: tbu1_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
smmu_tbu2: tbu2_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
smmu_tbu3: tbu3_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
smmu_tbu4: tbu4_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x20>;
phandle = <0x20>;
};
smmu_tbu5: tbu5_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x21>;
phandle = <0x21>;
};
tbu3_master: tbu3_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x24>;
phandle = <0x24>;
main_bus_for_tbu3 {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu4_master: tbu4_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x25>;
phandle = <0x25>;
main_bus_for_tbu4 {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu5_master: tbu5_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x26>;
phandle = <0x26>;
main_bus_for_tbu5 {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
cci_slave: cci_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x23>;
phandle = <0x23>;
downstream {
compatible = "qemu:memory-region";
alias = <0x1b>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
};
misc_clk: misc_clk {
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
compatible = "fixed-clock";
linux,phandle = <0x39>;
phandle = <0x39>;
};
pcie_ingress: pcie_ingress@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
linux,phandle = <0x4d>;
phandle = <0x4d>;
downstream {
compatible = "qemu:memory-region";
alias = <0x1d>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
pcie_overlay: pcie_overlay@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
priority = <0x2>;
compatible = "qemu:memory-region";
container = <0x1a>;
linux,phandle = <0x4e>;
phandle = <0x4e>;
};
ddr_alias: ddr_alias@0 {
compatible = "qemu:memory-region";
container = <0x66>;
alias = <0x1>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
qemu_sysmem: qemu_sysmem@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:system-memory";
linux,phandle = <0x66>;
phandle = <0x66>;
};
pmu_memattr: pmu_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x40>;
};
apu0_s_memattr: apu0_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x80>;
linux,phandle = <0x54>;
phandle = <0x54>;
};
apu0_ns_memattr: apu0_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x80>;
linux,phandle = <0x55>;
phandle = <0x55>;
};
apu1_s_memattr: apu1_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8d>;
linux,phandle = <0x56>;
phandle = <0x56>;
};
apu1_ns_memattr: apu1_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8d>;
linux,phandle = <0x57>;
phandle = <0x57>;
};
apu2_s_memattr: apu2_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8e>;
linux,phandle = <0x58>;
phandle = <0x58>;
};
apu2_ns_memattr: apu2_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8e>;
linux,phandle = <0x59>;
phandle = <0x59>;
};
apu3_s_memattr: apu3_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8f>;
linux,phandle = <0x5a>;
phandle = <0x5a>;
};
apu3_ns_memattr: apu3_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8f>;
linux,phandle = <0x5b>;
phandle = <0x5b>;
};
rpu0_memattr: rpu0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2e>;
linux,phandle = <0x5e>;
phandle = <0x5e>;
};
rpu1_memattr: rpu1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2f>;
linux,phandle = <0x60>;
phandle = <0x60>;
};
gem0_memattr: gem0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x874>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
gem1_memattr: gem1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x875>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
gem2_memattr: gem2_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x876>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
gem3_memattr: gem3_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x877>;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
qspi_dma_memattr: qspi_dma_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x873>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
};
pcie_ns_memattr: pcie_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x4d0>;
linux,phandle = <0x4f>;
phandle = <0x4f>;
};
protected_amba: protected_amba@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x1b>;
phandle = <0x1b>;
downstream {
compatible = "qemu:memory-region";
alias = <0x1a>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
ddr3_ram: memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x1a>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
pmu_ram: pmu_ram@ffdc0000 {
compatible = "qemu:memory-region";
container = <0x1a>;
qemu,ram = <0x1>;
reg = <0x0 0xffdc0000 0x20000>;
};
tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x10000>;
};
tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x20000 0x10000>;
};
tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x67>;
phandle = <0x67>;
};
tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x68>;
phandle = <0x68>;
};
icache_rpu0: icache_rpu0@0x40000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x40000 0x8000>;
};
dcache_rpu0: dcache_rpu0@0x50000 {
compatible = "qemu:memory-region";
container = <0x50>;
qemu,ram = <0x1>;
reg = <0x0 0x50000 0x8000>;
};
icache_rpu1: icache_rpu1@0x30000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x30000 0x8000>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
dcache_rpu1: dcache_rpu1@0x40000 {
compatible = "qemu:memory-region";
container = <0x51>;
qemu,ram = <0x1>;
reg = <0x0 0x40000 0x8000>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
ipibuf_ram: ipibuf@ff990000 {
compatible = "qemu:memory-region";
container = <0x1a>;
qemu,ram = <0x1>;
reg = <0x0 0xff990000 0x1000>;
};
ocm_ram: ocm_ram@0 {
compatible = "qemu:memory-region";
linux,phandle = <0x29>;
phandle = <0x29>;
};
ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x0 0x10000>;
};
ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x10000 0x10000>;
};
ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x20000 0x10000>;
};
ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
compatible = "qemu:memory-region";
container = <0x29>;
qemu,ram = <0x1>;
reg = <0x0 0x30000 0x10000>;
};
tcm_cache_rpu0: tcm_cache_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x50>;
phandle = <0x50>;
atcm1_for_rpu0: atcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x67>;
reg = <0x0 0x10000 0x0 0x10000 0x1>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
btcm1_for_rpu0: btcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x68>;
reg = <0x0 0x30000 0x0 0x10000 0x1>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
};
amba_rpu0: amba_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x5c>;
phandle = <0x5c>;
tcm_cache_rpu0 {
compatible = "qemu:memory-region";
alias = <0x50>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
rpu_bus_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x2a>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tcm_cache_rpu1: tcm_cache_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x51>;
phandle = <0x51>;
};
amba_rpu1: amba_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x5f>;
phandle = <0x5f>;
tcm_cache_rpu1 {
compatible = "qemu:memory-region";
alias = <0x51>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
rpu_bus_for_rpu1 {
compatible = "qemu:memory-region";
alias = <0x2a>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_pl: amba_pl {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x61>;
phandle = <0x61>;
};
mdio0: mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "mdio";
linux,phandle = <0x3e>;
phandle = <0x3e>;
phy0: phy@7 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0x7>;
};
phy1: phy@12 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0xc>;
};
};
};
[-- Attachment #12: zynqmp-qemu-multiarch-arm.dts.txt --]
[-- Type: text/plain, Size: 93285 bytes --]
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x1>;
model = "ZynqMP ZCU102 RevA";
compatible = "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
ddr_bank1_1: ddr_bank1_1@0x0 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x30000>;
};
ddr_bank1_2: ddr_bank1_2@0x30000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
linux,phandle = <0x80>;
phandle = <0x80>;
};
ddr_bank1_3: ddr_bank1_3@0x40000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x3ffc0000>;
};
ddr_bank2: ddr_bank2@0x40000000 {
compatible = "qemu:memory-region";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x0 0x40000000 0x40000000>;
};
ddr_bank3: ddr_bank3@0x800000000 {
compatible = "qemu:memory-region-spec";
container = <0x1>;
qemu,ram = <0x2>;
reg = <0x8 0x0 0x8 0x0>;
};
pmu_rp_0: pmu@0 {
compatible = "remote-port";
#interrupt-cells = <0x2>;
chrdev-id = "pmu-apu-rp";
linux,phandle = <0x2>;
phandle = <0x2>;
};
rp_memory_slave_pmu: rp_memory_slave_pmu@0 {
compatible = "remote-port-memory-slave";
remote-ports = <0x2 0x0>;
mr = <0x3>;
};
rp_gpio_pmu_intr: rp_gpio_pmu_intr@0 {
#interrupt-cells = <0x1>;
compatible = "remote-port-gpio";
remote-ports = <0x2 0x1>;
interrupt-controller;
num-gpios = <0x1>;
linux,phandle = <0x5e>;
phandle = <0x5e>;
};
rp_gpio_pmu: rp_gpio_pmu@0 {
compatible = "remote-port-gpio";
remote-ports = <0x2 0x2>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x4>;
gpios = <0x4 0x0 0x5 0x2 0x4 0x3>;
linux,phandle = <0x14>;
phandle = <0x14>;
};
amba: amba@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
interrupt-map-mask = <0x0 0x0 0xffff>;
interrupt-map = <0x0 0x0 0x8 0x6 0x0 0x8 0x4 0x0 0x0 0x9 0x6 0x0 0x9 0x4 0x0 0x0 0xa 0x6 0x0 0xa 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xb 0x6 0x0 0xb 0x4 0x0 0x0 0xc 0x6 0x0 0xc 0x4 0x0 0x0 0xd 0x6 0x0 0xd 0x4 0x0 0x0 0xe 0x6 0x0 0xe 0x4 0x0 0x0 0xf 0x6 0x0 0xf 0x4 0x0 0x0 0x10 0x6 0x0 0x10 0x4 0x0 0x0 0x11 0x6 0x0 0x11 0x4 0x0 0x0 0x12 0x6 0x0 0x12 0x4 0x0 0x0 0x13 0x6 0x0 0x13 0x4 0x0 0x0 0x14 0x6 0x0 0x14 0x4 0x0 0x0 0x15 0x6 0x0 0x15 0x4 0x0 0x0 0x16 0x6 0x0 0x16 0x4 0x0 0x0 0x17 0x6 0x0 0x17 0x4 0x0 0x0 0x18 0x6 0x0 0x18 0x4 0x0 0x0 0x19 0x6 0x0 0x19 0x4 0x0 0x0 0x19 0x6 0x0 0x19 0x4 0x0 0x0 0x1a 0x6 0x0 0x1a 0x4 0x0 0x0 0x1b 0x6 0x0 0x1b 0x4 0x0 0x0 0x1c 0x6 0x0 0x1c 0x4 0x0 0x0 0x1d 0x6 0x0 0x1d 0x4 0x0 0x0 0x1e 0x6 0x0 0x1e 0x4 0x0 0x0 0x1f 0x6 0x0 0x1f 0x4 0x0 0x0 0x20 0x6 0x0 0x20 0x4 0x0 0x0 0x21 0x6 0x0 0x21 0x4 0x0 0x0 0x22 0x6 0x0 0x22 0x4 0x0 0x0 0x23 0x6 0x0 0x23 0x4 0x0 0x0 0x24 0x6 0x0 0x24 0x4 0x0 0x0 0x25 0x6 0x0 0x25 0x4 0x0 0x0 0x26 0x6 0x0 0x26 0x4 0x0 0x0 0x27 0x6 0x0 0x27 0x4 0x0 0x0 0x28 0x6 0x0 0x28 0x4 0x0 0x0 0x29 0x6 0x0 0x29 0x4 0x0 0x0 0x2a 0x6 0x0 0x2a 0x4 0x0 0x0 0x2b 0x6 0x0 0x2b 0x4 0x0 0x0 0x2c 0x6 0x0 0x2c 0x4 0x0 0x0 0x2d 0x6 0x0 0x2d 0x4 0x0 0x0 0x2e 0x6 0x0 0x2e 0x4 0x0 0x0 0x2f 0x6 0x0 0x2f 0x4 0x0 0x0 0x30 0x6 0x0 0x30 0x4 0x0 0x0 0x31 0x6 0x0 0x31 0x4 0x0 0x0 0x32 0x6 0x0 0x32 0x4 0x0 0x0 0x33 0x6 0x0 0x33 0x4 0x0 0x0 0x34 0x6 0x0 0x34 0x4 0x0 0x0 0x35 0x6 0x0 0x35 0x4 0x0 0x0 0x36 0x6 0x0 0x36 0x4 0x0 0x0 0x37 0x6 0x0 0x37 0x4 0x0 0x0 0x38 0x6 0x0 0x38 0x4 0x0 0x0 0x39 0x6 0x0 0x39 0x4 0x0 0x0 0x3a 0x6 0x0 0x3a 0x4 0x0 0x0 0x3b 0x6 0x0 0x3b 0x4 0x0 0x0 0x3c 0x6 0x0 0x3c 0x4 0x0 0x0 0x3d 0x6 0x0 0x3d 0x4 0x0 0x0 0x3e 0x6 0x0 0x3e 0x4 0x0 0x0 0x3f 0x6 0x0 0x3f 0x4 0x0 0x0 0x40 0x6 0x0 0x40 0x4 0x0 0x0 0x41 0x6 0x0 0x41 0x4 0x0 0x0 0x42 0x6 0x0 0x42 0x4 0x0 0x0 0x43 0x6 0x0 0x43 0x4 0x0 0x0 0x44 0x6 0x0 0x44 0x4 0x0 0x0 0x45 0x6 0x0 0x45 0x4 0x0 0x0 0x46 0x6 0x0 0x46 0x4 0x0 0x0 0x47 0x6 0x0 0x47 0x4 0x0 0x0 0x48 0x6 0x0 0x48 0x4 0x0 0x0 0x49 0x6 0x0 0x49 0x4 0x0 0x0 0x4a 0x6 0x0 0x4a 0x4 0x0 0x0 0x4b 0x6 0x0 0x4b 0x4 0x0 0x0 0x4c 0x6 0x0 0x4c 0x4 0x0 0x0 0x4d 0x6 0x0 0x4d 0x4 0x0 0x0 0x4e 0x6 0x0 0x4e 0x4 0x0 0x0 0x4f 0x6 0x0 0x4f 0x4 0x0 0x0 0x50 0x6 0x0 0x50 0x4 0x0 0x0 0x51 0x6 0x0 0x51 0x4 0x0 0x0 0x52 0x6 0x0 0x52 0x4 0x0 0x0 0x53 0x6 0x0 0x53 0x4 0x0 0x0 0x54 0x6 0x0 0x54 0x4 0x0 0x0 0x55 0x6 0x0 0x55 0x4 0x0 0x0 0x56 0x6 0x0 0x56 0x4 0x0 0x0 0x57 0x6 0x0 0x57 0x4 0x0 0x0 0x58 0x6 0x0 0x58 0x4 0x0 0x0 0x58 0x6 0x0 0x58 0x4 0x0 0x0 0x59 0x6 0x0 0x59 0x4 0x0 0x0 0x5a 0x6 0x0 0x5a 0x4 0x0 0x0 0x5b 0x6 0x0 0x5b 0x4 0x0 0x0 0x5c 0x6 0x0 0x5c 0x4 0x0 0x0 0x5d 0x6 0x0 0x5d 0x4 0x0 0x0 0x5e 0x6 0x0 0x5e 0x4 0x0 0x0 0x5f 0x6 0x0 0x5f 0x4 0x0 0x0 0x60 0x6 0x0 0x60 0x4 0x0 0x0 0x68 0x6 0x0 0x68 0x4 0x0 0x0 0x69 0x6 0x0 0x69 0x4 0x0 0x0 0x6a 0x6 0x0 0x6a 0x4 0x0 0x0 0x6b 0x6 0x0 0x6b 0x4 0x0 0x0 0x6c 0x6 0x0 0x6c 0x4 0x0 0x0 0x6d 0x6 0x0 0x6d 0x4 0x0 0x0 0x6e 0x6 0x0 0x6e 0x4 0x0 0x0 0x6f 0x6 0x0 0x6f 0x4 0x0 0x0 0x70 0x6 0x0 0x70 0x4 0x0 0x0 0x71 0x6 0x0 0x71 0x4 0x0 0x0 0x72 0x6 0x0 0x72 0x4 0x0 0x0 0x73 0x6 0x0 0x73 0x4 0x0 0x0 0x74 0x6 0x0 0x74 0x4 0x0 0x0 0x75 0x6 0x0 0x75 0x4 0x0 0x0 0x76 0x6 0x0 0x76 0x4 0x0 0x0 0x77 0x6 0x0 0x77 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x78 0x6 0x0 0x78 0x4 0x0 0x0 0x79 0x6 0x0 0x79 0x4 0x0 0x0 0x7a 0x6 0x0 0x7a 0x4 0x0 0x0 0x7b 0x6 0x0 0x7b 0x4 0x0 0x0 0x7b 0x6 0x0 0x7b 0x4 0x0 0x0 0x7c 0x6 0x0 0x7c 0x4 0x0 0x0 0x7d 0x6 0x0 0x7d 0x4 0x0 0x0 0x7e 0x6 0x0 0x7e 0x4 0x0 0x0 0x7f 0x6 0x0 0x7f 0x4 0x0 0x0 0x80 0x6 0x0 0x80 0x4 0x0 0x0 0x81 0x6 0x0 0x81 0x4 0x0 0x0 0x82 0x6 0x0 0x82 0x4 0x0 0x0 0x83 0x6 0x0 0x83 0x4 0x0 0x0 0x84 0x6 0x0 0x84 0x4 0x0 0x0 0x85 0x6 0x0 0x85 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x86 0x6 0x0 0x86 0x4 0x0 0x0 0x87 0x6 0x0 0x87 0x4 0x0 0x0 0x88 0x6 0x0 0x88 0x4 0x0 0x0 0x89 0x6 0x0 0x89 0x4 0x0 0x0 0x8a 0x6 0x0 0x8a 0x4 0x0 0x0 0x8b 0x6 0x0 0x8b 0x4 0x0 0x0 0x8c 0x6 0x0 0x8c 0x4 0x0 0x0 0x8d 0x6 0x0 0x8d 0x4 0x0 0x0 0x8e 0x6 0x0 0x8e 0x4 0x0 0x0 0x8f 0x6 0x0 0x8f 0x4 0x0 0x0 0x90 0x6 0x0 0x90 0x4 0x0 0x0 0x91 0x6 0x0 0x91 0x4 0x0 0x0 0x92 0x6 0x0 0x92 0x4 0x0 0x0 0x93 0x6 0x0 0x93 0x4 0x0 0x0 0x94 0x6 0x0 0x94 0x4 0x0 0x0 0x95 0x6 0x0 0x95 0x4 0x0 0x0 0x96 0x6 0x0 0x96 0x4 0x0 0x0 0x97 0x6 0x0 0x97 0x4 0x0 0x0 0x98 0x6 0x0 0x98 0x4 0x0 0x0 0x99 0x6 0x0 0x99 0x4 0x0 0x0 0x9a 0x6 0x0 0x9a 0x4 0x0 0x0 0x9b 0x6 0x0 0x9b 0x4 0x0 0x0 0x8 0x7 0x0 0x8 0x4 0x0 0x0 0x9 0x7 0x0 0x9 0x4 0x0 0x0 0xa 0x7 0x0 0xa 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xb 0x7 0x0 0xb 0x4 0x0 0x0 0xc 0x7 0x0 0xc 0x4 0x0 0x0 0xd 0x7 0x0 0xd 0x4 0x0 0x0 0xe 0x7 0x0 0xe 0x4 0x0 0x0 0xf 0x7 0x0 0xf 0x4 0x0 0x0 0x10 0x7 0x0 0x10 0x4 0x0 0x0 0x11 0x7 0x0 0x11 0x4 0x0 0x0 0x12 0x7 0x0 0x12 0x4 0x0 0x0 0x13 0x7 0x0 0x13 0x4 0x0 0x0 0x14 0x7 0x0 0x14 0x4 0x0 0x0 0x15 0x7 0x0 0x15 0x4 0x0 0x0 0x16 0x7 0x0 0x16 0x4 0x0 0x0 0x17 0x7 0x0 0x17 0x4 0x0 0x0 0x18 0x7 0x0 0x18 0x4 0x0 0x0 0x19 0x7 0x0 0x19 0x4 0x0 0x0 0x19 0x7 0x0 0x19 0x4 0x0 0x0 0x1a 0x7 0x0 0x1a 0x4 0x0 0x0 0x1b 0x7 0x0 0x1b 0x4 0x0 0x0 0x1c 0x7 0x0 0x1c 0x4 0x0 0x0 0x1d 0x7 0x0 0x1d 0x4 0x0 0x0 0x1e 0x7 0x0 0x1e 0x4 0x0 0x0 0x1f 0x7 0x0 0x1f 0x4 0x0 0x0 0x20 0x7 0x0 0x20 0x4 0x0 0x0 0x21 0x7 0x0 0x21 0x4 0x0 0x0 0x22 0x7 0x0 0x22 0x4 0x0 0x0 0x23 0x7 0x0 0x23 0x4 0x0 0x0 0x24 0x7 0x0 0x24 0x4 0x0 0x0 0x25 0x7 0x0 0x25 0x4 0x0 0x0 0x26 0x7 0x0 0x26 0x4 0x0 0x0 0x27 0x7 0x0 0x27 0x4 0x0 0x0 0x28 0x7 0x0 0x28 0x4 0x0 0x0 0x29 0x7 0x0 0x29 0x4 0x0 0x0 0x2a 0x7 0x0 0x2a 0x4 0x0 0x0 0x2b 0x7 0x0 0x2b 0x4 0x0 0x0 0x2c 0x7 0x0 0x2c 0x4 0x0 0x0 0x2d 0x7 0x0 0x2d 0x4 0x0 0x0 0x2e 0x7 0x0 0x2e 0x4 0x0 0x0 0x2f 0x7 0x0 0x2f 0x4 0x0 0x0 0x30 0x7 0x0 0x30 0x4 0x0 0x0 0x31 0x7 0x0 0x31 0x4 0x0 0x0 0x32 0x7 0x0 0x32 0x4 0x0 0x0 0x33 0x7 0x0 0x33 0x4 0x0 0x0 0x34 0x7 0x0 0x34 0x4 0x0 0x0 0x35 0x7 0x0 0x35 0x4 0x0 0x0 0x36 0x7 0x0 0x36 0x4 0x0 0x0 0x37 0x7 0x0 0x37 0x4 0x0 0x0 0x38 0x7 0x0 0x38 0x4 0x0 0x0 0x39 0x7 0x0 0x39 0x4 0x0 0x0 0x3a 0x7 0x0 0x3a 0x4 0x0 0x0 0x3b 0x7 0x0 0x3b 0x4 0x0 0x0 0x3c 0x7 0x0 0x3c 0x4 0x0 0x0 0x3d 0x7 0x0 0x3d 0x4 0x0 0x0 0x3e 0x7 0x0 0x3e 0x4 0x0 0x0 0x3f 0x7 0x0 0x3f 0x4 0x0 0x0 0x40 0x7 0x0 0x40 0x4 0x0 0x0 0x41 0x7 0x0 0x41 0x4 0x0 0x0 0x42 0x7 0x0 0x42 0x4 0x0 0x0 0x43 0x7 0x0 0x43 0x4 0x0 0x0 0x44 0x7 0x0 0x44 0x4 0x0 0x0 0x45 0x7 0x0 0x45 0x4 0x0 0x0 0x46 0x7 0x0 0x46 0x4 0x0 0x0 0x47 0x7 0x0 0x47 0x4 0x0 0x0 0x48 0x7 0x0 0x48 0x4 0x0 0x0 0x49 0x7 0x0 0x49 0x4 0x0 0x0 0x4a 0x7 0x0 0x4a 0x4 0x0 0x0 0x4b 0x7 0x0 0x4b 0x4 0x0 0x0 0x4c 0x7 0x0 0x4c 0x4 0x0 0x0 0x4d 0x7 0x0 0x4d 0x4 0x0 0x0 0x4e 0x7 0x0 0x4e 0x4 0x0 0x0 0x4f 0x7 0x0 0x4f 0x4 0x0 0x0 0x50 0x7 0x0 0x50 0x4 0x0 0x0 0x51 0x7 0x0 0x51 0x4 0x0 0x0 0x52 0x7 0x0 0x52 0x4 0x0 0x0 0x53 0x7 0x0 0x53 0x4 0x0 0x0 0x54 0x7 0x0 0x54 0x4 0x0 0x0 0x55 0x7 0x0 0x55 0x4 0x0 0x0 0x56 0x7 0x0 0x56 0x4 0x0 0x0 0x57 0x7 0x0 0x57 0x4 0x0 0x0 0x58 0x7 0x0 0x58 0x4 0x0 0x0 0x58 0x7 0x0 0x58 0x4 0x0 0x0 0x59 0x7 0x0 0x59 0x4 0x0 0x0 0x5a 0x7 0x0 0x5a 0x4 0x0 0x0 0x5b 0x7 0x0 0x5b 0x4 0x0 0x0 0x5c 0x7 0x0 0x5c 0x4 0x0 0x0 0x5d 0x7 0x0 0x5d 0x4 0x0 0x0 0x5e 0x7 0x0 0x5e 0x4 0x0 0x0 0x5f 0x7 0x0 0x5f 0x4 0x0 0x0 0x60 0x7 0x0 0x60 0x4 0x0 0x0 0x68 0x7 0x0 0x68 0x4 0x0 0x0 0x69 0x7 0x0 0x69 0x4 0x0 0x0 0x6a 0x7 0x0 0x6a 0x4 0x0 0x0 0x6b 0x7 0x0 0x6b 0x4 0x0 0x0 0x6c 0x7 0x0 0x6c 0x4 0x0 0x0 0x6d 0x7 0x0 0x6d 0x4 0x0 0x0 0x6e 0x7 0x0 0x6e 0x4 0x0 0x0 0x6f 0x7 0x0 0x6f 0x4 0x0 0x0 0x70 0x7 0x0 0x70 0x4 0x0 0x0 0x71 0x7 0x0 0x71 0x4 0x0 0x0 0x72 0x7 0x0 0x72 0x4 0x0 0x0 0x73 0x7 0x0 0x73 0x4 0x0 0x0 0x74 0x7 0x0 0x74 0x4 0x0 0x0 0x75 0x7 0x0 0x75 0x4 0x0 0x0 0x76 0x7 0x0 0x76 0x4 0x0 0x0 0x77 0x7 0x0 0x77 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x78 0x7 0x0 0x78 0x4 0x0 0x0 0x79 0x7 0x0 0x79 0x4 0x0 0x0 0x7a 0x7 0x0 0x7a 0x4 0x0 0x0 0x7b 0x7 0x0 0x7b 0x4 0x0 0x0 0x7b 0x7 0x0 0x7b 0x4 0x0 0x0 0x7c 0x7 0x0 0x7c 0x4 0x0 0x0 0x7d 0x7 0x0 0x7d 0x4 0x0 0x0 0x7e 0x7 0x0 0x7e 0x4 0x0 0x0 0x7f 0x7 0x0 0x7f 0x4 0x0 0x0 0x80 0x7 0x0 0x80 0x4 0x0 0x0 0x81 0x7 0x0 0x81 0x4 0x0 0x0 0x82 0x7 0x0 0x82 0x4 0x0 0x0 0x83 0x7 0x0 0x83 0x4 0x0 0x0 0x84 0x7 0x0 0x84 0x4 0x0 0x0 0x85 0x7 0x0 0x85 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x86 0x7 0x0 0x86 0x4 0x0 0x0 0x87 0x7 0x0 0x87 0x4 0x0 0x0 0x88 0x7 0x0 0x88 0x4 0x0 0x0 0x89 0x7 0x0 0x89 0x4 0x0 0x0 0x8a 0x7 0x0 0x8a 0x4 0x0 0x0 0x8b 0x7 0x0 0x8b 0x4 0x0 0x0 0x8c 0x7 0x0 0x8c 0x4 0x0 0x0 0x8d 0x7 0x0 0x8d 0x4 0x0 0x0 0x8e 0x7 0x0 0x8e 0x4 0x0 0x0 0x8f 0x7 0x0 0x8f 0x4 0x0 0x0 0x90 0x7 0x0 0x90 0x4 0x0 0x0 0x91 0x7 0x0 0x91 0x4 0x0 0x0 0x92 0x7 0x0 0x92 0x4 0x0 0x0 0x93 0x7 0x0 0x93 0x4 0x0 0x0 0x94 0x7 0x0 0x94 0x4 0x0 0x0 0x95 0x7 0x0 0x95 0x4 0x0 0x0 0x96 0x7 0x0 0x96 0x4 0x0 0x0 0x97 0x7 0x0 0x97 0x4 0x0 0x0 0x98 0x7 0x0 0x98 0x4 0x0 0x0 0x99 0x7 0x0 0x99 0x4 0x0 0x0 0x9a 0x7 0x0 0x9a 0x4 0x0 0x0 0x9b 0x7 0x0 0x9b 0x4 0x0 0x0 0x8 0x8 0x0 0x8 0x4 0x0 0x0 0x9 0x8 0x0 0x9 0x4 0x0 0x0 0xa 0x8 0x0 0xa 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xb 0x8 0x0 0xb 0x4 0x0 0x0 0xc 0x8 0x0 0xc 0x4 0x0 0x0 0xd 0x8 0x0 0xd 0x4 0x0 0x0 0xe 0x8 0x0 0xe 0x4 0x0 0x0 0xf 0x8 0x0 0xf 0x4 0x0 0x0 0x10 0x8 0x0 0x10 0x4 0x0 0x0 0x11 0x8 0x0 0x11 0x4 0x0 0x0 0x12 0x8 0x0 0x12 0x4 0x0 0x0 0x13 0x8 0x0 0x13 0x4 0x0 0x0 0x14 0x8 0x0 0x14 0x4 0x0 0x0 0x15 0x8 0x0 0x15 0x4 0x0 0x0 0x16 0x8 0x0 0x16 0x4 0x0 0x0 0x17 0x8 0x0 0x17 0x4 0x0 0x0 0x18 0x8 0x0 0x18 0x4 0x0 0x0 0x19 0x8 0x0 0x19 0x4 0x0 0x0 0x19 0x8 0x0 0x19 0x4 0x0 0x0 0x1a 0x8 0x0 0x1a 0x4 0x0 0x0 0x1b 0x8 0x0 0x1b 0x4 0x0 0x0 0x1c 0x8 0x0 0x1c 0x4 0x0 0x0 0x1d 0x8 0x0 0x1d 0x4 0x0 0x0 0x1e 0x8 0x0 0x1e 0x4 0x0 0x0 0x1f 0x8 0x0 0x1f 0x4 0x0 0x0 0x20 0x8 0x0 0x20 0x4 0x0 0x0 0x21 0x8 0x0 0x21 0x4 0x0 0x0 0x22 0x8 0x0 0x22 0x4 0x0 0x0 0x23 0x8 0x0 0x23 0x4 0x0 0x0 0x24 0x8 0x0 0x24 0x4 0x0 0x0 0x25 0x8 0x0 0x25 0x4 0x0 0x0 0x26 0x8 0x0 0x26 0x4 0x0 0x0 0x27 0x8 0x0 0x27 0x4 0x0 0x0 0x28 0x8 0x0 0x28 0x4 0x0 0x0 0x29 0x8 0x0 0x29 0x4 0x0 0x0 0x2a 0x8 0x0 0x2a 0x4 0x0 0x0 0x2b 0x8 0x0 0x2b 0x4 0x0 0x0 0x2c 0x8 0x0 0x2c 0x4 0x0 0x0 0x2d 0x8 0x0 0x2d 0x4 0x0 0x0 0x2e 0x8 0x0 0x2e 0x4 0x0 0x0 0x2f 0x8 0x0 0x2f 0x4 0x0 0x0 0x30 0x8 0x0 0x30 0x4 0x0 0x0 0x31 0x8 0x0 0x31 0x4 0x0 0x0 0x32 0x8 0x0 0x32 0x4 0x0 0x0 0x33 0x8 0x0 0x33 0x4 0x0 0x0 0x34 0x8 0x0 0x34 0x4 0x0 0x0 0x35 0x8 0x0 0x35 0x4 0x0 0x0 0x36 0x8 0x0 0x36 0x4 0x0 0x0 0x37 0x8 0x0 0x37 0x4 0x0 0x0 0x38 0x8 0x0 0x38 0x4 0x0 0x0 0x39 0x8 0x0 0x39 0x4 0x0 0x0 0x3a 0x8 0x0 0x3a 0x4 0x0 0x0 0x3b 0x8 0x0 0x3b 0x4 0x0 0x0 0x3c 0x8 0x0 0x3c 0x4 0x0 0x0 0x3d 0x8 0x0 0x3d 0x4 0x0 0x0 0x3e 0x8 0x0 0x3e 0x4 0x0 0x0 0x3f 0x8 0x0 0x3f 0x4 0x0 0x0 0x40 0x8 0x0 0x40 0x4 0x0 0x0 0x41 0x8 0x0 0x41 0x4 0x0 0x0 0x42 0x8 0x0 0x42 0x4 0x0 0x0 0x43 0x8 0x0 0x43 0x4 0x0 0x0 0x44 0x8 0x0 0x44 0x4 0x0 0x0 0x45 0x8 0x0 0x45 0x4 0x0 0x0 0x46 0x8 0x0 0x46 0x4 0x0 0x0 0x47 0x8 0x0 0x47 0x4 0x0 0x0 0x48 0x8 0x0 0x48 0x4 0x0 0x0 0x49 0x8 0x0 0x49 0x4 0x0 0x0 0x4a 0x8 0x0 0x4a 0x4 0x0 0x0 0x4b 0x8 0x0 0x4b 0x4 0x0 0x0 0x4c 0x8 0x0 0x4c 0x4 0x0 0x0 0x4d 0x8 0x0 0x4d 0x4 0x0 0x0 0x4e 0x8 0x0 0x4e 0x4 0x0 0x0 0x4f 0x8 0x0 0x4f 0x4 0x0 0x0 0x50 0x8 0x0 0x50 0x4 0x0 0x0 0x51 0x8 0x0 0x51 0x4 0x0 0x0 0x52 0x8 0x0 0x52 0x4 0x0 0x0 0x53 0x8 0x0 0x53 0x4 0x0 0x0 0x54 0x8 0x0 0x54 0x4 0x0 0x0 0x55 0x8 0x0 0x55 0x4 0x0 0x0 0x56 0x8 0x0 0x56 0x4 0x0 0x0 0x57 0x8 0x0 0x57 0x4 0x0 0x0 0x58 0x8 0x0 0x58 0x4 0x0 0x0 0x58 0x8 0x0 0x58 0x4 0x0 0x0 0x59 0x8 0x0 0x59 0x4 0x0 0x0 0x5a 0x8 0x0 0x5a 0x4 0x0 0x0 0x5b 0x8 0x0 0x5b 0x4 0x0 0x0 0x5c 0x8 0x0 0x5c 0x4 0x0 0x0 0x5d 0x8 0x0 0x5d 0x4 0x0 0x0 0x5e 0x8 0x0 0x5e 0x4 0x0 0x0 0x5f 0x8 0x0 0x5f 0x4 0x0 0x0 0x60 0x8 0x0 0x60 0x4 0x0 0x0 0x68 0x8 0x0 0x68 0x4 0x0 0x0 0x69 0x8 0x0 0x69 0x4 0x0 0x0 0x6a 0x8 0x0 0x6a 0x4 0x0 0x0 0x6b 0x8 0x0 0x6b 0x4 0x0 0x0 0x6c 0x8 0x0 0x6c 0x4 0x0 0x0 0x6d 0x8 0x0 0x6d 0x4 0x0 0x0 0x6e 0x8 0x0 0x6e 0x4 0x0 0x0 0x6f 0x8 0x0 0x6f 0x4 0x0 0x0 0x70 0x8 0x0 0x70 0x4 0x0 0x0 0x71 0x8 0x0 0x71 0x4 0x0 0x0 0x72 0x8 0x0 0x72 0x4 0x0 0x0 0x73 0x8 0x0 0x73 0x4 0x0 0x0 0x74 0x8 0x0 0x74 0x4 0x0 0x0 0x75 0x8 0x0 0x75 0x4 0x0 0x0 0x76 0x8 0x0 0x76 0x4 0x0 0x0 0x77 0x8 0x0 0x77 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x78 0x8 0x0 0x78 0x4 0x0 0x0 0x79 0x8 0x0 0x79 0x4 0x0 0x0 0x7a 0x8 0x0 0x7a 0x4 0x0 0x0 0x7b 0x8 0x0 0x7b 0x4 0x0 0x0 0x7b 0x8 0x0 0x7b 0x4 0x0 0x0 0x7c 0x8 0x0 0x7c 0x4 0x0 0x0 0x7d 0x8 0x0 0x7d 0x4 0x0 0x0 0x7e 0x8 0x0 0x7e 0x4 0x0 0x0 0x7f 0x8 0x0 0x7f 0x4 0x0 0x0 0x80 0x8 0x0 0x80 0x4 0x0 0x0 0x81 0x8 0x0 0x81 0x4 0x0 0x0 0x82 0x8 0x0 0x82 0x4 0x0 0x0 0x83 0x8 0x0 0x83 0x4 0x0 0x0 0x84 0x8 0x0 0x84 0x4 0x0 0x0 0x85 0x8 0x0 0x85 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x86 0x8 0x0 0x86 0x4 0x0 0x0 0x87 0x8 0x0 0x87 0x4 0x0 0x0 0x88 0x8 0x0 0x88 0x4 0x0 0x0 0x89 0x8 0x0 0x89 0x4 0x0 0x0 0x8a 0x8 0x0 0x8a 0x4 0x0 0x0 0x8b 0x8 0x0 0x8b 0x4 0x0 0x0 0x8c 0x8 0x0 0x8c 0x4 0x0 0x0 0x8d 0x8 0x0 0x8d 0x4 0x0 0x0 0x8e 0x8 0x0 0x8e 0x4 0x0 0x0 0x8f 0x8 0x0 0x8f 0x4 0x0 0x0 0x90 0x8 0x0 0x90 0x4 0x0 0x0 0x91 0x8 0x0 0x91 0x4 0x0 0x0 0x92 0x8 0x0 0x92 0x4 0x0 0x0 0x93 0x8 0x0 0x93 0x4 0x0 0x0 0x94 0x8 0x0 0x94 0x4 0x0 0x0 0x95 0x8 0x0 0x95 0x4 0x0 0x0 0x96 0x8 0x0 0x96 0x4 0x0 0x0 0x97 0x8 0x0 0x97 0x4 0x0 0x0 0x98 0x8 0x0 0x98 0x4 0x0 0x0 0x99 0x8 0x0 0x99 0x4 0x0 0x0 0x9a 0x8 0x0 0x9a 0x4 0x0 0x0 0x9b 0x8 0x0 0x9b 0x4>;
#address-cells = <0x2>;
#size-cells = <0x1>;
linux,phandle = <0x23>;
phandle = <0x23>;
apu: apu@0xFD5C0000 {
compatible = "xlnx,apu";
#gpio-cells = <0x1>;
reg = <0x0 0xfd5c0000 0x1000>;
cpu0 = <0x9>;
cpu1 = <0xa>;
cpu2 = <0xb>;
cpu3 = <0xc>;
gpios = <0xd 0x1 0x0 0xd 0x2 0x0 0xd 0x3 0x0 0xd 0x4 0x0>;
linux,phandle = <0x64>;
phandle = <0x64>;
};
rpu_ctrl: rpu_control@0xFF9A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,rpu-control";
reg = <0x0 0xff9a0000 0x400>;
gpio-controller;
atcm1-for-rpu0 = <0xe>;
btcm1-for-rpu0 = <0xf>;
icache-for-rpu1 = <0x10>;
dcache-for-rpu1 = <0x11>;
gic-for-rpu = <0x7>;
gpios = <0x4 0x6 0x4 0x7 0xd 0x5 0xd 0x6>;
ddr-mem-for-rpu = <0x12>;
linux,phandle = <0x6e>;
phandle = <0x6e>;
};
pmu_global: pmu_global@0xFFD80000 {
interrupt-parent = <0x13>;
interrupts = <0x17 0x0 0x18 0x0 0x1a 0x0 0x1b 0x0 0x1c 0x0 0x1d 0x0>;
compatible = "xlnx,pmu_global";
reg = <0x0 0xffd80000 0x40000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x1a>;
gpios = <0x14 0x3>;
gpio-names = "mb_sleep";
error-out-gpios = <0x15 0x1d 0x0 0x15 0x1e 0x0>;
pwr-state-gpios = <0x16 0x1 0x16 0x2 0x16 0x3 0x16 0x4 0x16 0x5 0x16 0x6 0x17 0x0 0x16 0xa 0x17 0x1 0x17 0x2 0x16 0x9 0x16 0x9 0x16 0x14 0x16 0x15 0x16 0x16 0x16 0x17 0x16 0xc 0x16 0xd 0x16 0xe 0x16 0xf 0x16 0x7 0x16 0x8 0x16 0x1c>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
apu_ipi: apu_ipi@0xFF300000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x23 0x4 0x0 0x0 0x0 0x6 0x0 0x23 0x4 0x0 0x0 0x0 0x7 0x0 0x23 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff300000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x0 0x0 0x19 0x0 0x0 0x1a 0x0 0x0 0x1b 0x0 0x0 0x1c 0x0 0x0 0x1d 0x0 0x0 0x1e 0x0 0x0 0x1f 0x0 0x0 0x20 0x0 0x0 0x21 0x0 0x0 0x22 0x0 0x0>;
gpios = <0x18 0x20 0x0 0x19 0x20 0x0 0x1a 0x20 0x0 0x1b 0x20 0x0 0x1c 0x20 0x0 0x1d 0x20 0x0 0x1e 0x20 0x0 0x1f 0x20 0x0 0x20 0x20 0x0 0x21 0x20 0x0 0x22 0x20 0x0>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
rpu_0_ipi: rpu_0_ipi@0xFF310000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x21 0x4 0x0 0x0 0x0 0x6 0x0 0x21 0x4 0x0 0x0 0x0 0x7 0x0 0x21 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff310000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x8 0x0 0x19 0x8 0x0 0x1a 0x8 0x0 0x1b 0x8 0x0 0x1c 0x8 0x0 0x1d 0x8 0x0 0x1e 0x8 0x0 0x1f 0x8 0x0 0x20 0x8 0x0 0x21 0x8 0x0 0x22 0x8 0x0>;
gpios = <0x18 0x28 0x0 0x19 0x28 0x0 0x1a 0x28 0x0 0x1b 0x28 0x0 0x1c 0x28 0x0 0x1d 0x28 0x0 0x1e 0x28 0x0 0x1f 0x28 0x0 0x20 0x28 0x0 0x21 0x28 0x0 0x22 0x28 0x0>;
linux,phandle = <0x19>;
phandle = <0x19>;
};
rpu_1_ipi: rpu_1_ipi@0xFF320000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x22 0x4 0x0 0x0 0x0 0x6 0x0 0x22 0x4 0x0 0x0 0x0 0x7 0x0 0x22 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff320000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x9 0x0 0x19 0x9 0x0 0x1a 0x9 0x0 0x1b 0x9 0x0 0x1c 0x9 0x0 0x1d 0x9 0x0 0x1e 0x9 0x0 0x1f 0x9 0x0 0x20 0x9 0x0 0x21 0x9 0x0 0x22 0x9 0x0>;
gpios = <0x18 0x29 0x0 0x19 0x29 0x0 0x1a 0x29 0x0 0x1b 0x29 0x0 0x1c 0x29 0x0 0x1d 0x29 0x0 0x1e 0x29 0x0 0x1f 0x29 0x0 0x20 0x29 0x0 0x21 0x29 0x0 0x22 0x29 0x0>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
pmu_0_ipi: pmu_0_ipi@0xFF330000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x13 0x0>;
reg = <0x0 0xff330000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x10 0x0 0x19 0x10 0x0 0x1a 0x10 0x0 0x1b 0x10 0x0 0x1c 0x10 0x0 0x1d 0x10 0x0 0x1e 0x10 0x0 0x1f 0x10 0x0 0x20 0x10 0x0 0x21 0x10 0x0 0x22 0x10 0x0>;
gpios = <0x18 0x30 0x0 0x19 0x30 0x0 0x1a 0x30 0x0 0x1b 0x30 0x0 0x1c 0x30 0x0 0x1d 0x30 0x0 0x1e 0x30 0x0 0x1f 0x30 0x0 0x20 0x30 0x0 0x21 0x30 0x0 0x22 0x30 0x0>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
pmu_1_ipi: pmu_1_ipi@0xFF331000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x14 0x0>;
reg = <0x0 0xff331000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x11 0x0 0x19 0x11 0x0 0x1a 0x11 0x0 0x1b 0x11 0x0 0x1c 0x11 0x0 0x1d 0x11 0x0 0x1e 0x11 0x0 0x1f 0x11 0x0 0x20 0x11 0x0 0x21 0x11 0x0 0x22 0x11 0x0>;
gpios = <0x18 0x31 0x0 0x19 0x31 0x0 0x1a 0x31 0x0 0x1b 0x31 0x0 0x1c 0x31 0x0 0x1d 0x31 0x0 0x1e 0x31 0x0 0x1f 0x31 0x0 0x20 0x31 0x0 0x21 0x31 0x0 0x22 0x31 0x0>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
pmu_2_ipi: pmu_2_ipi@0xFF332000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x15 0x0>;
reg = <0x0 0xff332000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x12 0x0 0x19 0x12 0x0 0x1a 0x12 0x0 0x1b 0x12 0x0 0x1c 0x12 0x0 0x1d 0x12 0x0 0x1e 0x12 0x0 0x1f 0x12 0x0 0x20 0x12 0x0 0x21 0x12 0x0 0x22 0x12 0x0>;
gpios = <0x18 0x32 0x0 0x19 0x32 0x0 0x1a 0x32 0x0 0x1b 0x32 0x0 0x1c 0x32 0x0 0x1d 0x32 0x0 0x1e 0x32 0x0 0x1f 0x32 0x0 0x20 0x32 0x0 0x21 0x32 0x0 0x22 0x32 0x0>;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
pmu_3_ipi: pmu_3_ipi@0xFF333000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupt-parent = <0x13>;
interrupts = <0x16 0x0>;
reg = <0x0 0xff333000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x13 0x0 0x19 0x13 0x0 0x1a 0x13 0x0 0x1b 0x13 0x0 0x1c 0x13 0x0 0x1d 0x13 0x0 0x1e 0x13 0x0 0x1f 0x13 0x0 0x20 0x13 0x0 0x21 0x13 0x0 0x22 0x13 0x0>;
gpios = <0x18 0x33 0x0 0x19 0x33 0x0 0x1a 0x33 0x0 0x1b 0x33 0x0 0x1c 0x33 0x0 0x1d 0x33 0x0 0x1e 0x33 0x0 0x1f 0x33 0x0 0x20 0x33 0x0 0x21 0x33 0x0 0x22 0x33 0x0>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
pl_0_ipi: pl_0_ipi@0xFF340000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x1d 0x4 0x0 0x0 0x0 0x6 0x0 0x1d 0x4 0x0 0x0 0x0 0x7 0x0 0x1d 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff340000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x18 0x0 0x19 0x18 0x0 0x1a 0x18 0x0 0x1b 0x18 0x0 0x1c 0x18 0x0 0x1d 0x18 0x0 0x1e 0x18 0x0 0x1f 0x18 0x0 0x20 0x18 0x0 0x21 0x18 0x0 0x22 0x18 0x0>;
gpios = <0x18 0x34 0x0 0x19 0x34 0x0 0x1a 0x34 0x0 0x1b 0x34 0x0 0x1c 0x34 0x0 0x1d 0x34 0x0 0x1e 0x34 0x0 0x1f 0x34 0x0 0x20 0x34 0x0 0x21 0x34 0x0 0x22 0x34 0x0>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
pl_1_ipi: pl_1_ipi@0xFF350000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x1e 0x4 0x0 0x0 0x0 0x6 0x0 0x1e 0x4 0x0 0x0 0x0 0x7 0x0 0x1e 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff350000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x19 0x0 0x19 0x19 0x0 0x1a 0x19 0x0 0x1b 0x19 0x0 0x1c 0x19 0x0 0x1d 0x19 0x0 0x1e 0x19 0x0 0x1f 0x19 0x0 0x20 0x19 0x0 0x21 0x19 0x0 0x22 0x19 0x0>;
gpios = <0x18 0x35 0x0 0x19 0x35 0x0 0x1a 0x35 0x0 0x1b 0x35 0x0 0x1c 0x35 0x0 0x1d 0x35 0x0 0x1e 0x35 0x0 0x1f 0x35 0x0 0x20 0x35 0x0 0x21 0x35 0x0 0x22 0x35 0x0>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
pl_2_ipi: pl_2_ipi@0xFF360000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x1f 0x4 0x0 0x0 0x0 0x6 0x0 0x1f 0x4 0x0 0x0 0x0 0x7 0x0 0x1f 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff360000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x1a 0x0 0x19 0x1a 0x0 0x1a 0x1a 0x0 0x1b 0x1a 0x0 0x1c 0x1a 0x0 0x1d 0x1a 0x0 0x1e 0x1a 0x0 0x1f 0x1a 0x0 0x20 0x1a 0x0 0x21 0x1a 0x0 0x22 0x1a 0x0>;
gpios = <0x18 0x36 0x0 0x19 0x36 0x0 0x1a 0x36 0x0 0x1b 0x36 0x0 0x1c 0x36 0x0 0x1d 0x36 0x0 0x1e 0x36 0x0 0x1f 0x36 0x0 0x20 0x36 0x0 0x21 0x36 0x0 0x22 0x36 0x0>;
linux,phandle = <0x21>;
phandle = <0x21>;
};
pl_3_ipi: pl_3_ipi@0xFF370000 {
compatible = "xlnx,zynqmp_ipi";
gpio-controller;
#gpio-cells = <0x2>;
interrupts = <0x0>;
interrupt-map = <0x0 0x0 0x0 0x8 0x0 0x20 0x4 0x0 0x0 0x0 0x6 0x0 0x20 0x4 0x0 0x0 0x0 0x7 0x0 0x20 0x4>;
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
reg = <0x0 0xff370000 0x1000>;
num-gpios = <0x40>;
interrupt-gpios = <0x18 0x1b 0x0 0x19 0x1b 0x0 0x1a 0x1b 0x0 0x1b 0x1b 0x0 0x1c 0x1b 0x0 0x1d 0x1b 0x0 0x1e 0x1b 0x0 0x1f 0x1b 0x0 0x20 0x1b 0x0 0x21 0x1b 0x0 0x22 0x1b 0x0>;
gpios = <0x18 0x37 0x0 0x19 0x37 0x0 0x1a 0x37 0x0 0x1b 0x37 0x0 0x1c 0x37 0x0 0x1d 0x37 0x0 0x1e 0x37 0x0 0x1f 0x37 0x0 0x20 0x37 0x0 0x21 0x37 0x0 0x22 0x37 0x0>;
linux,phandle = <0x22>;
phandle = <0x22>;
};
xlnx_zynqmp_csu_core: csu_core {
compatible = "xlnx,zynqmp-csu-core";
reg = <0x0 0xffca0000 0x100>;
};
lpd_slcr_0: zynqmp_lpd_slcr@0xFF410000 {
compatible = "xlnx,lpd-slcr";
reg = <0x0 0xff410000 0x9000>;
gic-for-rpu = <0x7>;
gic-for-apu = <0x6>;
};
lpd_slcr_secure: zynqmp_lpd_slcr_secure@0xFF4B0000 {
compatible = "xlnx.lpd-slcr-secure";
reg = <0x0 0xff4b0000 0x38>;
};
xppu: xppu@0 {
compatible = "xlnx,xppu";
reg-extended = <0x23 0x0 0xff980000 0x10000 0x24 0x0 0xff990000 0x0 0x1000 0x3 0x24 0x0 0xff000000 0x0 0xfc0000 0x2 0x24 0x0 0xfe000000 0x0 0x1000000 0x2 0x24 0x0 0xc0000000 0x0 0x20000000 0x2>;
mr = <0x23>;
interrupts = <0x58>;
};
smmu0: smmu0@0xFD800000 {
compatible = "arm,mmu-500";
reg-extended = <0x23 0x0 0xfd800000 0x10000 0x25 0x0 0x0 0xffffffff 0xffffffff 0x26 0x0 0x0 0xffffffff 0xffffffff 0x27 0x0 0x0 0xffffffff 0xffffffff 0x28 0x0 0x0 0xffffffff 0xffffffff 0x29 0x0 0x0 0xffffffff 0xffffffff 0x2a 0x0 0x0 0xffffffff 0xffffffff>;
interrupt-parent = <0x2b>;
interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11>;
dma = <0x2c>;
mr-0 = <0x2c>;
mr-1 = <0x2c>;
mr-2 = <0x2c>;
mr-3 = <0x2d>;
mr-4 = <0x2e>;
mr-5 = <0x2f>;
};
smmu_reg: smmu0@0xFD5F0000 {
compatible = "xlnx,smmu-reg";
reg = <0x0 0xfd5f0000 0x1000>;
interrupt-controller;
interrupts = <0x9b>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
cci_mem1: cci_mem1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x30>;
phandle = <0x30>;
};
cci_mem2: cci_mem2@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x31>;
phandle = <0x31>;
};
cci: cci@0xFD6E0000 {
compatible = "arm,cci-400";
gpio-controller;
#gpio-cells = <0x1>;
reg-extended = <0x23 0x0 0xfd6e0000 0xf000 0x2c 0x0 0x0 0xffffffff 0xffffffff 0x2>;
M0 = <0x24>;
M1 = <0x30>;
M2 = <0x31>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
ocm_xmpu: ocm_xmpu@0xFFA70000 {
compatible = "xlnx,xmpu";
interrupts = <0x58>;
reg-extended = <0x23 0x0 0xffa70000 0x1000 0x23 0x0 0xfffc0000 0x40000>;
protected-mr = <0x32>;
mr-0 = <0x23>;
protected-base = <0xfffc0000>;
};
ddr_xmpu0: ddr_xmpu0_@_DDR_XMPU0_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd000000 0x1000 0x33 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x33>;
};
ddr_xmpu1: ddr_xmpu1_@_DDR_XMPU1_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd010000 0x1000 0x30 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x30>;
gpios = <0x34 0x0>;
};
ddr_xmpu2: ddr_xmpu2_@_DDR_XMPU2_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd020000 0x1000 0x31 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x31>;
gpios = <0x34 0x1>;
};
ddr_xmpu3: ddr_xmpu3_@_DDR_XMPU3_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd030000 0x1000 0x2d 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2d>;
};
ddr_xmpu4: ddr_xmpu4_@_DDR_XMPU4_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd040000 0x1000 0x2e 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2e>;
};
ddr_xmpu5: ddr_xmpu5_@_DDR_XMPU5_CFG {
compatible = "xlnx,xmpu";
interrupts = <0x86>;
reg-extended = <0x23 0x0 0xfd050000 0x1000 0x2f 0x0 0x0 0x0 0x80000000 0x0>;
align = <0x1>;
protected-mr = <0x1>;
protected-base = <0x0>;
mr-0 = <0x2f>;
};
ps7_afi_0: ps7-afi@0xFD360000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd360000 0x1000>;
};
ps7_afi_1: ps7-afi@0xFD370000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd370000 0x1000>;
};
ps7_afi_2: ps7-afi@0xFD380000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd380000 0x1000>;
};
ps7_afi_3: ps7-afi@0xFD390000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd390000 0x1000>;
};
ps7_afi_4: ps7-afi@0xFD3A0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3a0000 0x1000>;
};
ps7_afi_5: ps7-afi@0xFD3B0000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0x0 0xfd3b0000 0x1000>;
};
gdma0_mr: gdma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma0_mattr: gdma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e8>;
linux,phandle = <0x35>;
phandle = <0x35>;
};
gdma0: gdma0@0xFD500000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd500000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7c>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x35>;
};
gdma1_mr: gdma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma1_mattr: gdma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14e9>;
linux,phandle = <0x36>;
phandle = <0x36>;
};
gdma1: gdma1@0xFD510000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd510000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7d>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x36>;
};
gdma2_mr: gdma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma2_mattr: gdma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ea>;
linux,phandle = <0x37>;
phandle = <0x37>;
};
gdma2: gdma2@0xFD520000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd520000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7e>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x37>;
};
gdma3_mr: gdma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma3_mattr: gdma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14eb>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
gdma3: gdma3@0xFD530000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd530000 0x1000>;
bus-width = <0x80>;
interrupts = <0x7f>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x38>;
};
gdma4_mr: gdma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma4_mattr: gdma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ec>;
linux,phandle = <0x39>;
phandle = <0x39>;
};
gdma4: gdma4@0xFD540000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd540000 0x1000>;
bus-width = <0x80>;
interrupts = <0x80>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x39>;
};
gdma5_mr: gdma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma5_mattr: gdma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ed>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
gdma5: gdma5@0xFD550000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd550000 0x1000>;
bus-width = <0x80>;
interrupts = <0x81>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x3a>;
};
gdma6_mr: gdma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma6_mattr: gdma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ee>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
gdma6: gdma6@0xFD560000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd560000 0x1000>;
bus-width = <0x80>;
interrupts = <0x82>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x3b>;
};
gdma7_mr: gdma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
gdma7_mattr: gdma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x14ef>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
gdma7: gdma7@0xFD570000 {
compatible = "xlnx,zdma";
reg = <0x0 0xfd570000 0x1000>;
bus-width = <0x80>;
interrupts = <0x83>;
#stream-id-cells = <0x1>;
dma = <0x2a>;
memattr = <0x3c>;
};
crf: crf@0xFD1A0000 {
compatible = "xlnx,zynqmp_crf";
reg = <0x0 0xfd1a0000 0x110>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x63>;
phandle = <0x63>;
};
xlnx_dpdma: axidpdma@0xFD4C0000 {
compatible = "xlnx,axi-dpdma-1.0";
reg = <0x0 0xfd4c0000 0x1000>;
clocks = <0x3d>;
clock-names = "axi_clk";
xlnx,axi-clock-freq = <0xbebc200>;
interrupts = <0x7a>;
dma = <0x24>;
dma-channels = <0x6>;
#dma-cells = <0x1>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
dma-video0channel@fe4c0000 {
compatible = "xlnx,video0";
};
dma-video1channel@fe4c0000 {
compatible = "xlnx,video1";
};
dma-video2channel@fe4c0000 {
compatible = "xlnx,video2";
};
dma-graphicschannel@fe4c0000 {
compatible = "xlnx,graphics";
};
dma-audio0channel@fe4c0000 {
compatible = "xlnx,audio0";
};
dma-audio1channel@fe4c0000 {
compatible = "xlnx,audio1";
};
};
dp_aclk: clock0 {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
clock-accuracy = <0x64>;
linux,phandle = <0x3e>;
phandle = <0x3e>;
};
dummy_clk: clock1 {
compatible = "dummy-clk";
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
xlnx_dp_sub: dp_sub@fd4aa000 {
compatible = "xlnx,v-dp-sub-1.6";
reg = <0x0 0xfd4aa000 0x4000>;
xlnx,output-fmt = "rgb";
linux,phandle = <0x40>;
phandle = <0x40>;
};
xlnx_dp: dp@0xFD4A0000 {
compatible = "xlnx,v-dp-4.1";
reg = <0x0 0xfd4a0000 0x1000>;
interrupts = <0x77>;
clock-names = "aclk";
clocks = <0x3e>;
dpdma = <0x3f>;
xlnx,dp-version = "v1.2";
xlnx,max-lanes = <0x2>;
xlnx,max-link-rate = <0x278d0>;
xlnx,max-bpc = <0x10>;
xlnx,max-pclock = <0x7530>;
xlnx,enable-ycrcb;
xlnx,colormetry = "rgb";
xlnx,bpc = <0x8>;
xlnx,dp-sub = <0x40>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
xilinx_drm {
compatible = "xlnx,drm";
xlnx,encoder-slave = <0x41>;
clocks = <0x3d 0x0>;
xlnx,connector-type = "DisplayPort";
xlnx,dp-sub = <0x40>;
planes {
xlnx,pixel-format = "rgb565";
plane0 {
dmas = <0x3f 0x3>;
dma-names = "dma";
};
plane1 {
dmas = <0x3f 0x0>;
dma-names = "dma";
};
};
};
ddrphy_0: ddr-phy@0xFD080000 {
compatible = "xlnx,zynqmp-ddr-phy";
reg = <0x0 0xfd080000 0x2000>;
};
ddrc_0: memory-controller@0xFD070000 {
compatible = "xlnx,zynqmp-ddrc";
reg = <0x0 0xfd070000 0x1000>;
};
swdt@0xFF150000 {
compatible = "xlnx,swdt";
reg = <0x0 0xff150000 0x10>;
pclk = <0xf4240>;
};
wdt@0xFD4D0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xfd4d0000 0x10>;
pclk = <0xf4240>;
};
csu_wdt@0xFFCB0000 {
compatible = "xlnx,swdt";
reg = <0x0 0xffcb0000 0x10>;
pclk = <0xf4240>;
};
iou_slcr_0: zynqmp_iou_slcr@0xFF180000 {
compatible = "xilinx,zynqmp-iou-slcr";
reg = <0x0 0xff180000 0x1000>;
gpio-controller;
#gpio-cells = <0x2>;
mio-bank0-1.8v = <0x1>;
mio-bank1-1.8v = <0x1>;
mio-bank2-1.8v = <0x1>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
ps7_can_0: ps7-can@0xFF060000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x17>;
reg = <0x0 0xff060000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
ps7_can_1: ps7-can@0xFF070000 {
clock-names = "ref_clk", "aper_clk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-can-1.00.a";
interrupts = <0x18>;
reg = <0x0 0xff070000 0x1000>;
xlnx,can-clk-freq-hz = <0x5f5e100>;
};
serdes_0: serdes@0xFD400000 {
compatible = "xlnx,zynqmp-serdes";
reg = <0x0 0xfd400000 0x20000>;
};
gem0: ethernet@0xFF0B0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x39 0x39>;
dma = <0x27>;
memattr = <0x43>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0b0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem1: ethernet@0xFF0C0000 {
#stream-id-cells = <0x1>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3b 0x3b>;
dma = <0x27>;
memattr = <0x44>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0c0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem2: ethernet@0xFF0D0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3d 0x3d>;
dma = <0x27>;
memattr = <0x45>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0d0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
};
gem3: ethernet@0xFF0E0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "hclk", "pclk";
clocks = <0x42 0x42>;
compatible = "xlnx,ps7-ethernet-1.00.a", "cdns,gem";
interrupts = <0x3f 0x3f>;
dma = <0x27>;
memattr = <0x46>;
local-mac-address = [00 0a 35 00 02 90];
reg = <0x0 0xff0e0000 0x1000>;
num-priority-queues = <0x2>;
revision = <0x40070106>;
mdio = <0x47>;
};
sata: ahci@0xFD0C0000 {
compatible = "generic-ahci", "sysbus-ahci";
reg = <0x0 0xfd0c0000 0x2000>;
interrupts = <0x85>;
num-ports = <0x2>;
dma = <0x24>;
};
lpd_gpv@0xFE100000 {
compatible = "xlnx,lpd-gpv";
reg = <0x0 0xfe100000 0xc8130>;
};
usb3_0: usb3@0xFE200000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe200000 0x4000>;
interrupts = <0x4b>;
gpios = <0x15 0x7 0x0 0x16 0x7>;
gpio-names = "wake", "pwr_cntrl";
};
usb3_1: usb3@0xFE300000 {
compatible = "qemu,irq-test-component";
reg = <0x0 0xfe300000 0x4000>;
interrupts = <0x4c>;
gpios = <0x15 0x8 0x0 0x16 0x8>;
gpio-names = "wake", "pwr_cntrl";
};
nand: arasan_nfc@0xFF100000 {
compatible = "arasan,nfc";
reg = <0x0 0xff100000 0x1000>;
interrupts = <0xe>;
dma = <0x24>;
has-mdma = <0x1>;
nand {
#address-cells = <0x1>;
#size-cells = <0x1>;
partition@0 {
label = "all";
reg = <0x0 0x100000>;
};
};
};
psu_gpio: psu_gpio@0xFF0A0000 {
#gpio-cells = <0x1>;
compatible = "xlnx,zynqmp-gpio";
gpio-controller;
interrupts = <0x10>;
reg = <0x0 0xff0a0000 0x1000>;
};
qspi_dma_0: csu_dma@0xFF0F0800 {
compatible = "zynqmp,csu-dma";
interrupts = <0xf>;
#stream-id-cells = <0x1>;
reg = <0x0 0xff0f0800 0x800>;
dma = <0x27>;
memattr = <0x48>;
is-dst = <0x1>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
ps7_qspi_0: ps7-qspi@0xFF0F0000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
#bus-cells = <0x1>;
clock-names = "ref_clk", "pclk";
compatible = "xlnx,usmp-gqspi", "cdns,spi-r1p6";
stream-connected-dma = <0x49>;
clocks = <0x42 0x42>;
dma = <0x24>;
interrupts = <0xf>;
num-ss-bits = <0x2>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
speed-hz = <0x989680>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-clk-freq-hz = <0xbebc200>;
xlnx,qspi-mode = <0x2>;
qspi_flash_lcs_lb: qspi_flash_lcs_lb@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
qspi_flash_lcs_lb@0x00000000 {
label = "qspi_flash_lcs_lb";
reg = <0x0 0x2000000>;
};
};
qspi_flash_ucs_ub: qspi_flash_ucs_ub@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "n25q512a11", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x1>;
qspi_flash_ucs_ub@0x00000000 {
label = "qspi_flash_ucs_ub";
reg = <0x0 0x2000000>;
};
};
};
sd_clk: sd_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
ps7_sd_0: ps7-sdio@0xFF160000 {
clock-names = "ref_clk", "aper_clk";
clock-frequency = <0x17d7840>;
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x4a 0x4a>;
drive-index = <0x0>;
interrupts = <0x30>;
reg = <0x0 0xff160000 0x1000>;
dma = <0x24>;
gpios = <0x4b 0x0 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x0>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_sd_1: ps7-sdio@0xFF170000 {
clock-names = "ref_clk", "aper_clk";
compatible = "xilinx,zynqmp-sdhci", "generic-sdhci";
clocks = <0x42 0x42>;
drive-index = <0x1>;
interrupts = <0x31>;
reg = <0x0 0xff170000 0x1000>;
dma = <0x24>;
gpios = <0x4b 0x1 0x0>;
gpio-names = "SLOTTYPE";
is-mmc = <0x1>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
xlnx,sdio-clk-freq-hz = <0x2faf080>;
};
ps7_spi_0: ps7-spi@0xFF040000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x42 0x42>;
compatible = "cdns,spi-r1p6";
interrupts = <0x13>;
num-ss-bits = <0x4>;
reg = <0x0 0xff040000 0x1000>;
spi0_flash0: spi0_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi0_flash0@0x00000000 {
label = "spi0_flash0";
reg = <0x0 0x100000>;
};
};
spi0_flash1: spi0_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi0_flash1@0x00000000 {
label = "spi0_flash1";
reg = <0x0 0x100000>;
};
};
spi0_flash2: spi0_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi0_flash2@0x00000000 {
label = "spi0_flash2";
reg = <0x0 0x100000>;
};
};
spi0_flash3: spi0_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi0_flash3@0x00000000 {
label = "spi0_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_spi_1: ps7-spi@0xFF050000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clock-names = "ref_clk", "pclk";
clocks = <0x42 0x42>;
compatible = "cdns,spi-r1p6";
interrupts = <0x14>;
num-ss-bits = <0x4>;
reg = <0x0 0xff050000 0x1000>;
spi1_flash0: spi1_flash0@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x0 0x0>;
spi1_flash0@0x00000000 {
label = "spi1_flash0";
reg = <0x0 0x100000>;
};
};
spi1_flash1: spi1_flash1@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x1 0x0>;
spi1_flash1@0x00000000 {
label = "spi1_flash1";
reg = <0x0 0x100000>;
};
};
spi1_flash2: spi1_flash2@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x2 0x0>;
spi1_flash2@0x00000000 {
label = "spi1_flash2";
reg = <0x0 0x100000>;
};
};
spi1_flash3: spi1_flash3@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
#bus-cells = <0x1>;
compatible = "sst25wf080", "st,m25p80";
spi-max-frequency = <0x2faf080>;
reg = <0x3 0x0>;
spi1_flash3@0x00000000 {
label = "spi1_flash3";
reg = <0x0 0x100000>;
};
};
};
ps7_ttc_0: ps7-ttc@0xFF110000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x24 0x25 0x26>;
reg = <0x0 0xff110000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_1: ps7-ttc@0xFF120000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x27 0x28 0x29>;
reg = <0x0 0xff120000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_2: ps7-ttc@0xFF130000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2a 0x2b 0x2c>;
reg = <0x0 0xff130000 0x1000>;
timer-width = <0x20>;
};
ps7_ttc_3: ps7-ttc@0xFF140000 {
clocks = <0x42>;
compatible = "xlnx,ps7-ttc-1.00.a";
interrupts = <0x2d 0x2e 0x2f>;
reg = <0x0 0xff140000 0x1000>;
timer-width = <0x20>;
};
uart_clk: uart_clk {
#clock-cells = <0x0>;
clock-frequency = <0x17d7840>;
compatible = "fixed-clock";
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
ps7_uart_0: serial@0xFF000000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x15>;
port-number = <0x1>;
reg = <0x0 0xff000000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x4c 0x4c>;
ttrig-polarity = <0x1>;
};
ps7_uart_1: serial@0xFF010000 {
compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
current-speed = <0x1c200>;
interrupts = <0x16>;
port-number = <0x0>;
reg = <0x0 0xff010000 0x1000>;
xlnx,has-modem = <0x0>;
xlnx,uart-clk-freq-hz = <0x2faf080>;
clock-names = "uart_clk", "pclk";
clocks = <0x4c 0x4c>;
ttrig-polarity = <0x1>;
status = "disabled";
};
ocm_ctrl0: ocm_ctrl@0xFF960000 {
compatible = "xlnx,zynqmp-ocmc";
memsize = <0x40000>;
reg = <0x0 0xff960000 0x1000>;
};
ocm_mem_ctrl_0: ocm_mem_ctrl_0@0 {
compatible = "qemu,memory-controller";
mr = <0x4d>;
gpios = <0x16 0x10 0x16 0xc>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
ocm_mem_ctrl_1: ocm_mem_ctrl_1@1 {
compatible = "qemu,memory-controller";
mr = <0x4e>;
gpios = <0x16 0x11 0x16 0xd>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
ocm_mem_ctrl_2: ocm_mem_ctrl_2@2 {
compatible = "qemu,memory-controller";
mr = <0x4f>;
gpios = <0x16 0x12 0x16 0xe>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
ocm_mem_ctrl_3: ocm_mem_ctrl_3@3 {
compatible = "qemu,memory-controller";
mr = <0x50>;
gpios = <0x16 0x13 0x16 0xf>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
adma0_mr: adma0mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma0_mattr: adma0mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x868>;
linux,phandle = <0x51>;
phandle = <0x51>;
};
adma0: adma0@0xFFA80000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa80000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4d>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x51>;
};
adma1_mr: adma1mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma1_mattr: adma1mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x869>;
linux,phandle = <0x52>;
phandle = <0x52>;
};
adma1: adma1@0xFFA90000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffa90000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4e>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x52>;
};
adma2_mr: adma2mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma2_mattr: adma2mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86a>;
linux,phandle = <0x53>;
phandle = <0x53>;
};
adma2: adma2@0xFFAA0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaa0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x4f>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x53>;
};
adma3_mr: adma3mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma3_mattr: adma3mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86b>;
linux,phandle = <0x54>;
phandle = <0x54>;
};
adma3: adma3@0xFFAB0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffab0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x50>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x54>;
};
adma4_mr: adma4mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma4_mattr: adma4mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86c>;
linux,phandle = <0x55>;
phandle = <0x55>;
};
adma4: adma4@0xFFAC0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffac0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x51>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x55>;
};
adma5_mr: adma5mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma5_mattr: adma5mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86d>;
linux,phandle = <0x56>;
phandle = <0x56>;
};
adma5: adma5@0xFFAD0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffad0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x52>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x56>;
};
adma6_mr: adma6mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma6_mattr: adma6mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86e>;
linux,phandle = <0x57>;
phandle = <0x57>;
};
adma6: adma6@0xFFAE0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffae0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x53>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x57>;
};
adma7_mr: adma7mr {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "simple-bus";
ranges;
};
adma7_mattr: adma7mattr {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x86f>;
linux,phandle = <0x58>;
phandle = <0x58>;
};
adma7: adma7@0xFFAF0000 {
compatible = "xlnx,zdma";
reg = <0x0 0xffaf0000 0x1000>;
bus-width = <0x40>;
interrupts = <0x54>;
#stream-id-cells = <0x1>;
dma = <0x27>;
memattr = <0x58>;
};
crl: crl@0xFF5E0000 {
compatible = "xlnx,zynqmp-crl";
reg = <0x0 0xff5e0000 0x1000>;
gpio-controller;
#gpio-cells = <0x1>;
num-gpios = <0x3>;
gpios = <0x4 0x1a>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
gic_proxy: gic_proxy@0xff418000 {
#interrupt-cells = <0x3>;
reg = <0x0 0xff418000 0x100>;
compatible = "xlnx,zynqmp-gicp";
interrupt-controller;
gpios = <0x15 0x11 0x0>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
zynqmp_anms: zynqmp_anms@0xFFA50000 {
compatible = "xlnx,zynqmp_ams";
reg = <0x0 0xffa50000 0x68>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_ps: zynqmp_sysmon_ps@0xFFA50800 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50800 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
zynqmp_sysmon_pl: zynqmp_sysmon_pl@0xFFA50C00 {
compatible = "xlnx,zynqmp_sysmon";
reg = <0x0 0xffa50c00 0x200>;
gpio-controller;
#gpio-cells = <0x2>;
};
dummy_gpio: dummy_gpio@0 {
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
cxtsgen: cxtsgen@0xFF250000 {
compatible = "arm.generic-timer";
reg = <0x0 0xff260000 0x1000>;
};
ps_reset@0 {
compatible = "qemu,reset-device";
gpios = <0x5 0x2 0x4 0x3>;
};
pcie_attrib: pcie_attrib@0xFD480000 {
compatible = "xlnx.nwl-pcie-attrib";
reg = <0x0 0xfd480000 0x1000>;
interrupts = <0x76>;
};
pcie_main: pcie_main@0xFD0E0000 {
compatible = "xlnx.nwl-pcie-main";
reg-extended = <0x23 0x0 0xfd0e0000 0x1000 0x59 0x0 0xfd480000 0x0 0x1000 0x2 0x23 0x80 0x0 0x10000000 0x5a 0x0 0x0 0xffffffff 0xffffffff 0x0>;
interrupts = <0x74 0x72 0x73>;
dma = <0x59>;
memattr = <0x5b>;
};
zynqmp_boot: zynqmp_boot@0 {
compatible = "xlnx,zynqmp-boot";
dma = <0x23>;
gpios = <0x16 0x0>;
gpios-names = "reset";
};
rpu0_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x5c>;
reg = <0x0 0xffe00000 0x60000>;
};
rpu1_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x5d>;
reg = <0x0 0xffe90000 0x50000>;
};
i2c1: i2c1@0xFF030000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
clocks = <0x42>;
compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10";
interrupts = <0x12>;
reg = <0x0 0xff030000 0x1000>;
i2cswitch@74 {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "nxp,pca9548";
reg = <0x74>;
i2c@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
eeprom@54 {
compatible = "at,24c08";
reg = <0x54>;
};
eeprom@55 {
compatible = "at,24c08";
reg = <0x55>;
};
eeprom@56 {
compatible = "at,24c08";
reg = <0x56>;
};
eeprom@57 {
compatible = "at,24c08";
reg = <0x57>;
};
};
i2c@2 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x2>;
si570_1: clock-generator@5d {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
i2c@3 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x3>;
si570_2: clock-generator@5e {
compatible = "silabs,si57x";
reg = <0x5d>;
temperature-stability = <0x32>;
};
};
};
};
};
lmb_pmu: lmb_pmu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x3>;
phandle = <0x3>;
main_bus_for_pmu {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
pmu_io_module: io-module@00 {
#address-cells = <0x2>;
#size-cells = <0x1>;
#priority-cells = <0x0>;
compatible = "xlnx,iomodule-1.02.a", "syscon", "simple-bus";
container = <0x3>;
priority = <0xffffffff>;
xlnx,freq = <0x47868c0>;
xlnx,instance = "iomodule_1";
xlnx,io-mask = <0xfffe0000>;
xlnx,lmb-awidth = <0x20>;
xlnx,lmb-dwidth = <0x20>;
xlnx,mask = <0xffffff80>;
xlnx,use-io-bus = <0x1>;
pmu_io_intc: pmu_intc@0C {
#interrupt-cells = <0x2>;
compatible = "xlnx,io-intc-1.02.a", "xlnx,io_intc";
interrupt-controller;
interrupts-extended = <0x5e 0x0>;
reg = <0x0 0xffd4000c 0x4 0x0 0xffd40030 0x10 0x0 0xffd40080 0x7c>;
xlnx,intc-addr-width = <0x20>;
xlnx,intc-base-vectors = <0x0>;
xlnx,intc-has-fast = <0x0>;
xlnx,intc-intr-size = <0x10>;
xlnx,intc-level-edge = <0x0>;
xlnx,intc-positive = <0xffff>;
xlnx,intc-use-ext-intr = <0x1>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
pmu_io_gpi1: pmu_gpi@20 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xb 0x0>;
reg = <0x0 0xffd40020 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
};
pmu_io_gpi2: pmu_gpi@24 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xc 0x0>;
reg = <0x0 0xffd40024 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
gpios = <0x16 0x1d>;
linux,phandle = <0x15>;
phandle = <0x15>;
};
pmu_io_gpi3: pmu_gpi@28 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xd 0x0>;
reg = <0x0 0xffd40028 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
gpios = <0x16 0x1e>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
pmu_io_gpi4: pmu_gpi@2c {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi";
interrupt-parent = <0x13>;
interrupts = <0xe 0x0>;
reg = <0x0 0xffd4002c 0x4>;
xlnx,gpi-interrupt = <0x1>;
xlnx,gpi-size = <0x20>;
xlnx,use-gpi = <0x1>;
};
pmu_io_gpo1: pmu_gpo@10 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd40010 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x9>;
xlnx,use-gpo = <0x1>;
linux,phandle = <0x5f>;
phandle = <0x5f>;
};
pmu_io_gpo2: pmu_gpo@14 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd40014 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x1>;
};
pmu_io_gpo3: pmu_gpo@18 {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd40018 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x1>;
};
pmu_io_gpo4: pmu_gpo@1c {
#gpio-cells = <0x2>;
gpio-controller;
compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo";
reg = <0x0 0xffd4001c 0x4>;
xlnx,gpo-init = <0x0>;
xlnx,gpo-size = <0x20>;
xlnx,use-gpo = <0x1>;
};
pmu_io_pit1: pmu_pit@40 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x3 0x0>;
reg = <0x0 0xffd40040 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpios = <0x5f 0x2 0x0 0x60 0x0>;
gpio-names = "ps_config", "ps_hit_in";
gpio-controller;
#gpio-cells = <0x1>;
};
pmu_io_pit2: pmu_pit@50 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x4 0x0>;
reg = <0x0 0xffd40050 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x60>;
phandle = <0x60>;
};
pmu_io_pit3: pmu_pit@60 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x5 0x0>;
reg = <0x0 0xffd40060 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpios = <0x5f 0x6 0x0 0x61 0x0>;
gpio-names = "ps_config", "ps_hit_in";
gpio-controller;
#gpio-cells = <0x1>;
};
pmu_io_pit4: pmu_pit@70 {
compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit";
interrupt-parent = <0x13>;
interrupts = <0x6 0x0>;
reg = <0x0 0xffd40070 0xc>;
xlnx,pit-interrupt = <0x1>;
xlnx,pit-prescaler = <0x9>;
xlnx,pit-readable = <0x1>;
xlnx,pit-size = <0x20>;
xlnx,use-pit = <0x1>;
gpio-controller;
#gpio-cells = <0x1>;
linux,phandle = <0x61>;
phandle = <0x61>;
};
pmu_io_uart: pmu_uart@00 {
compatible = "xlnx,io-uart-1.02.a", "xlnx,io_uart";
interrupt-parent = <0x13>;
interrupts = <0x0 0x0 0x1 0x0 0x2 0x0>;
reg = <0x0 0xffd40000 0xc 0x0 0xffd4004c 0x4>;
xlnx,uart-baudrate = <0x2580>;
xlnx,uart-data-bits = <0x8>;
xlnx,uart-error-interrupt = <0x1>;
xlnx,uart-odd-parity = <0x0>;
xlnx,uart-prog-baudrate = <0x0>;
xlnx,uart-rx-interrupt = <0x1>;
xlnx,uart-tx-interrupt = <0x1>;
xlnx,uart-use-parity = <0x0>;
xlnx,use-uart-rx = <0x0>;
xlnx,use-uart-tx = <0x0>;
};
};
pmu_local: pmu_local@ffd60000 {
#gpio-cells = <0x1>;
compatible = "xlnx,pmu-local";
reg = <0x0 0xffd60000 0x0 0x1000 0x0>;
gpio-controller;
num-gpios = <0x7>;
linux,phandle = <0x16>;
phandle = <0x16>;
};
};
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu0: apu_cpu@0 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x0>;
enable-method = "psci";
reg = <0x0>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x0 0x64 0x0 0x16 0x80000001 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #0";
memattr_s = <0x65>;
memattr_ns = <0x66>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
cpu1: apu_cpu@1 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x1>;
enable-method = "psci";
reg = <0x1>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x1 0x64 0x1 0x16 0x80000002 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #1";
memattr_s = <0x67>;
memattr_ns = <0x68>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
cpu2: apu_cpu@2 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x2>;
enable-method = "psci";
reg = <0x2>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x2 0x64 0x2 0x16 0x80000003 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #2";
memattr_s = <0x69>;
memattr_ns = <0x6a>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
cpu3: apu_cpu@3 {
compatible = "cortex-a53-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x410fd034>;
arm,ctr = <0x83338003>;
arm,clidr = <0x9200003>;
arm,id_pfr0 = <0x1231>;
arm,ccsidr0 = <0x701fe019>;
arm,ccsidr1 = <0x201fe019>;
arm,mp-affinity = <0x3>;
enable-method = "psci";
reg = <0x3>;
arm,reset-hivecs = <0x1>;
arm,rvbar = <0xffff0000>;
#interrupt-cells = <0x1>;
arm,reset-cbar = <0xfd3fe000>;
mr = <0x62>;
memory = <0x62>;
gpios = <0x63 0x3 0x64 0x3 0x16 0x80000004 0x16 0x8000001c 0x4 0x2>;
gpio-names = "rst_cntrl", "wfi", "pwr_cntrl", "pwr_cntrl", "rst_cntrl";
gdb-id = "Cortex-A53 #3";
memattr_s = <0x6b>;
memattr_ns = <0x6c>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
rpu_cpu0: rpu_cpu@0 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x100>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x0>;
mr = <0x6d>;
memory = <0x6d>;
gpios = <0x5 0x0 0x6e 0x0 0x6e 0x7 0x6e 0x5 0x16 0x9>;
gpio-names = "reset", "ncpuhalt", "vinithi", "wfi", "pwr_cntrl";
gdb-id = "Cortex-R5 #0";
memattr_ns = <0x6f>;
linux,phandle = <0x78>;
phandle = <0x78>;
};
rpu_cpu1: rpu_cpu@1 {
compatible = "cortex-r5f-arm-cpu";
d-cache-line-size = <0x20>;
d-cache-size = <0x8000>;
device_type = "cpu";
i-cache-line-size = <0x20>;
i-cache-size = <0x8000>;
arm,midr = <0x411fc153>;
arm,tcmtr = <0x10001>;
arm,ctr = <0x8003c003>;
arm,clidr = <0x9200003>;
arm,ccsidr0 = <0xf01fe019>;
arm,ccsidr1 = <0xf01fe019>;
arm,mp-affinity = <0x101>;
arm,id_pfr0 = <0x131>;
arm,reset-hivecs = <0x1>;
#interrupt-cells = <0x1>;
reg = <0x1>;
mr = <0x70>;
memory = <0x70>;
gpios = <0x5 0x1 0x6e 0x2 0x6e 0x1 0x6e 0x8 0x6e 0x6 0x16 0x9>;
gpio-names = "reset", "halt", "ncpuhalt", "vinithi", "wfi", "pwr_cntrl";
gdb-id = "Cortex-R5 #1";
memattr_ns = <0x71>;
linux,phandle = <0x79>;
phandle = <0x79>;
};
};
aliases {
serial0 = "/amba@0/serial@0xFF000000";
serial1 = "/amba@0/serial@0xFF010000";
ethernet0 = "/amba@0/ethernet@0xFF0E0000";
main_bus_for_apu {
compatible = "qemu:memory-region";
container = <0x62>;
alias = <0x2c>;
priority = <0xffffffff>;
};
main_bus_for_pl {
compatible = "qemu:memory-region";
container = <0x23>;
alias = <0x72>;
priority = <0xffffffff>;
};
};
amba_apu: amba_apu@0 {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x62>;
phandle = <0x62>;
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x6>;
interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
clock-frequency = <0x5f5e100>;
};
dummy: dymmy@0 {
interrupt-controller;
#interrupt-cells = <0x1>;
linux,phandle = <0x77>;
phandle = <0x77>;
};
apu_intc_redirect_0: apu_intc_redirect0@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0x9 0x0 0x9 0x1 0x9 0x2 0x9 0x3>;
gpios = <0x15 0x1 0x0 0x64 0x4>;
linux,phandle = <0x73>;
phandle = <0x73>;
};
apu_intc_redirect_1: apu_intc_redirect1@1 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0xa 0x0 0xa 0x1 0xa 0x2 0xa 0x3>;
gpios = <0x15 0x2 0x0 0x64 0x5>;
linux,phandle = <0x74>;
phandle = <0x74>;
};
apu_intc_redirect_2: apu_intc_redirect2@2 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0xb 0x0 0xb 0x1 0xb 0x2 0xb 0x3>;
gpios = <0x15 0x3 0x0 0x64 0x6>;
linux,phandle = <0x75>;
phandle = <0x75>;
};
apu_intc_redirect_3: apu_intc_redirect3@3 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0xc 0x0 0xc 0x1 0xc 0x2 0xc 0x3>;
gpios = <0x15 0x4 0x0 0x64 0x7>;
linux,phandle = <0x76>;
phandle = <0x76>;
};
};
amba_apu_gic: amba_apu_gic@0 {
#address-cells = <0x2>;
#priority-cells = <0x1>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
container = <0x23>;
priority = <0xffffffff>;
gic: interrupt-controller@0xFD3FF000 {
#address-cells = <0x0>;
#size-cells = <0x0>;
#interrupt-cells = <0x3>;
#gpio-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9010000 0x1000 0x0 0x0 0xf9020000 0x20000 0x0 0x0 0xf9040000 0x20000 0x0 0x0 0xf9060000 0x20000 0x0>;
interrupt-controller;
gpios = <0x16 0x1c 0x4 0x2>;
gpio-names = "pwr_cntrl", "rst_cntrl";
num-irq = <0xc0>;
interrupts-extended = <0x73 0x0 0x74 0x0 0x75 0x0 0x76 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x73 0x2 0x74 0x2 0x75 0x2 0x76 0x2 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x73 0x1 0x74 0x1 0x75 0x1 0x76 0x1 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x73 0x3 0x74 0x3 0x75 0x3 0x76 0x3 0x77 0x0 0x77 0x0 0x77 0x0 0x77 0x0 0x6 0x1 0x9 0x104 0x6 0x1 0x9 0x204 0x6 0x1 0x9 0x404 0x6 0x1 0x9 0x804>;
num-cpu = <0x4>;
revision = <0x2>;
map-stride = <0x10000>;
int-id = <0x202143b>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
zynqmp-gic-cpu-alias@0xf9021000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9021000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9022000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9022000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9023000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9023000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9024000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9024000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9025000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9025000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9026000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9026000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9027000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9027000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9028000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9028000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf9029000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf9029000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902a000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902a000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902b000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902b000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902c000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902c000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902d000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902d000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902e000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902e000 0x1000 0x1>;
};
zynqmp-gic-cpu-alias@0xf902f000 {
compatible = "qemu:memory-region";
alias = <0x6 0x1>;
reg = <0x0 0xf902f000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9061000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9061000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9062000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9062000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9063000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9063000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9064000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9064000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9065000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9065000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9066000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9066000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9067000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9067000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9068000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9068000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf9069000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf9069000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906a000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906a000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906b000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906b000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906c000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906c000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906d000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906d000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906e000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906e000 0x1000 0x1>;
};
zynqmp-gic-vcpu-alias@0xf906f000 {
compatible = "qemu:memory-region";
alias = <0x6 0x3>;
reg = <0x0 0xf906f000 0x1000 0x1>;
};
};
amba_rpu: amba_rpu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x33>;
phandle = <0x33>;
rpu_intc_redirect_0: rpu_intc_redirect0@0 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0x78 0x0>;
gpios = <0x15 0x5 0x0 0x6e 0x3>;
linux,phandle = <0x7e>;
phandle = <0x7e>;
};
rpu_intc_redirect_1: rpu_intc_redirect1@1 {
#interrupt-cells = <0x1>;
compatible = "xlnx,zynqmp-intc-redirect";
interrupt-controller;
interrupts-extended = <0x79 0x0>;
gpios = <0x15 0x6 0x0 0x6e 0x4>;
linux,phandle = <0x7f>;
phandle = <0x7f>;
};
tcm_mem_ctrl_0_A: tcm_mem_ctrl_A0@0 {
compatible = "qemu,memory-controller";
mr = <0x7a>;
gpios = <0x16 0x18 0x16 0x14>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
tcm_mem_ctrl_0_B: tcm_mem_ctrl_B0@0 {
compatible = "qemu,memory-controller";
mr = <0x7b>;
gpios = <0x16 0x19 0x16 0x15>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
tcm_mem_ctrl_1_A: tcm_mem_ctrl_A1@1 {
compatible = "qemu,memory-controller";
mr = <0x7c>;
gpios = <0x16 0x1a 0x16 0x16>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
tcm_mem_ctrl_1_B: tcm_mem_ctrl_B1@1 {
compatible = "qemu,memory-controller";
mr = <0x7d>;
gpios = <0x16 0x1b 0x16 0x17>;
gpio-names = "hlt_cntrl", "pwr_cntrl";
};
rpu_gic: interrupt-controller@0xF9000000 {
#address-cells = <0x0>;
#interrupt-cells = <0x3>;
#size-cells = <0x0>;
compatible = "xlnx,zynqmp-scugic", "arm,gic";
reg = <0x0 0xf9000000 0x0 0x1000 0x0 0x0 0xf9001000 0x0 0x100 0x0>;
status = "disabled";
interrupt-controller;
num-irq = <0x100>;
num-cpu = <0x2>;
interrupts-extended = <0x7e 0x0 0x7f 0x0>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
ddr_memory_2_for_rpu: ddr_memory_2_for_rpu {
compatible = "qemu:memory-region";
alias = <0x80>;
reg = <0x0 0x30000 0x0 0x10000 0x0>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
main_bus_for_rpu {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
smmu_tbu0: tbu0_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x25>;
phandle = <0x25>;
};
smmu_tbu1: tbu1_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x26>;
phandle = <0x26>;
};
smmu_tbu2: tbu2_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x27>;
phandle = <0x27>;
};
smmu_tbu3: tbu3_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x28>;
phandle = <0x28>;
};
smmu_tbu4: tbu4_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x29>;
phandle = <0x29>;
};
smmu_tbu5: tbu5_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
tbu3_master: tbu3_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2d>;
phandle = <0x2d>;
main_bus_for_tbu3 {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu4_master: tbu4_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2e>;
phandle = <0x2e>;
main_bus_for_tbu4 {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tbu5_master: tbu5_master@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2f>;
phandle = <0x2f>;
main_bus_for_tbu5 {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
cci_slave: cci_slave@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2c>;
phandle = <0x2c>;
downstream {
compatible = "qemu:memory-region";
alias = <0x24>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
};
misc_clk: misc_clk {
#clock-cells = <0x0>;
clock-frequency = <0x2faf080>;
compatible = "fixed-clock";
linux,phandle = <0x42>;
phandle = <0x42>;
};
pcie_ingress: pcie_ingress@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
linux,phandle = <0x59>;
phandle = <0x59>;
downstream {
compatible = "qemu:memory-region";
alias = <0x26>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
pcie_overlay: pcie_overlay@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
priority = <0x2>;
compatible = "qemu:memory-region";
container = <0x23>;
linux,phandle = <0x5a>;
phandle = <0x5a>;
};
ddr_alias: ddr_alias@0 {
compatible = "qemu:memory-region";
container = <0x81>;
alias = <0x1>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
qemu_sysmem: qemu_sysmem@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:system-memory";
linux,phandle = <0x81>;
phandle = <0x81>;
};
pmu_memattr: pmu_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x40>;
};
apu0_s_memattr: apu0_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x80>;
linux,phandle = <0x65>;
phandle = <0x65>;
};
apu0_ns_memattr: apu0_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x80>;
linux,phandle = <0x66>;
phandle = <0x66>;
};
apu1_s_memattr: apu1_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8d>;
linux,phandle = <0x67>;
phandle = <0x67>;
};
apu1_ns_memattr: apu1_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8d>;
linux,phandle = <0x68>;
phandle = <0x68>;
};
apu2_s_memattr: apu2_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8e>;
linux,phandle = <0x69>;
phandle = <0x69>;
};
apu2_ns_memattr: apu2_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8e>;
linux,phandle = <0x6a>;
phandle = <0x6a>;
};
apu3_s_memattr: apu3_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8f>;
linux,phandle = <0x6b>;
phandle = <0x6b>;
};
apu3_ns_memattr: apu3_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8f>;
linux,phandle = <0x6c>;
phandle = <0x6c>;
};
rpu0_memattr: rpu0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2e>;
linux,phandle = <0x6f>;
phandle = <0x6f>;
};
rpu1_memattr: rpu1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2f>;
linux,phandle = <0x71>;
phandle = <0x71>;
};
gem0_memattr: gem0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x874>;
linux,phandle = <0x43>;
phandle = <0x43>;
};
gem1_memattr: gem1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x875>;
linux,phandle = <0x44>;
phandle = <0x44>;
};
gem2_memattr: gem2_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x876>;
linux,phandle = <0x45>;
phandle = <0x45>;
};
gem3_memattr: gem3_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x877>;
linux,phandle = <0x46>;
phandle = <0x46>;
};
qspi_dma_memattr: qspi_dma_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x873>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
pcie_ns_memattr: pcie_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x4d0>;
linux,phandle = <0x5b>;
phandle = <0x5b>;
};
protected_amba: protected_amba@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x24>;
phandle = <0x24>;
downstream {
compatible = "qemu:memory-region";
alias = <0x23>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
ddr3_ram: memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x23>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
pmu_ram: pmu_ram@ffdc0000 {
compatible = "qemu:memory-region";
container = <0x23>;
qemu,ram = <0x2>;
reg = <0x0 0xffdc0000 0x20000>;
};
tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x7a>;
phandle = <0x7a>;
};
tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x7b>;
phandle = <0x7b>;
};
tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x7c>;
phandle = <0x7c>;
};
tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x7d>;
phandle = <0x7d>;
};
icache_rpu0: icache_rpu0@0x40000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
};
dcache_rpu0: dcache_rpu0@0x50000 {
compatible = "qemu:memory-region";
container = <0x5c>;
qemu,ram = <0x2>;
reg = <0x0 0x50000 0x8000>;
};
icache_rpu1: icache_rpu1@0x30000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x8000>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
dcache_rpu1: dcache_rpu1@0x40000 {
compatible = "qemu:memory-region";
container = <0x5d>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
ipibuf_ram: ipibuf@ff990000 {
compatible = "qemu:memory-region";
container = <0x23>;
qemu,ram = <0x2>;
reg = <0x0 0xff990000 0x1000>;
};
ocm_ram: ocm_ram@0 {
compatible = "qemu:memory-region";
linux,phandle = <0x32>;
phandle = <0x32>;
};
ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0x4d>;
phandle = <0x4d>;
};
ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x10000 0x10000>;
linux,phandle = <0x4e>;
phandle = <0x4e>;
};
ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0x4f>;
phandle = <0x4f>;
};
ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
compatible = "qemu:memory-region";
container = <0x32>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
linux,phandle = <0x50>;
phandle = <0x50>;
};
tcm_cache_rpu0: tcm_cache_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x5c>;
phandle = <0x5c>;
atcm1_for_rpu0: atcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x7c>;
reg = <0x0 0x10000 0x0 0x10000 0x1>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
btcm1_for_rpu0: btcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x7d>;
reg = <0x0 0x30000 0x0 0x10000 0x1>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
};
amba_rpu0: amba_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x6d>;
phandle = <0x6d>;
tcm_cache_rpu0 {
compatible = "qemu:memory-region";
alias = <0x5c>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
rpu_bus_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0x33>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tcm_cache_rpu1: tcm_cache_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x5d>;
phandle = <0x5d>;
};
amba_rpu1: amba_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x70>;
phandle = <0x70>;
tcm_cache_rpu1 {
compatible = "qemu:memory-region";
alias = <0x5d>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
rpu_bus_for_rpu1 {
compatible = "qemu:memory-region";
alias = <0x33>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_pl: amba_pl {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x72>;
phandle = <0x72>;
};
mdio0: mdio {
#address-cells = <0x1>;
#size-cells = <0x0>;
compatible = "mdio";
linux,phandle = <0x47>;
phandle = <0x47>;
phy0: phy@7 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0x7>;
};
phy1: phy@12 {
compatible = "88e1118r";
device_type = "ethernet-phy";
reg = <0xc>;
};
};
};
[-- Attachment #13: zynqmp-qemu-multiarch-pmu.txt --]
[-- Type: text/plain, Size: 12282 bytes --]
/dts-v1/;
/ {
#address-cells = <0x2>;
#size-cells = <0x1>;
cpus {
#address-cells = <0x1>;
#cpus = <0x1>;
#size-cells = <0x0>;
pmu_cpu0: cpu@0 {
#interrupt-cells = <0x1>;
clock-frequency = <0x5f5e100>;
compatible = "xlnx,microblaze-cpu";
d-cache-size = <0x0>;
device_type = "cpu";
i-cache-size = <0x0>;
model = "microblaze,8.40.b";
version = "8.40.b";
reg = <0x0>;
timebase-frequency = <0x5f5e100>;
xlnx,addr-tag-bits = <0x10>;
xlnx,area-optimized = <0x0>;
xlnx,avoid-primitives = <0x3>;
xlnx,base-vectors = <0xffd00000>;
xlnx,branch-target-cache-size = <0x0>;
xlnx,d-axi = <0x1>;
xlnx,d-lmb = <0x1>;
xlnx,d-plb = <0x0>;
xlnx,data-size = <0x20>;
xlnx,debug-enabled = <0x1>;
xlnx,div-zero-exception = <0x0>;
xlnx,dynamic-bus-sizing = <0x1>;
xlnx,ecc-use-ce-exception = <0x0>;
xlnx,edge-is-positive = <0x1>;
xlnx,endianness = <0x1>;
xlnx,family = "virtex7";
xlnx,fault-tolerant = <0x1>;
xlnx,fpu-exception = <0x0>;
xlnx,freq = <0x5f5e100>;
xlnx,fsl-data-size = <0x20>;
xlnx,fsl-exception = <0x0>;
xlnx,fsl-links = <0x0>;
xlnx,i-axi = <0x1>;
xlnx,i-lmb = <0x1>;
xlnx,i-plb = <0x0>;
xlnx,ill-opcode-exception = <0x1>;
xlnx,instance = "microblaze_1";
xlnx,interconnect = <0x2>;
xlnx,interrupt-is-edge = <0x0>;
xlnx,lockstep-slave = <0x0>;
xlnx,mmu-dtlb-size = <0x2>;
xlnx,mmu-itlb-size = <0x4>;
xlnx,mmu-privileged-instr = <0x0>;
xlnx,mmu-tlb-access = <0x3>;
xlnx,mmu-zones = <0x2>;
xlnx,number-of-pc-brk = <0x1>;
xlnx,number-of-rd-addr-brk = <0x1>;
xlnx,number-of-wr-addr-brk = <0x1>;
xlnx,opcode-0x0-illegal = <0x1>;
xlnx,optimization = <0x0>;
xlnx,pc-width = <0x20>;
xlnx,pvr = <0x0>;
xlnx,pvr-user1 = <0x0>;
xlnx,pvr-user2 = <0x0>;
xlnx,reset-msr = <0x0>;
xlnx,sco = <0x0>;
xlnx,stream-interconnect = <0x0>;
xlnx,unaligned-exceptions = <0x1>;
xlnx,use-barrel = <0x1>;
xlnx,use-branch-target-cache = <0x0>;
xlnx,use-dcache = <0x0>;
xlnx,use-div = <0x0>;
xlnx,use-ext-brk = <0x1>;
xlnx,use-ext-nm-brk = <0x1>;
xlnx,use-extended-fsl-instr = <0x0>;
xlnx,use-fpu = <0x0>;
xlnx,use-hw-mul = <0x0>;
xlnx,use-icache = <0x0>;
xlnx,use-interrupt = <0x1>;
xlnx,use-mmu = <0x0>;
xlnx,use-msr-instr = <0x1>;
xlnx,use-pcmp-instr = <0x1>;
xlnx,use-reorder-instr = <0x1>;
xlnx,use-stack-protection = <0x1>;
gpios = <0x1 0x0 0x1 0x3>;
gpio-names = "wakeup", "mb_sleep";
mr = <0x2>;
memory = <0x2>;
memattr = <0x3>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
};
lmb_pmu: lmb_pmu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "simple-bus";
ranges;
linux,phandle = <0x2>;
phandle = <0x2>;
main_bus_for_pmu {
compatible = "qemu:memory-region";
alias = <0x4>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
pmu_rom: memory@ffd00000 {
device_type = "memory";
reg = <0x0 0xffd00000 0x0 0x8000 0x1>;
compatible = "qemu:memory-region";
container = <0x2>;
qemu,ram = <0x1>;
read-only;
};
rp_memory_master: rp_mm@40000000 {
compatible = "remote-port-memory-master";
remote-ports = <0x5 0x0>;
reg = <0x0 0x40000000 0x0 0xc0000000 0xfffffffe>;
};
};
pmu: pmu@0 {
compatible = "remote-port";
chrdev-id = "pmu-apu-rp";
linux,phandle = <0x5>;
phandle = <0x5>;
};
rp_gpio_mpu_intr: rp_gpio_pmu_intr@0 {
compatible = "remote-port-gpio";
remote-ports = <0x5 0x1>;
num-gpios = <0x1>;
interrupts-extended = <0x6 0x0>;
};
rp_gpio_pmu: rp_gpio_pmu@0 {
#gpio-cells = <0x1>;
compatible = "remote-port-gpio";
remote-ports = <0x5 0x2>;
gpio-controller;
num-gpios = <0x4>;
linux,phandle = <0x1>;
phandle = <0x1>;
};
ps_reset@0 {
compatible = "qemu,reset-device";
gpios = <0x1 0x1 0x1 0x2>;
};
ddr_bank1_1: ddr_bank1_1@0x0 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x30000>;
};
ddr_bank1_2: ddr_bank1_2@0x30000 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
};
ddr_bank1_3: ddr_bank1_3@0x40000 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x3ffc0000>;
};
ddr_bank2: ddr_bank2@0x40000000 {
compatible = "qemu:memory-region";
container = <0x7>;
qemu,ram = <0x2>;
reg = <0x0 0x40000000 0x40000000>;
};
pmu_memattr: pmu_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x40>;
linux,phandle = <0x3>;
phandle = <0x3>;
};
apu0_s_memattr: apu0_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x80>;
};
apu0_ns_memattr: apu0_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x80>;
};
apu1_s_memattr: apu1_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8d>;
};
apu1_ns_memattr: apu1_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8d>;
};
apu2_s_memattr: apu2_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8e>;
};
apu2_ns_memattr: apu2_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8e>;
};
apu3_s_memattr: apu3_s_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x8f>;
};
apu3_ns_memattr: apu3_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x8f>;
};
rpu0_memattr: rpu0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2e>;
};
rpu1_memattr: rpu1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x1>;
master-id = <0x2f>;
};
gem0_memattr: gem0_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x874>;
};
gem1_memattr: gem1_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x875>;
};
gem2_memattr: gem2_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x876>;
};
gem3_memattr: gem3_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x877>;
};
qspi_dma_memattr: qspi_dma_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x873>;
};
pcie_ns_memattr: pcie_ns_ma {
compatible = "qemu:memory-transaction-attr";
secure = <0x0>;
master-id = <0x4d0>;
};
protected_amba: protected_amba@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0xe>;
phandle = <0xe>;
downstream {
compatible = "qemu:memory-region";
alias = <0x4>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba: amba@0 {
#address-cells = <0x2>;
#size-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0x4>;
phandle = <0x4>;
rpu0_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x8>;
reg = <0x0 0xffe00000 0x60000>;
};
rpu1_for_main_bus {
compatible = "qemu:memory-region";
alias = <0x9>;
reg = <0x0 0xffe90000 0x50000>;
};
};
ddr3_ram: memory@00000000 {
compatible = "qemu:memory-region";
device_type = "memory";
container = <0x4>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
pmu_ram: pmu_ram@ffdc0000 {
compatible = "qemu:memory-region";
container = <0x4>;
qemu,ram = <0x2>;
reg = <0x0 0xffdc0000 0x20000>;
};
tcm_ram_r5_0_A: tcm_ram_r5_0_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
};
tcm_ram_r5_0_B: tcm_ram_r5_0_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
};
tcm_ram_r5_1_A: tcm_ram_r5_1_A@0x00000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
tcm_ram_r5_1_B: tcm_ram_r5_1_B@0x20000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
icache_rpu0: icache_rpu0@0x40000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
};
dcache_rpu0: dcache_rpu0@0x50000 {
compatible = "qemu:memory-region";
container = <0x8>;
qemu,ram = <0x2>;
reg = <0x0 0x50000 0x8000>;
};
icache_rpu1: icache_rpu1@0x30000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x8000>;
};
dcache_rpu1: dcache_rpu1@0x40000 {
compatible = "qemu:memory-region";
container = <0x9>;
qemu,ram = <0x2>;
reg = <0x0 0x40000 0x8000>;
};
ipibuf_ram: ipibuf@ff990000 {
compatible = "qemu:memory-region";
container = <0x4>;
qemu,ram = <0x2>;
reg = <0x0 0xff990000 0x1000>;
};
ocm_ram: ocm_ram@0 {
compatible = "qemu:memory-region";
linux,phandle = <0xa>;
phandle = <0xa>;
};
ocm_ram_bank_0: ocm_ram_bank_0@0x00000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x0 0x10000>;
};
ocm_ram_bank_1: ocm_ram_bank_1@0x10000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x10000 0x10000>;
};
ocm_ram_bank_2: ocm_ram_bank_2@0x20000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x20000 0x10000>;
};
ocm_ram_bank_3: ocm_ram_bank_3@0x30000 {
compatible = "qemu:memory-region";
container = <0xa>;
qemu,ram = <0x2>;
reg = <0x0 0x30000 0x10000>;
};
tcm_cache_rpu0: tcm_cache_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x8>;
phandle = <0x8>;
atcm1_for_rpu0: atcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0xb>;
reg = <0x0 0x10000 0x0 0x10000 0x1>;
};
btcm1_for_rpu0: btcm1_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0xc>;
reg = <0x0 0x30000 0x0 0x10000 0x1>;
};
};
amba_rpu0: amba_rpu0@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
tcm_cache_rpu0 {
compatible = "qemu:memory-region";
alias = <0x8>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x0>;
};
rpu_bus_for_rpu0 {
compatible = "qemu:memory-region";
alias = <0xd>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
tcm_cache_rpu1: tcm_cache_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "qemu:memory-region";
linux,phandle = <0x9>;
phandle = <0x9>;
};
amba_rpu1: amba_rpu1@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
tcm_cache_rpu1 {
compatible = "qemu:memory-region";
alias = <0x9>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0x1>;
};
rpu_bus_for_rpu1 {
compatible = "qemu:memory-region";
alias = <0xd>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
amba_rpu: amba_rpu@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
#priority-cells = <0x1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges;
linux,phandle = <0xd>;
phandle = <0xd>;
main_bus_for_rpu {
compatible = "qemu:memory-region";
alias = <0xe>;
reg = <0x0 0x0 0xffffffff 0xffffffff 0xffffffff>;
};
};
};
[-- Attachment #14: system.dts.txt --]
[-- Type: text/plain, Size: 39908 bytes --]
/dts-v1/;
/ {
compatible = "xlnx,zynqmp";
#address-cells = <0x2>;
#size-cells = <0x2>;
cpus {
#address-cells = <0x1>;
#size-cells = <0x0>;
cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
operating-points-v2 = <0x1>;
reg = <0x0>;
cpu-idle-states = <0x2>;
clocks = <0x3 0xa>;
};
cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x1>;
operating-points-v2 = <0x1>;
cpu-idle-states = <0x2>;
};
cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x2>;
operating-points-v2 = <0x1>;
cpu-idle-states = <0x2>;
};
cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
device_type = "cpu";
enable-method = "psci";
reg = <0x3>;
operating-points-v2 = <0x1>;
cpu-idle-states = <0x2>;
};
idle-states {
entry-method = "arm,psci";
cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x40000000>;
local-timer-stop;
entry-latency-us = <0x12c>;
exit-latency-us = <0x258>;
min-residency-us = <0x2710>;
linux,phandle = <0x2>;
phandle = <0x2>;
};
};
};
cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
linux,phandle = <0x1>;
phandle = <0x1>;
opp00 {
opp-hz = <0x0 0x47868bf4>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
opp01 {
opp-hz = <0x0 0x23c345fa>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
opp02 {
opp-hz = <0x0 0x17d783fc>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
opp03 {
opp-hz = <0x0 0x11e1a2fd>;
opp-microvolt = <0xf4240>;
clock-latency-ns = <0x7a120>;
};
};
dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
power-domains {
compatible = "xlnx,zynqmp-genpd";
pd-usb0 {
#power-domain-cells = <0x0>;
pd-id = <0x16>;
linux,phandle = <0x40>;
phandle = <0x40>;
};
pd-usb1 {
#power-domain-cells = <0x0>;
pd-id = <0x17>;
linux,phandle = <0x41>;
phandle = <0x41>;
};
pd-sata {
#power-domain-cells = <0x0>;
pd-id = <0x1c>;
linux,phandle = <0x1c>;
phandle = <0x1c>;
};
pd-spi0 {
#power-domain-cells = <0x0>;
pd-id = <0x23>;
linux,phandle = <0x39>;
phandle = <0x39>;
};
pd-spi1 {
#power-domain-cells = <0x0>;
pd-id = <0x24>;
linux,phandle = <0x3a>;
phandle = <0x3a>;
};
pd-uart0 {
#power-domain-cells = <0x0>;
pd-id = <0x21>;
linux,phandle = <0x3e>;
phandle = <0x3e>;
};
pd-uart1 {
#power-domain-cells = <0x0>;
pd-id = <0x22>;
linux,phandle = <0x3f>;
phandle = <0x3f>;
};
pd-eth0 {
#power-domain-cells = <0x0>;
pd-id = <0x1d>;
linux,phandle = <0xe>;
phandle = <0xe>;
};
pd-eth1 {
#power-domain-cells = <0x0>;
pd-id = <0x1e>;
linux,phandle = <0xf>;
phandle = <0xf>;
};
pd-eth2 {
#power-domain-cells = <0x0>;
pd-id = <0x1f>;
linux,phandle = <0x10>;
phandle = <0x10>;
};
pd-eth3 {
#power-domain-cells = <0x0>;
pd-id = <0x20>;
linux,phandle = <0x11>;
phandle = <0x11>;
};
pd-i2c0 {
#power-domain-cells = <0x0>;
pd-id = <0x25>;
linux,phandle = <0x14>;
phandle = <0x14>;
};
pd-i2c1 {
#power-domain-cells = <0x0>;
pd-id = <0x26>;
linux,phandle = <0x15>;
phandle = <0x15>;
};
pd-dp {
#power-domain-cells = <0x0>;
pd-id = <0x29>;
linux,phandle = <0x42>;
phandle = <0x42>;
};
pd-gdma {
#power-domain-cells = <0x0>;
pd-id = <0x2a>;
linux,phandle = <0xa>;
phandle = <0xa>;
};
pd-adma {
#power-domain-cells = <0x0>;
pd-id = <0x2b>;
linux,phandle = <0xc>;
phandle = <0xc>;
};
pd-ttc0 {
#power-domain-cells = <0x0>;
pd-id = <0x18>;
};
pd-ttc1 {
#power-domain-cells = <0x0>;
pd-id = <0x19>;
linux,phandle = <0x3b>;
phandle = <0x3b>;
};
pd-ttc2 {
#power-domain-cells = <0x0>;
pd-id = <0x1a>;
linux,phandle = <0x3c>;
phandle = <0x3c>;
};
pd-ttc3 {
#power-domain-cells = <0x0>;
pd-id = <0x1b>;
linux,phandle = <0x3d>;
phandle = <0x3d>;
};
pd-sd0 {
#power-domain-cells = <0x0>;
pd-id = <0x27>;
linux,phandle = <0x1d>;
phandle = <0x1d>;
};
pd-sd1 {
#power-domain-cells = <0x0>;
pd-id = <0x28>;
linux,phandle = <0x1e>;
phandle = <0x1e>;
};
pd-nand {
#power-domain-cells = <0x0>;
pd-id = <0x2c>;
linux,phandle = <0xd>;
phandle = <0xd>;
};
pd-qspi {
#power-domain-cells = <0x0>;
pd-id = <0x2d>;
linux,phandle = <0x19>;
phandle = <0x19>;
};
pd-gpio {
#power-domain-cells = <0x0>;
pd-id = <0x2e>;
linux,phandle = <0x13>;
phandle = <0x13>;
};
pd-can0 {
#power-domain-cells = <0x0>;
pd-id = <0x2f>;
linux,phandle = <0x7>;
phandle = <0x7>;
};
pd-can1 {
#power-domain-cells = <0x0>;
pd-id = <0x30>;
linux,phandle = <0x8>;
phandle = <0x8>;
};
pd-pcie {
#power-domain-cells = <0x0>;
pd-id = <0x3b>;
linux,phandle = <0x18>;
phandle = <0x18>;
};
pd-gpu {
#power-domain-cells = <0x0>;
pd-id = <0x3a 0x14 0x15>;
linux,phandle = <0xb>;
phandle = <0xb>;
};
};
mailbox@ff990400 {
compatible = "xlnx,zynqmp-ipi-mailbox";
reg = <0x0 0xff9905c0 0x0 0x20 0x0 0xff9905e0 0x0 0x20 0x0 0xff990e80 0x0 0x20 0x0 0xff990ea0 0x0 0x20>;
reg-names = "local_request_region", "local_response_region", "remote_request_region", "remote_response_region";
#mbox-cells = <0x1>;
xlnx,ipi-ids = <0x0 0x4>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x23 0x4>;
linux,phandle = <0x5>;
phandle = <0x5>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <0x4>;
interrupts = <0x0 0x8f 0x4 0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
firmware {
zynqmp-firmware {
compatible = "xlnx,zynqmp-firmware";
method = "smc";
};
};
zynqmp-power {
compatible = "xlnx,zynqmp-power";
mboxes = <0x5 0x0 0x5 0x1>;
mbox-names = "tx", "rx";
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <0x4>;
interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
};
edac {
compatible = "arm,cortex-a53-edac";
};
fpga-full {
compatible = "fpga-region";
fpga-mgr = <0x6>;
#address-cells = <0x2>;
#size-cells = <0x2>;
};
nvmem_firmware {
compatible = "xlnx,zynqmp-nvmem-fw";
#address-cells = <0x1>;
#size-cells = <0x1>;
soc_revision@0 {
reg = <0x0 0x4>;
linux,phandle = <0x1a>;
phandle = <0x1a>;
};
};
pcap {
compatible = "xlnx,zynqmp-pcap-fpga";
linux,phandle = <0x6>;
phandle = <0x6>;
};
reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <0x1>;
linux,phandle = <0x1b>;
phandle = <0x1b>;
};
zynqmp_rsa {
compatible = "xlnx,zynqmp-rsa";
};
sha384 {
compatible = "xlnx,zynqmp-keccak-384";
};
amba_apu@0 {
compatible = "simple-bus";
#address-cells = <0x2>;
#size-cells = <0x1>;
ranges = <0x0 0x0 0x0 0x0 0xffffffff>;
interrupt-controller@f9010000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <0x3>;
reg = <0x0 0xf9010000 0x10000 0x0 0xf9020000 0x20000 0x0 0xf9040000 0x20000 0x0 0xf9060000 0x20000>;
interrupt-controller;
interrupt-parent = <0x4>;
interrupts = <0x1 0x9 0xf04>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
};
amba {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
#address-cells = <0x2>;
#size-cells = <0x2>;
ranges;
can@ff060000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff060000 0x0 0x1000>;
interrupts = <0x0 0x17 0x4>;
interrupt-parent = <0x4>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <0x7>;
clocks = <0x3 0x3f 0x3 0x1f>;
};
can@ff070000 {
compatible = "xlnx,zynq-can-1.0";
status = "disabled";
clock-names = "can_clk", "pclk";
reg = <0x0 0xff070000 0x0 0x1000>;
interrupts = <0x0 0x18 0x4>;
interrupt-parent = <0x4>;
tx-fifo-depth = <0x40>;
rx-fifo-depth = <0x40>;
power-domains = <0x8>;
clocks = <0x3 0x40 0x3 0x1f>;
};
cci@fd6e0000 {
compatible = "arm,cci-400";
reg = <0x0 0xfd6e0000 0x0 0x9000>;
ranges = <0x0 0x0 0xfd6e0000 0x10000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
pmu@9000 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4>;
};
};
dma@fd500000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd500000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7c 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14e8>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x2e>;
phandle = <0x2e>;
};
dma@fd510000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd510000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7d 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14e9>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x2f>;
phandle = <0x2f>;
};
dma@fd520000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd520000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7e 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ea>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x30>;
phandle = <0x30>;
};
dma@fd530000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd530000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x7f 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14eb>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x31>;
phandle = <0x31>;
};
dma@fd540000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd540000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x80 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ec>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x32>;
phandle = <0x32>;
};
dma@fd550000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd550000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x81 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ed>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x33>;
phandle = <0x33>;
};
dma@fd560000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd560000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x82 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ee>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x34>;
phandle = <0x34>;
};
dma@fd570000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xfd570000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x83 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x80>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x14ef>;
power-domains = <0xa>;
clocks = <0x3 0x13 0x3 0x1f>;
linux,phandle = <0x35>;
phandle = <0x35>;
};
gpu@fd4b0000 {
status = "okay";
compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x0 0xfd4b0000 0x0 0x10000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
clock-names = "gpu", "gpu_pp0", "gpu_pp1";
power-domains = <0xb>;
clocks = <0x3 0x18 0x3 0x19 0x3 0x1a>;
};
dma@ffa80000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa80000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4d 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x26>;
phandle = <0x26>;
};
dma@ffa90000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffa90000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4e 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x27>;
phandle = <0x27>;
};
dma@ffaa0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaa0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x4f 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x28>;
phandle = <0x28>;
};
dma@ffab0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffab0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x50 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x29>;
phandle = <0x29>;
};
dma@ffac0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffac0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x51 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2a>;
phandle = <0x2a>;
};
dma@ffad0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffad0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x52 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2b>;
phandle = <0x2b>;
};
dma@ffae0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffae0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x53 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2c>;
phandle = <0x2c>;
};
dma@ffaf0000 {
status = "okay";
compatible = "xlnx,zynqmp-dma-1.0";
reg = <0x0 0xffaf0000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x54 0x4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <0x40>;
#stream-id-cells = <0x1>;
power-domains = <0xc>;
clocks = <0x3 0x44 0x3 0x1f>;
linux,phandle = <0x2d>;
phandle = <0x2d>;
};
memory-controller@fd070000 {
compatible = "xlnx,zynqmp-ddrc-2.40a";
reg = <0x0 0xfd070000 0x0 0x30000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x70 0x4>;
};
nand@ff100000 {
compatible = "arasan,nfc-v3p10";
status = "disabled";
reg = <0x0 0xff100000 0x0 0x1000>;
clock-names = "clk_sys", "clk_flash";
interrupt-parent = <0x4>;
interrupts = <0x0 0xe 0x4>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x872>;
power-domains = <0xd>;
clocks = <0x3 0x3c 0x3 0x1f>;
linux,phandle = <0x38>;
phandle = <0x38>;
};
ethernet@ff0b0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x874>;
power-domains = <0xe>;
clocks = <0x3 0x1f 0x3 0x31 0x3 0x2d 0x3 0x31 0x3 0x2c>;
linux,phandle = <0x1f>;
phandle = <0x1f>;
};
ethernet@ff0c0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x875>;
power-domains = <0xf>;
clocks = <0x3 0x1f 0x3 0x32 0x3 0x2e 0x3 0x32 0x3 0x2c>;
linux,phandle = <0x20>;
phandle = <0x20>;
};
ethernet@ff0d0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x876>;
power-domains = <0x10>;
clocks = <0x3 0x1f 0x3 0x33 0x3 0x2f 0x3 0x33 0x3 0x2c>;
linux,phandle = <0x21>;
phandle = <0x21>;
};
ethernet@ff0e0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x877>;
power-domains = <0x11>;
clocks = <0x3 0x1f 0x3 0x34 0x3 0x30 0x3 0x34 0x3 0x2c>;
phy-mode = "rgmii-id";
xlnx,ptp-enet-clock = <0x0>;
local-mac-address = [00 0a 35 00 02 90];
phy-handle = <0x12>;
linux,phandle = <0x22>;
phandle = <0x22>;
phy@9 {
reg = <0x9>;
ti,rx-internal-delay = <0x5>;
ti,tx-internal-delay = <0x5>;
ti,fifo-depth = <0x1>;
linux,phandle = <0x12>;
phandle = <0x12>;
};
};
gpio@ff0a0000 {
compatible = "xlnx,zynqmp-gpio-1.0";
status = "okay";
#gpio-cells = <0x2>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x10 0x4>;
interrupt-controller;
#interrupt-cells = <0x2>;
reg = <0x0 0xff0a0000 0x0 0x1000>;
gpio-controller;
power-domains = <0x13>;
clocks = <0x3 0x1f>;
emio-gpio-width = <0x20>;
gpio-mask-high = <0x0>;
gpio-mask-low = <0x5600>;
xen,passthrough = <0x1>;
};
i2c@ff020000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x11 0x4>;
reg = <0x0 0xff020000 0x0 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x14>;
clocks = <0x3 0x3d>;
};
i2c@ff030000 {
compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x12 0x4>;
reg = <0x0 0xff030000 0x0 0x1000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x15>;
clocks = <0x3 0x3e>;
clock-frequency = <0x61a80>;
i2cswitch@70 {
compatible = "nxp,pca9542";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x70>;
i2c@0 {
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
eeprom@51 {
compatible = "at,24c08";
reg = <0x51>;
};
};
};
};
memory-controller@ff960000 {
compatible = "xlnx,zynqmp-ocmc-1.0";
reg = <0x0 0xff960000 0x0 0x1000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0xa 0x4>;
};
perf-monitor@ffa00000 {
compatible = "xlnx,axi-perf-monitor";
reg = <0x0 0xffa00000 0x0 0x10000>;
interrupts = <0x0 0x19 0x4>;
interrupt-parent = <0x4>;
xlnx,enable-profile = <0x0>;
xlnx,enable-trace = <0x0>;
xlnx,num-monitor-slots = <0x1>;
xlnx,enable-event-count = <0x1>;
xlnx,enable-event-log = <0x0>;
xlnx,have-sampled-metric-cnt = <0x1>;
xlnx,num-of-counters = <0x3>;
xlnx,metric-count-width = <0x20>;
xlnx,metrics-sample-count-width = <0x20>;
xlnx,global-count-width = <0x20>;
xlnx,metric-count-scale = <0x1>;
clocks = <0x3 0x1f>;
xlnx,enable-32bit-filter-id = <0x1>;
xlnx,enable-advanced = <0x1>;
xlnx,fifo-axis-depth = <0x20>;
xlnx,fifo-axis-tdata-width = <0x38>;
xlnx,fifo-axis-tid-width = <0x1>;
};
pcie@fd0e0000 {
compatible = "xlnx,nwl-pcie-2.11";
status = "disabled";
#address-cells = <0x3>;
#size-cells = <0x2>;
#interrupt-cells = <0x1>;
msi-controller;
device_type = "pci";
interrupt-parent = <0x4>;
interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
msi-parent = <0x16>;
reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
bus-range = <0x0 0xff>;
interrupt-map = <0x0 0x0 0x0 0x1 0x17 0x1 0x0 0x0 0x0 0x2 0x17 0x2 0x0 0x0 0x0 0x3 0x17 0x3 0x0 0x0 0x0 0x4 0x17 0x4>;
power-domains = <0x18>;
clocks = <0x3 0x17>;
linux,phandle = <0x16>;
phandle = <0x16>;
legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0x0>;
#interrupt-cells = <0x1>;
linux,phandle = <0x17>;
phandle = <0x17>;
};
};
spi@ff0f0000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-qspi-1.0";
status = "okay";
clock-names = "ref_clk", "pclk";
interrupts = <0x0 0xf 0x4>;
interrupt-parent = <0x4>;
num-cs = <0x2>;
reg = <0x0 0xff0f0000 0x0 0x1000 0x0 0xc0000000 0x0 0x8000000>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x873>;
power-domains = <0x19>;
clocks = <0x3 0x35 0x3 0x1f>;
is-dual = <0x1>;
spi-rx-bus-width = <0x4>;
spi-tx-bus-width = <0x4>;
xlnx,fb-clk = <0x1>;
linux,phandle = <0x25>;
phandle = <0x25>;
flash@0 {
compatible = "micron,m25p80";
spi-tx-bus-width = <0x1>;
spi-rx-bus-width = <0x4>;
reg = <0x0>;
#address-cells = <0x1>;
#size-cells = <0x1>;
spi-max-frequency = <0x66ff300>;
partition@0x00000000 {
label = "boot";
reg = <0x0 0x1360000>;
};
partition@0x01360000 {
label = "bootenv";
reg = <0x1360000 0x40000>;
};
partition@0x013a0000 {
label = "kernel";
reg = <0x13a0000 0x1700000>;
};
};
};
rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
status = "okay";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>;
interrupt-names = "alarm", "sec";
calibration = <0x8000>;
};
zynqmp_phy@fd400000 {
compatible = "xlnx,zynqmp-psgtr-v1.1";
status = "okay";
reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>;
reg-names = "serdes", "siou";
nvmem-cells = <0x1a>;
nvmem-cell-names = "soc_revision";
resets = <0x1b 0x10 0x1b 0x3b 0x1b 0x3c 0x1b 0x3d 0x1b 0x3e 0x1b 0x3f 0x1b 0x40 0x1b 0x3 0x1b 0x1d 0x1b 0x1e 0x1b 0x1f 0x1b 0x20>;
reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst";
lane0 {
#phy-cells = <0x4>;
};
lane1 {
#phy-cells = <0x4>;
};
lane2 {
#phy-cells = <0x4>;
};
lane3 {
#phy-cells = <0x4>;
};
};
ahci@fd0c0000 {
compatible = "ceva,ahci-1v84";
status = "okay";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x85 0x4>;
power-domains = <0x1c>;
#stream-id-cells = <0x4>;
iommus = <0x9 0x4c0 0x9 0x4c1 0x9 0x4c2 0x9 0x4c3>;
clocks = <0x3 0x16>;
ceva,p0-burst-params = <0x13084a06>;
ceva,p0-cominit-params = <0x18401828>;
ceva,p0-comwake-params = <0x614080e>;
ceva,p0-retry-params = <0x96a43ffc>;
ceva,p1-burst-params = <0x13084a06>;
ceva,p1-cominit-params = <0x18401828>;
ceva,p1-comwake-params = <0x614080e>;
ceva,p1-retry-params = <0x96a43ffc>;
};
sdhci@ff160000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x30 0x4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x870>;
power-domains = <0x1d>;
clocks = <0x3 0x36 0x3 0x1f>;
clock-frequency = <0xbebba30>;
xlnx,mio_bank = <0x0>;
bus-width = <0x8>;
max-frequency = <0x2faf080>;
linux,phandle = <0x36>;
phandle = <0x36>;
};
sdhci@ff170000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x31 0x4>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0x1>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x871>;
power-domains = <0x1e>;
clocks = <0x3 0x37 0x3 0x1f>;
clock-frequency = <0xbebba30>;
xlnx,mio_bank = <0x1>;
max-frequency = <0x2faf080>;
no-1-8-v;
linux,phandle = <0x37>;
phandle = <0x37>;
};
pinctrl@ff180000 {
compatible = "xlnx,zynqmp-pinctrl";
status = "okay";
reg = <0x0 0xff180000 0x0 0x1000>;
};
smmu@fd800000 {
compatible = "arm,mmu-500";
reg = <0x0 0xfd800000 0x0 0x20000>;
#iommu-cells = <0x1>;
status = "okay";
#global-interrupts = <0x1>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4>;
mmu-masters = <0x1f 0x874 0x20 0x875 0x21 0x876 0x22 0x877 0x23 0x860 0x24 0x861 0x25 0x873 0x26 0x868 0x27 0x869 0x28 0x86a 0x29 0x86b 0x2a 0x86c 0x2b 0x86d 0x2c 0x86e 0x2d 0x86f 0x2e 0x14e8 0x2f 0x14e9 0x30 0x14ea 0x31 0x14eb 0x32 0x14ec 0x33 0x14ed 0x34 0x14ee 0x35 0x14ef 0x36 0x870 0x37 0x871 0x38 0x872>;
linux,phandle = <0x9>;
phandle = <0x9>;
};
spi@ff040000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x13 0x4>;
reg = <0x0 0xff040000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x39>;
clocks = <0x3 0x3a 0x3 0x1f>;
};
spi@ff050000 {
compatible = "cdns,spi-r1p6";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x14 0x4>;
reg = <0x0 0xff050000 0x0 0x1000>;
clock-names = "ref_clk", "pclk";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <0x3a>;
clocks = <0x3 0x3b 0x3 0x1f>;
};
timer@ff110000 {
compatible = "cdns,ttc";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
xen,passthrough;
};
timer@ff120000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
};
timer@ff130000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3c>;
clocks = <0x3 0x1f>;
};
timer@ff140000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3d>;
clocks = <0x3 0x1f>;
};
serial@ff000000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x15 0x4>;
reg = <0x0 0xff000000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <0x3e>;
clocks = <0x3 0x38 0x3 0x1f>;
device_type = "serial";
port-number = <0x0>;
};
serial@ff010000 {
u-boot,dm-pre-reloc;
compatible = "cdns,uart-r1p12", "xlnx,xuartps";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x16 0x4>;
reg = <0x0 0xff010000 0x0 0x1000>;
clock-names = "uart_clk", "pclk";
power-domains = <0x3f>;
clocks = <0x3 0x39 0x3 0x1f>;
device_type = "serial";
port-number = <0x1>;
xen,passthrough = <0x1>;
};
usb0@ff9d0000 {
#address-cells = <0x2>;
#size-cells = <0x2>;
status = "okay";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9d0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <0x40>;
ranges;
nvmem-cells = <0x1a>;
nvmem-cell-names = "soc_revision";
clocks = <0x3 0x20 0x3 0x22>;
xlnx,usb-reset = <0x2faf080>;
dwc3@fe200000 {
compatible = "snps,dwc3";
status = "okay";
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x41 0x4 0x0 0x45 0x4 0x0 0x4b 0x4>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
dr_mode = "host";
phy-names = "usb3-phy";
linux,phandle = <0x23>;
phandle = <0x23>;
};
};
usb1@ff9e0000 {
#address-cells = <0x2>;
#size-cells = <0x2>;
status = "disabled";
compatible = "xlnx,zynqmp-dwc3";
reg = <0x0 0xff9e0000 0x0 0x100>;
clock-names = "bus_clk", "ref_clk";
power-domains = <0x41>;
ranges;
nvmem-cells = <0x1a>;
nvmem-cell-names = "soc_revision";
clocks = <0x3 0x21 0x3 0x22>;
dwc3@fe300000 {
compatible = "snps,dwc3";
status = "disabled";
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <0x4>;
interrupts = <0x0 0x46 0x4 0x0 0x4a 0x4 0x0 0x4c 0x4>;
#stream-id-cells = <0x1>;
iommus = <0x9 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
snps,refclk_fladj;
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
snps,xhci-stream-quirk;
linux,phandle = <0x24>;
phandle = <0x24>;
};
};
watchdog@fd4d0000 {
compatible = "cdns,wdt-r1p2";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x71 0x1>;
reg = <0x0 0xfd4d0000 0x0 0x1000>;
timeout-sec = <0xa>;
clocks = <0x3 0x4b>;
};
ams@ffa50000 {
compatible = "xlnx,zynqmp-ams";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x38 0x4>;
interrupt-names = "ams-irq";
reg = <0x0 0xffa50000 0x0 0x800>;
reg-names = "ams-base";
#address-cells = <0x2>;
#size-cells = <0x2>;
#io-channel-cells = <0x1>;
ranges;
clocks = <0x3 0x46>;
ams_ps@ffa50800 {
compatible = "xlnx,zynqmp-ams-ps";
status = "okay";
reg = <0x0 0xffa50800 0x0 0x400>;
};
ams_pl@ffa50c00 {
compatible = "xlnx,zynqmp-ams-pl";
status = "okay";
reg = <0x0 0xffa50c00 0x0 0x400>;
};
};
dma@fd4c0000 {
compatible = "xlnx,dpdma";
status = "disabled";
reg = <0x0 0xfd4c0000 0x0 0x1000>;
interrupts = <0x0 0x7a 0x4>;
interrupt-parent = <0x4>;
clock-names = "axi_clk";
power-domains = <0x42>;
dma-channels = <0x6>;
#dma-cells = <0x1>;
clocks = <0x3 0x14>;
linux,phandle = <0x44>;
phandle = <0x44>;
dma-video0channel {
compatible = "xlnx,video0";
};
dma-video1channel {
compatible = "xlnx,video1";
};
dma-video2channel {
compatible = "xlnx,video2";
};
dma-graphicschannel {
compatible = "xlnx,graphics";
};
dma-audio0channel {
compatible = "xlnx,audio0";
};
dma-audio1channel {
compatible = "xlnx,audio1";
};
};
zynqmp-display@fd4a0000 {
compatible = "xlnx,zynqmp-dpsub-1.7";
status = "disabled";
reg = <0x0 0xfd4a0000 0x0 0x1000 0x0 0xfd4aa000 0x0 0x1000 0x0 0xfd4ab000 0x0 0x1000 0x0 0xfd4ac000 0x0 0x1000>;
reg-names = "dp", "blend", "av_buf", "aud";
interrupts = <0x0 0x77 0x4>;
interrupt-parent = <0x4>;
clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
power-domains = <0x42>;
clocks = <0x43 0x3 0x11 0x3 0x10>;
vid-layer {
dma-names = "vid0", "vid1", "vid2";
dmas = <0x44 0x0 0x44 0x1 0x44 0x2>;
};
gfx-layer {
dma-names = "gfx0";
dmas = <0x44 0x3>;
};
i2c-bus {
};
zynqmp_dp_snd_codec0 {
compatible = "xlnx,dp-snd-codec";
clock-names = "aud_clk";
clocks = <0x3 0x11>;
linux,phandle = <0x47>;
phandle = <0x47>;
};
zynqmp_dp_snd_pcm0 {
compatible = "xlnx,dp-snd-pcm";
dmas = <0x44 0x4>;
dma-names = "tx";
linux,phandle = <0x45>;
phandle = <0x45>;
};
zynqmp_dp_snd_pcm1 {
compatible = "xlnx,dp-snd-pcm";
dmas = <0x44 0x5>;
dma-names = "tx";
linux,phandle = <0x46>;
phandle = <0x46>;
};
zynqmp_dp_snd_card {
compatible = "xlnx,dp-snd-card";
xlnx,dp-snd-pcm = <0x45 0x46>;
xlnx,dp-snd-codec = <0x47>;
};
};
};
fclk0 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x47>;
};
fclk1 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x48>;
};
fclk2 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x49>;
};
fclk3 {
status = "disabled";
compatible = "xlnx,fclk";
clocks = <0x3 0x4a>;
};
pss_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x1fca055>;
linux,phandle = <0x48>;
phandle = <0x48>;
};
video_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x19bfcc0>;
linux,phandle = <0x49>;
phandle = <0x49>;
};
pss_alt_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x0>;
linux,phandle = <0x4a>;
phandle = <0x4a>;
};
gt_crx_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x66ff300>;
linux,phandle = <0x4c>;
phandle = <0x4c>;
};
aux_ref_clk {
u-boot,dm-pre-reloc;
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x19bfcc0>;
linux,phandle = <0x4b>;
phandle = <0x4b>;
};
clk {
u-boot,dm-pre-reloc;
#clock-cells = <0x1>;
compatible = "xlnx,zynqmp-clk";
clocks = <0x48 0x49 0x4a 0x4b 0x4c>;
clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
linux,phandle = <0x3>;
phandle = <0x3>;
};
dp_aclk {
compatible = "fixed-clock";
#clock-cells = <0x0>;
clock-frequency = <0x5f5e100>;
clock-accuracy = <0x64>;
linux,phandle = <0x43>;
phandle = <0x43>;
};
amba_pl@0 {
#address-cells = <0x2>;
#size-cells = <0x2>;
compatible = "simple-bus";
ranges;
gpio@80000000 {
#gpio-cells = <0x3>;
clock-names = "s_axi_aclk";
clocks = <0x3 0x47>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller;
reg = <0x0 0x80000000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
};
gpio@80001000 {
#gpio-cells = <0x3>;
clock-names = "s_axi_aclk";
clocks = <0x3 0x47>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller;
reg = <0x0 0x80001000 0x0 0x1000>;
xlnx,all-inputs = <0x0>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x1>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x8>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
};
gpio@80002000 {
#gpio-cells = <0x3>;
clock-names = "s_axi_aclk";
clocks = <0x3 0x47>;
compatible = "xlnx,xps-gpio-1.00.a";
gpio-controller;
reg = <0x0 0x80002000 0x0 0x1000>;
xlnx,all-inputs = <0x1>;
xlnx,all-inputs-2 = <0x0>;
xlnx,all-outputs = <0x0>;
xlnx,all-outputs-2 = <0x0>;
xlnx,dout-default = <0x0>;
xlnx,dout-default-2 = <0x0>;
xlnx,gpio-width = <0x3>;
xlnx,gpio2-width = <0x20>;
xlnx,interrupt-present = <0x0>;
xlnx,is-dual = <0x0>;
xlnx,tri-default = <0xffffffff>;
xlnx,tri-default-2 = <0xffffffff>;
};
PERIPHERAL@ff380000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff380000 0x0 0x80000>;
};
PERIPHERAL@ff990000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff990000 0x0 0x10000>;
};
};
chosen {
bootargs = "earlycon clk_ignore_unused root=/dev/ram rw";
stdout-path = "serial0:115200n8";
#address-cells = <0x2>;
#size-cells = <0x1>;
xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=768M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native";
xen,dom0-bootargs = "console=hvc0 earlycon=xen earlyprintk=xen maxcpus=1 clk_ignore_unused";
dom0 {
compatible = "xen,linux-zimage", "xen,multiboot-module";
reg = <0x0 0x80000 0x3100000>;
};
};
aliases {
ethernet0 = "/amba/ethernet@ff0e0000";
i2c0 = "/amba/i2c@ff030000";
serial0 = "/amba/serial@ff000000";
serial1 = "/amba/serial@ff010000";
spi0 = "/amba/spi@ff0f0000";
};
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x7ff00000>;
};
};
[-- Attachment #15: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-15 8:14 ` Julien Grall
@ 2018-10-15 12:50 ` Julien Grall
2018-10-15 13:01 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-15 12:50 UTC (permalink / raw)
To: Milan Boberic, stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, Meng Xu, xen-devel, nd
(Resending with a different address)
On 15/10/2018 09:14, Julien Grall wrote:
>
>
> On 10/13/2018 05:01 PM, Milan Boberic wrote:
>> Hi,
>
> Hi,
>
>>
>>> Don't interrupt _come_ from hardware and go/are routed to
>>> hypervisor/os/app?
>> Yes they do, sorry, I reversed the order because I'm a newbie :) .
>>
>>> Would you mind to explain what is the triple timer counter?
>> On this link on page 342 is explanation.
>
> Which link?
>
>>
>>> This is not the official Xen repository and look like patches have
>>> been applied on top. I am afraid, I am not going to be able help
>>> here. Could you do the same experiment with Xen 4.11?
>>
>> I think I have to get Xen from Xilinx because I use board that has
>> Zynq Ultrascale. Stefano sent branch with Xen 4.11 so I built with it.
>
> The board should be fully supported upstreamed. If Xilinx has more patch
> on top, then you would need to seek support from them because I don't
> know what they changed in Xen.
>
> Cheers,
>
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-15 12:50 ` Julien Grall
@ 2018-10-15 13:01 ` Milan Boberic
2018-10-15 13:03 ` Julien Grall
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-15 13:01 UTC (permalink / raw)
To: julien.grall
Cc: nd, sstabellini, andrii_anisov, Dario Faggioli, Meng Xu,
xen-devel, stefano.stabellini
> On 15/10/2018 09:14, Julien Grall wrote:
> Which link?
I made hyperlink on "link" word, looks like somehow it got lost, here
is the link:
https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
> The board should be fully supported upstreamed. If Xilinx has more patch
> on top, then you would need to seek support from them because I don't
> know what they changed in Xen.
I think Stefano can help, thanks for sugesstion.
Cheers,
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-15 13:01 ` Milan Boberic
@ 2018-10-15 13:03 ` Julien Grall
2018-10-17 15:19 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-15 13:03 UTC (permalink / raw)
To: Milan Boberic
Cc: sstabellini, andrii_anisov, stefano.stabellini, Dario Faggioli,
Meng Xu, xen-devel, nd
On 15/10/2018 14:01, Milan Boberic wrote:
>> On 15/10/2018 09:14, Julien Grall wrote:
>> Which link?
>
> I made hyperlink on "link" word, looks like somehow it got lost, here
> is the link:
>
> https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
HTML should be avoided on the mailing list. Most of us are using
text-only clients.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-15 12:27 ` Milan Boberic
@ 2018-10-16 7:13 ` Stefano Stabellini
0 siblings, 0 replies; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-16 7:13 UTC (permalink / raw)
To: Milan Boberic
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, stefano.stabellini
[-- Attachment #1: Type: TEXT/PLAIN, Size: 9686 bytes --]
On Mon, 15 Oct 2018, Milan Boberic wrote:
> In attachment are device-tree files I found in my project:
>
> device-tree.bbappend - under
> <path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/
>
> xen-overlay.dtsi , system-user.dtsi and zunqmp-qemu-arm.dts - under
> <path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/files
>
> zynqmp-qemu-multiarch-arm and zynqmp-qemu-pmu - under
> <path_to_project>/uz3eg_iocc_2018_2/project-spec/meta-user/recipes-bsp/device-tree/files/multi-arch
>
> pcw.dtsi , pl.dtsi , system-conf.dtsi , sistem-top.dts ,
> zynqmp-clk-ccf.dtsi and zynqmp.dtsi -
> under<path_to_project>/uz3eg_iocc_2018_2/components/plnx_workspace/device-tree/device-tree/
>
> In system-conf.dtsi file first line says:
> /*
> * CAUTION: This file is automatically generated by PetaLinux SDK.
> * DO NOT modify this file
> */
> and there is no sigh of timer.
> If you could take a look at this and other files in attachment it
> would be great.
The device tree with everything seems to be system.dts, that was enough
:-) I don't need the dtsi files you used to build the final dts, I only
need the one you use in uboot and for your guest.
In system.dts, the timers are all there:
timer@ff110000 {
compatible = "cdns,ttc";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
reg = <0x0 0xff110000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
xen,passthrough;
};
timer@ff120000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>;
reg = <0x0 0xff120000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3b>;
clocks = <0x3 0x1f>;
};
timer@ff130000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>;
reg = <0x0 0xff130000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3c>;
clocks = <0x3 0x1f>;
};
timer@ff140000 {
compatible = "cdns,ttc";
status = "disabled";
interrupt-parent = <0x4>;
interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>;
reg = <0x0 0xff140000 0x0 0x1000>;
timer-width = <0x20>;
power-domains = <0x3d>;
clocks = <0x3 0x1f>;
};
It looks like you set xen,passthrough correctly in system.dts for
timer@ff110000, serial@ff010000, and gpio@ff0a0000.
> I also tried to run bare-metal app with this changes and it worked, added:
>
> &ttc0 {
> status = "okay";
> compatible = "cdns,ttc";
> interrupt-parent = <0x4>;
> interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> reg = <0x0 0xff110000 0x0 0x1000>;
> timer-width = <0x20>;
> power-domains = <0x3b>;
> xen,passthrough;
>
> };
>
> in xen-overlay.dtsi file, because it's overlay it shouldn't duplicate
> timer nod, right?
As I wrote, system.dts looks correct.
> After build I ran:
> dtc -I dtb -O dts -o system.dts system.dtb
> and checked for ttc0, it seems okay except interrupt-parent is <0x4>
> not <0x2> like in your example:
I don't know what you are referring to. In the system.dts you attached
interrupt-parent is <0x4> which is correct:
timer@ff110000 {
compatible = "cdns,ttc";
status = "okay";
interrupt-parent = <0x4>;
> timer@ff110000 {
> compatible = "cdns,ttc";
> status = "okay";
> interrupt-parent = <0x4>;
> interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> reg = <0x0 0xff110000 0x0 0x1000>;
> timer-width = <0x20>;
> power-domains = <0x3b>;
> clocks = <0x3 0x1f>;
> xen,passthrough;
> };
> status was "disable" before.
> system.dts is also added in attachment.
status is "okay" in the system.dts you attached. That is important
because status = "disable" it means the device cannot be used.
> Is this the working passthrough?Because jitter is the same .
>
> When legit, working passthrough is set correctly, jitter should be
> smaller, right?
If you are not getting any errors anymore when creating your baremetal
guest, then yes, it should be working passthrough. I would double-check
that everything is working as expected using the DEBUG patch for Xen I
suggested to you in the other email. You might even want to remove the
"if" check and always print something for every interrupt of your guest
just to get an idea of what's going on. See the attached patch.
Once everything is as expected I would change the frequency of the
timer, because 1u is way too frequent. I think it should be at least
3us, more like 5us. Keep in mind that jitter is about having
deterministic IRQ latency, not about having extremely frequent
interrupts.
I would also double check that you are not using any other devices or
virtual interfaces in your baremetal app because that could negatively
affect the numbers. For instance, Linux by default uses the virtual
timer interface ("arm,armv8-timer", I would double check that the
baremetal app is not doing the same -- you don't want to be using two
timers when doing your measurements.
> Thanks in advance!
> Milan
> On Mon, Oct 15, 2018 at 12:50 AM Stefano Stabellini
> <stefano.stabellini@xilinx.com> wrote:
> >
> > On Sat, 13 Oct 2018, Milan Boberic wrote:
> > > > This is definitely wrong. Can you please also post the full host device
> > > > tree with your modifications that you are using for Xen and Dom0? You
> > > > should have something like:
> > > >
> > > > timer@ff110000 {
> > > > compatible = "cdns,ttc";
> > > > interrupt-parent = <0x2>;
> > > > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > > > reg = <0x0 0xff110000 0x0 0x1000>;
> > > > timer-width = <0x20>;
> > > > power-domains = <0x3b>;
> > > > xen,passthrough;
> > > > };
> > > > For each of the nodes of the devices you are assigning to the DomU.
> > >
> > > I put
> > > &ttc0 {
> > > xen,passthrough = <0x1>;
> > > };
> > > because when I was making bm app I was following this guide. Now I see
> > > it's wrong. When I copied directly:
> > > timer@ff110000 {
> > > compatible = "cdns,ttc";
> > > interrupt-parent = <0x2>;
> > > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > > reg = <0x0 0xff110000 0x0 0x1000>;
> > > timer-width = <0x20>;
> > > power-domains = <0x3b>;
> > > xen,passthrough;
> > > };
> > > in to the xen-overlay.dtsi file it resulted an error during
> > > device-tree build. I modified it a little bit so I can get successful
> > > build, there are all device-tree files included in attachment. I'm not
> > > sure how to set this passthrough properly, if you could take a look at
> > > those files in attachment I'd be more then grateful.
> > >
> > > > It's here: https://github.com/Xilinx/xen/blob/xilinx/stable-4.9/xen/arch/arm/vgic.c#L462
> > > Oh, about that. I sent you wrong branch, I was using Xen 4.10. Anyway
> > > now I moved to Xen 4.11 like you suggested and applied your patch and
> > > Dario's also.
> > >
> > > Okay, now when I want to xl create my domU (bare-metal app) I get error:
> > >
> > > Parsing config from timer.cfg
> > > (XEN) IRQ 68 is already used by domain 0
> > > libxl: error: libxl_create.c:1354:domcreate_launch_dm: Domain 1:failed
> > > give domain access to irq 68: Device or resource busy
> > > libxl: error: libxl_domain.c:1034:libxl__destroy_domid: Domain
> > > 1:Non-existant domain
> > > libxl: error: libxl_domain.c:993:domain_destroy_callback: Domain
> > > 1:Unable to destroy guest
> > > libxl: error: libxl_domain.c:920:domain_destroy_cb: Domain
> > > 1:Destruction of domain failed
> >
> > That means that the "xen,passthrough" addition to the host device tree went wrong.
> >
> >
> > > I guess my modifications of:
> > > timer@ff110000 {
> > > compatible = "cdns,ttc";
> > > interrupt-parent = <0x2>;
> > > interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
> > > reg = <0x0 0xff110000 0x0 0x1000>;
> > > timer-width = <0x20>;
> > > power-domains = <0x3b>;
> > > xen,passthrough;
> > > };
> > > are not correct.
> >
> > Right
> >
> >
> > > I tried to change interrupts to:
> > > interrupts = <0x0 0x44 0x4 0x0 0x45 0x4 0x0 0x46 0x4>;
> > > because if you check here on page 310 interrupts for TTC0 are 68:70.
> > > But that didn't work either I still get same error.
> >
> > The interrupt numbers specified in the DTS are the real interrupt minus
> > 32: 68-32 = 36 = 0x24. The DTS was correct.
> >
> >
> > > I also tried to change xen,passthrough; line with:
> > > xen,passthrough = <0x1>;
> > > but also without success, still the same error.
> > >
> > > Are you sure about this line:
> > > reg = <0x0 0xff110000 0x0 0x1000>; ?
> > > Or it should be like this?
> > > reg = <0x0 0xff110000 0x1000>;
> >
> > Yes, that could be a problem. The format depends on the #address-cells
> > and #size-cells parameters. You didn't send me system-conf.dtsi, so I
> > don't know for sure which one of the two is right. In any case, you
> > should not duplicate the timer@ff110000 node in device tree. You should
> > only add "xen,passthrough;" to the existing timer@ff110000 node, which
> > is probably in system-conf.dtsi. So, avoid adding a new timer node to
> > xen-overlay.dtsi, and instead modify system-conf.dtsi.
> >
> >
> > > I also included xl dmesg and dmesg in attachments (after xl create of bm app).
> > >
> > > Thanks in advance!
> > >
> > > Milan
> > >
>
[-- Attachment #2: Type: TEXT/PLAIN, Size: 582 bytes --]
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 5a4f082..b7a8e17 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -577,7 +577,11 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
/* the irq is enabled */
if ( test_bit(GIC_IRQ_GUEST_ENABLED, &n->status) )
+ {
gic_raise_guest_irq(v, virq, priority);
+ if ( d->domain_id != 0 )
+ printk("DEBUG virq=%d local=%d\n",virq,v == current);
+ }
list_for_each_entry ( iter, &v->arch.vgic.inflight_irqs, inflight )
{
[-- Attachment #3: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-15 13:03 ` Julien Grall
@ 2018-10-17 15:19 ` Milan Boberic
2018-10-19 21:02 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-17 15:19 UTC (permalink / raw)
To: julien.grall
Cc: sstabellini, andrii_anisov, stefano.stabellini, Dario Faggioli,
Meng Xu, xen-devel, nd
Hi,
>
> The device tree with everything seems to be system.dts, that was enough
> :-) I don't need the dtsi files you used to build the final dts, I only
> need the one you use in uboot and for your guest.
I wasn't sure so I sent everything, sorry for being bombarded with
all those files. :-)
> It looks like you set xen,passthrough correctly in system.dts for
> timer@ff110000, serial@ff010000, and gpio@ff0a0000.
Thank you for taking a look, now we are sure that passthrough works
correctly because there is no error during guest creation and there
are no prints of "DEBUG irq slow path".
> If you are not getting any errors anymore when creating your baremetal
> guest, then yes, it should be working passthrough. I would double-check
> that everything is working as expected using the DEBUG patch for Xen I
> suggested to you in the other email. You might even want to remove the
> "if" check and always print something for every interrupt of your guest
> just to get an idea of what's going on. See the attached patch.
When I apply this patch it prints forever:
(XEN) DEBUG virq=68 local=1
which is a good thing I guess because interrupts are being generated non-stop.
> Once everything is as expected I would change the frequency of the
> timer, because 1u is way too frequent. I think it should be at least
> 3us, more like 5us.
Okay, about this... I double checked my bare-metal application and
looks like interrupts weren't generated every 1 us. Maximum frequency
of interrupts is 8 us. I checked interrupt frequency with oscilloscope
just to be sure (toggling LED on/off when interrupts occur). So, when
I set:
- interrupts to be generated every 8 us I get jitter of 6 us
- interrupts to be generated every 10 us I get jitter of 3 us (after
2-3mins it jumps to 6 us)
- interrupts to be generated every 15 us jitter is the same as when
only bare-metal application runs on board (without Xen or any OS)
I want to remind you that bare-metal application that only blinks LED
with high speed gives 1 us jitter, somehow introducing frequent
interrupts causes this jitter, that's why I was unsecure about this
timer passthrough. Taking in consideration that you measured Xen
overhead of 1 us I have a feeling that I'm missing something, is there
anything else I could do to get better results except sched=null,
vwfi=native, hard vCPU pinning (1 vCPU on 1 pCPU) and passthrough (not
sure if it affects the jitter) ?
I'm forcing frequent interrupts because I'm testing to see if this
board with Xen on it could be used for real-time simulations,
real-time signal processing, etc. If I could get results like yours (1
us Xen overhead) of even better that would be great! BTW how did you
measure Xen's overhead?
> Keep in mind that jitter is about having
> deterministic IRQ latency, not about having extremely frequent
> interrupts.
Yes, but I want to see exactly where will I lose deterministic IRQ
latency which is extremely important in real-time signal processing.
So, what causes this jitter, are those Xen limits, ARM limits, etc? It
would be nice to know, I'll share all the results I get.
> I would also double check that you are not using any other devices or
> virtual interfaces in your baremetal app because that could negatively
> affect the numbers.
I checked the bare-metal app and I think there is no other devices
that bm app is using.
> Linux by default uses the virtual
> timer interface ("arm,armv8-timer", I would double check that the
> baremetal app is not doing the same -- you don't want to be using two
> timers when doing your measurements.
Hmm, I'm not sure how to check that, I could send bare-metal app if
that helps, it's created in Xilinx SDK 2017.4.
Also, should I move to Xilinx SDK 2018.2 because I'm using PetaLinux 2018.2 ?
I'm also using hardware description file for SDK that is created in
Vivado 2017.4.
Is all this could be a "not matching version" problem (I don't think
so because bm app works)?
Meng mentioned in some of his earlier posts:
> Even though the app. is the only one running on the CPU, the CPU may
> be used to handle other interrupts and its context (such as TLB and
> cache) might be flushed by other components. When these happen, the
> interrupt handling latency can vary a lot.
What do you think about this? I don't know how would I check this.
I also tried using default scheduler (removed sched=null and
vwfi=native) and jitter is 10 us when interrupt is generated every 10
us.
Thanks in advance!
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-17 15:19 ` Milan Boberic
@ 2018-10-19 21:02 ` Stefano Stabellini
2018-10-19 22:41 ` Dario Faggioli
0 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-19 21:02 UTC (permalink / raw)
To: Milan Boberic
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, julien.grall,
sstabellini, Meng Xu, xen-devel, nd
On Wed, 17 Oct 2018, Milan Boberic wrote:
> Hi,
> >
> > The device tree with everything seems to be system.dts, that was enough
> > :-) I don't need the dtsi files you used to build the final dts, I only
> > need the one you use in uboot and for your guest.
>
> I wasn't sure so I sent everything, sorry for being bombarded with
> all those files. :-)
>
> > It looks like you set xen,passthrough correctly in system.dts for
> > timer@ff110000, serial@ff010000, and gpio@ff0a0000.
>
> Thank you for taking a look, now we are sure that passthrough works
> correctly because there is no error during guest creation and there
> are no prints of "DEBUG irq slow path".
Great!
> > If you are not getting any errors anymore when creating your baremetal
> > guest, then yes, it should be working passthrough. I would double-check
> > that everything is working as expected using the DEBUG patch for Xen I
> > suggested to you in the other email. You might even want to remove the
> > "if" check and always print something for every interrupt of your guest
> > just to get an idea of what's going on. See the attached patch.
>
> When I apply this patch it prints forever:
> (XEN) DEBUG virq=68 local=1
> which is a good thing I guess because interrupts are being generated non-stop.
Yes, local=1 means that the interrupt is injected to the local vcpu,
which is exactly what we want.
> > Once everything is as expected I would change the frequency of the
> > timer, because 1u is way too frequent. I think it should be at least
> > 3us, more like 5us.
>
> Okay, about this... I double checked my bare-metal application and
> looks like interrupts weren't generated every 1 us. Maximum frequency
> of interrupts is 8 us. I checked interrupt frequency with oscilloscope
> just to be sure (toggling LED on/off when interrupts occur). So, when
> I set:
> - interrupts to be generated every 8 us I get jitter of 6 us
> - interrupts to be generated every 10 us I get jitter of 3 us (after
> 2-3mins it jumps to 6 us)
> - interrupts to be generated every 15 us jitter is the same as when
> only bare-metal application runs on board (without Xen or any OS)
These are very interesting numbers! Thanks again for running these
experiments. I don't want to jump to conclusions but they seem to verify
the theory that if the interrupt frequency is too high, we end up
spending too much time handling interrupts, the system cannot cope,
hence jitter increases.
However, I would have thought that the threshold should be lower than
15us, given that it takes 2.5us to inject an interrupt. I have a couple
of experiments suggestions below.
> I want to remind you that bare-metal application that only blinks LED
> with high speed gives 1 us jitter, somehow introducing frequent
> interrupts causes this jitter, that's why I was unsecure about this
> timer passthrough. Taking in consideration that you measured Xen
> overhead of 1 us I have a feeling that I'm missing something, is there
> anything else I could do to get better results except sched=null,
> vwfi=native, hard vCPU pinning (1 vCPU on 1 pCPU) and passthrough (not
> sure if it affects the jitter) ?
> I'm forcing frequent interrupts because I'm testing to see if this
> board with Xen on it could be used for real-time simulations,
> real-time signal processing, etc. If I could get results like yours (1
> us Xen overhead) of even better that would be great! BTW how did you
> measure Xen's overhead?
When I said overhead, I meant compared to Linux. The overall IRQ latency
with Xen on the Xilinx Zynq MPSoC is 2.5us. When I say "overall", I mean
from the moment the interrupt is generated to the point the interrupt
service routing is run in the baremetal guest. I measure the overhead
using TBM (https://github.com/sstabellini/tbm phys-timer) and a modified
version of Xen that injects the generic physical timer interrupts to the
guest. I think you should be able to reproduce the same number using
the TTC timer like you are doing.
In addition to sched=null and vwfi=native, I also passed
serrors=panic. This last option further reduces context switch times and
should be safe on your board. You might want to add it, and run the
numbers again.
> > Keep in mind that jitter is about having
> > deterministic IRQ latency, not about having extremely frequent
> > interrupts.
>
> Yes, but I want to see exactly where will I lose deterministic IRQ
> latency which is extremely important in real-time signal processing.
> So, what causes this jitter, are those Xen limits, ARM limits, etc? It
> would be nice to know, I'll share all the results I get.
>
> > I would also double check that you are not using any other devices or
> > virtual interfaces in your baremetal app because that could negatively
> > affect the numbers.
>
> I checked the bare-metal app and I think there is no other devices
> that bm app is using.
This should also be confirmed by the fact that you are only getting
"DEBUG virq=68 local=1" messages and nothing else. If other interrupts
were to be injected you should see other lines such as
DEBUG virq=27 local=1
I have an idea to verify this, see below,
> > Linux by default uses the virtual
> > timer interface ("arm,armv8-timer", I would double check that the
> > baremetal app is not doing the same -- you don't want to be using two
> > timers when doing your measurements.
>
> Hmm, I'm not sure how to check that, I could send bare-metal app if
> that helps, it's created in Xilinx SDK 2017.4.
> Also, should I move to Xilinx SDK 2018.2 because I'm using PetaLinux 2018.2 ?
> I'm also using hardware description file for SDK that is created in
> Vivado 2017.4.
> Is all this could be a "not matching version" problem (I don't think
> so because bm app works)?
>
> Meng mentioned in some of his earlier posts:
>
> > Even though the app. is the only one running on the CPU, the CPU may
> > be used to handle other interrupts and its context (such as TLB and
> > cache) might be flushed by other components. When these happen, the
> > interrupt handling latency can vary a lot.
>
> What do you think about this? I don't know how would I check this.
I think we want to fully understand how many other interrupts the
baremetal guest is receiving. To do that, we can modify my previous
patch to suppress any debug messages for virq=68. That way, we should
only see the other interrupts. Ideally there would be none.
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 5a4f082..b7a8e17 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -577,7 +577,11 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
/* the irq is enabled */
if ( test_bit(GIC_IRQ_GUEST_ENABLED, &n->status) )
+ {
gic_raise_guest_irq(v, virq, priority);
+ if ( d->domain_id != 0 && virq != 68 )
+ printk("DEBUG virq=%d local=%d\n",virq,v == current);
+ }
list_for_each_entry ( iter, &v->arch.vgic.inflight_irqs, inflight )
{
Next step would be to verify that there are no other physical interrupts
interrupting the vcpu execution other the irq=68. We should be able to
check that with the following debug patch:
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index e524ad5..b34c3e4 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -381,6 +381,13 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
/* Reading IRQ will ACK it */
irq = gic_hw_ops->read_irq();
+ if (current->domain->domain_id > 0 && irq != 68)
+ {
+ local_irq_enable();
+ printk("DEBUG irq=%d\n",irq);
+ local_irq_disable();
+ }
+
if ( likely(irq >= 16 && irq < 1020) )
{
local_irq_enable();
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-19 21:02 ` Stefano Stabellini
@ 2018-10-19 22:41 ` Dario Faggioli
2018-10-22 15:02 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Dario Faggioli @ 2018-10-19 22:41 UTC (permalink / raw)
To: Stefano Stabellini, Milan Boberic
Cc: sstabellini, andrii_anisov, julien.grall, Meng Xu, xen-devel, nd
[-- Attachment #1.1: Type: text/plain, Size: 1602 bytes --]
On Fri, 2018-10-19 at 14:02 -0700, Stefano Stabellini wrote:
> On Wed, 17 Oct 2018, Milan Boberic wrote:
> > I checked interrupt frequency with oscilloscope
> > just to be sure (toggling LED on/off when interrupts occur). So,
> > when I set:
> > - interrupts to be generated every 8 us I get jitter of 6 us
> > - interrupts to be generated every 10 us I get jitter of 3 us
> > (after
> > 2-3mins it jumps to 6 us)
> > - interrupts to be generated every 15 us jitter is the same as when
> > only bare-metal application runs on board (without Xen or any OS)
>
> These are very interesting numbers!
>
Indeed.
> Thanks again for running these
> experiments. I don't want to jump to conclusions but they seem to
> verify
> the theory that if the interrupt frequency is too high, we end up
> spending too much time handling interrupts, the system cannot cope,
> hence jitter increases.
>
Yep, this makes a lot of sense.
> However, I would have thought that the threshold should be lower than
> 15us, given that it takes 2.5us to inject an interrupt. I have a
> couple
> of experiments suggestions below.
>
FWIW, I know that numbers are always relative (hw platform, workload,
etc), and I'm happy to see that you're quite confident that we can
improve further... but these numbers seems rather good to me. :-)
Regards,
Dario
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-19 22:41 ` Dario Faggioli
@ 2018-10-22 15:02 ` Milan Boberic
2018-10-22 17:52 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-22 15:02 UTC (permalink / raw)
To: Dario Faggioli
Cc: stefano.stabellini, andrii_anisov, julien.grall, sstabellini,
Meng Xu, xen-devel, nd
Hi,
> I think we want to fully understand how many other interrupts the
> baremetal guest is receiving. To do that, we can modify my previous
> patch to suppress any debug messages for virq=68. That way, we should
> only see the other interrupts. Ideally there would be none.
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 5a4f082..b7a8e17 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -577,7 +577,11 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
> /* the irq is enabled */
> if ( test_bit(GIC_IRQ_GUEST_ENABLED, &n->status) )
> + {
> gic_raise_guest_irq(v, virq, priority);
> + if ( d->domain_id != 0 && virq != 68 )
> + printk("DEBUG virq=%d local=%d\n",virq,v == current);
> + }
> list_for_each_entry ( iter, &v->arch.vgic.inflight_irqs, inflight )
> {
when I apply this patch there are no prints nor debug messages in xl
dmesg. So bare-metal receives only interrupt 68, which is good.
> Next step would be to verify that there are no other physical interrupts
> interrupting the vcpu execution other the irq=68. We should be able to
> check that with the following debug patch:
>
> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> index e524ad5..b34c3e4 100644
> --- a/xen/arch/arm/gic.c
> +++ b/xen/arch/arm/gic.c
> @@ -381,6 +381,13 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
> /* Reading IRQ will ACK it */
> irq = gic_hw_ops->read_irq();
> + if (current->domain->domain_id > 0 && irq != 68)
> + {
> + local_irq_enable();
> + printk("DEBUG irq=%d\n",irq);
> + local_irq_disable();
> + }
> +
> if ( likely(irq >= 16 && irq < 1020) )
> {
> local_irq_enable();
But when I apply this patch it prints forever:
(XEN) DEBUG irq=1023
Thanks in advance!
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-22 15:02 ` Milan Boberic
@ 2018-10-22 17:52 ` Stefano Stabellini
2018-10-23 8:58 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-22 17:52 UTC (permalink / raw)
To: Milan Boberic
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, julien.grall,
sstabellini, Meng Xu, xen-devel, nd
On Mon, 22 Oct 2018, Milan Boberic wrote:
> Hi,
>
> > I think we want to fully understand how many other interrupts the
> > baremetal guest is receiving. To do that, we can modify my previous
> > patch to suppress any debug messages for virq=68. That way, we should
> > only see the other interrupts. Ideally there would be none.
> > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> > index 5a4f082..b7a8e17 100644
> > --- a/xen/arch/arm/vgic.c
> > +++ b/xen/arch/arm/vgic.c
> > @@ -577,7 +577,11 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
> > /* the irq is enabled */
> > if ( test_bit(GIC_IRQ_GUEST_ENABLED, &n->status) )
> > + {
> > gic_raise_guest_irq(v, virq, priority);
> > + if ( d->domain_id != 0 && virq != 68 )
> > + printk("DEBUG virq=%d local=%d\n",virq,v == current);
> > + }
> > list_for_each_entry ( iter, &v->arch.vgic.inflight_irqs, inflight )
> > {
>
> when I apply this patch there are no prints nor debug messages in xl
> dmesg. So bare-metal receives only interrupt 68, which is good.
Yes, good!
> > Next step would be to verify that there are no other physical interrupts
> > interrupting the vcpu execution other the irq=68. We should be able to
> > check that with the following debug patch:
> >
> > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
> > index e524ad5..b34c3e4 100644
> > --- a/xen/arch/arm/gic.c
> > +++ b/xen/arch/arm/gic.c
> > @@ -381,6 +381,13 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq)
> > /* Reading IRQ will ACK it */
> > irq = gic_hw_ops->read_irq();
> > + if (current->domain->domain_id > 0 && irq != 68)
> > + {
> > + local_irq_enable();
> > + printk("DEBUG irq=%d\n",irq);
> > + local_irq_disable();
> > + }
> > +
> > if ( likely(irq >= 16 && irq < 1020) )
> > {
> > local_irq_enable();
>
> But when I apply this patch it prints forever:
> (XEN) DEBUG irq=1023
>
> Thanks in advance!
I know why! It's because we always loop around until we read the
spurious interrupt. Just add an && irq != 1023 to the if check.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-22 17:52 ` Stefano Stabellini
@ 2018-10-23 8:58 ` Milan Boberic
2018-10-24 0:24 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-23 8:58 UTC (permalink / raw)
To: stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, nd
> Just add an && irq != 1023 to the if check.
Added it and now when I create bare-metal guest it prints only once:
(XEN) DEBUG irq=0
(XEN) d1v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ34 in the target list (0x2). Skip it
root@uz3eg-iocc-2018-2:~# (XEN) d1v0 No valid vCPU found for vIRQ35 in
the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
This part always prints only once when I create this bare-metal guest
like I mentioned in earlier replies and we said it doesn't do any
harm:
(XEN) d1v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ34 in the target list (0x2). Skip it
root@uz3eg-iocc-2018-2:~# (XEN) d1v0 No valid vCPU found for vIRQ35 in
the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
Now, from this patch I get:
(XEN) DEBUG irq=0
also printed only once.
Forgot to mention in reply before this one, I added serrors=panic and
it didn't make any change, numbers are the same.
Thanks in advance!
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-23 8:58 ` Milan Boberic
@ 2018-10-24 0:24 ` Stefano Stabellini
2018-10-25 10:09 ` Milan Boberic
2018-10-25 11:09 ` Xen optimization Julien Grall
0 siblings, 2 replies; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-24 0:24 UTC (permalink / raw)
To: Milan Boberic
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, julien.grall,
sstabellini, Meng Xu, xen-devel, nd
On Tue, 23 Oct 2018, Milan Boberic wrote:
> > Just add an && irq != 1023 to the if check.
> Added it and now when I create bare-metal guest it prints only once:
>
> (XEN) DEBUG irq=0
> (XEN) d1v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ34 in the target list (0x2). Skip it
> root@uz3eg-iocc-2018-2:~# (XEN) d1v0 No valid vCPU found for vIRQ35 in
> the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
>
>
> This part always prints only once when I create this bare-metal guest
> like I mentioned in earlier replies and we said it doesn't do any
> harm:
>
> (XEN) d1v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ34 in the target list (0x2). Skip it
> root@uz3eg-iocc-2018-2:~# (XEN) d1v0 No valid vCPU found for vIRQ35 in
> the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
> (XEN) d1v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
>
> Now, from this patch I get:
>
> (XEN) DEBUG irq=0
>
> also printed only once.
>
> Forgot to mention in reply before this one, I added serrors=panic and
> it didn't make any change, numbers are the same.
>
> Thanks in advance!
It is good that there are no physical interrupts interrupting the cpu.
serrors=panic makes the context switch faster. I guess there are not
enough context switches to make a measurable difference.
I don't have any other things to suggest right now. You should be able
to measure an overall 2.5us IRQ latency (if the interrupt rate is not
too high).
Just to be paranoid, we might also want to check the following, again it
shouldn't get printed:
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 5a4f082..6cf6814 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -532,6 +532,8 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
struct pending_irq *iter, *n;
unsigned long flags;
+ if ( d->domain_id != 0 && virq != 68 )
+ printk("DEBUG virq=%d local=%d\n",virq,v == current);
/*
* For edge triggered interrupts we always ignore a "falling edge".
* For level triggered interrupts we shouldn't, but do anyways.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply related [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-24 0:24 ` Stefano Stabellini
@ 2018-10-25 10:09 ` Milan Boberic
2018-10-25 11:30 ` Julien Grall
2018-10-25 11:09 ` Xen optimization Julien Grall
1 sibling, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-25 10:09 UTC (permalink / raw)
To: stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, nd
Hi,
> On Wed, Oct 24, 2018 at 2:24 AM Stefano Stabellini <stefano.stabellini@xilinx.com> wrote:
> It is good that there are no physical interrupts interrupting the cpu.
> serrors=panic makes the context switch faster. I guess there are not
> enough context switches to make a measurable difference.
Yes, when I did:
grep ctxt /proc/2153/status
I got:
voluntary_ctxt_switches: 5
nonvoluntary_ctxt_switches: 3
> I don't have any other things to suggest right now. You should be able
> to measure an overall 2.5us IRQ latency (if the interrupt rate is not
> too high).
This bare-metal application is the most suspicious, indeed. Still
waiting answer on Xilinx forum.
> Just to be paranoid, we might also want to check the following, again it
> shouldn't get printed:
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 5a4f082..6cf6814 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -532,6 +532,8 @@ void vgic_inject_irq(struct domain *d, struct vcpu *v, unsigned int virq,
> struct pending_irq *iter, *n;
> unsigned long flags;
> + if ( d->domain_id != 0 && virq != 68 )
> + printk("DEBUG virq=%d local=%d\n",virq,v == current);
> /*
> * For edge triggered interrupts we always ignore a "falling edge".
> * For level triggered interrupts we shouldn't, but do anyways.
Checked it again, no prints. I hoped that I will discover some vIRQs
or pIRQs slowing things down but no, no prints.
I might try something else instead of this bare-metal application
because this Xilinx SDK example is very suspicious.
Thank you for your time.
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-24 0:24 ` Stefano Stabellini
2018-10-25 10:09 ` Milan Boberic
@ 2018-10-25 11:09 ` Julien Grall
2018-10-25 16:15 ` Stefano Stabellini
1 sibling, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-25 11:09 UTC (permalink / raw)
To: Stefano Stabellini, Milan Boberic
Cc: sstabellini, andrii_anisov, Dario Faggioli, Meng Xu, xen-devel, nd
Hi Stefano,
On 10/24/18 1:24 AM, Stefano Stabellini wrote:
> On Tue, 23 Oct 2018, Milan Boberic wrote:
> I don't have any other things to suggest right now. You should be able
> to measure an overall 2.5us IRQ latency (if the interrupt rate is not
> too high).
Is it number you measured on Xen 4.11 flavored Xilinx? Or are they
coming from the blog post [1] which is based on Xen 4.9?
If the latter, then I can't rule out we may have introduce a slowdown
for good or bad reason...
To rule out this possibility, I would recommend to try and reproduce the
same number on Xen 4.9 and then try with Xen 4.11.
Cheers,
[1] https://blog.xenproject.org/2017/03/20/xen-on-arm-interrupt-latency/
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 10:09 ` Milan Boberic
@ 2018-10-25 11:30 ` Julien Grall
2018-10-25 12:36 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-25 11:30 UTC (permalink / raw)
To: Milan Boberic, stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, Meng Xu, xen-devel, nd
Hi Milan,
On 10/25/18 11:09 AM, Milan Boberic wrote:
> Hi,
>> On Wed, Oct 24, 2018 at 2:24 AM Stefano Stabellini <stefano.stabellini@xilinx.com> wrote:
>> It is good that there are no physical interrupts interrupting the cpu.
>> serrors=panic makes the context switch faster. I guess there are not
>> enough context switches to make a measurable difference.
>
> Yes, when I did:
> grep ctxt /proc/2153/status
> I got:
> voluntary_ctxt_switches: 5
> nonvoluntary_ctxt_switches: 3
>
>> I don't have any other things to suggest right now. You should be able
>> to measure an overall 2.5us IRQ latency (if the interrupt rate is not
>> too high).
>
> This bare-metal application is the most suspicious, indeed. Still
> waiting answer on Xilinx forum.
Sorry if it was already asked. Can you provide your .config for your
test? Do you have DEBUG enabled?
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 11:30 ` Julien Grall
@ 2018-10-25 12:36 ` Milan Boberic
2018-10-25 13:44 ` Dario Faggioli
2018-10-25 14:04 ` Julien Grall
0 siblings, 2 replies; 70+ messages in thread
From: Milan Boberic @ 2018-10-25 12:36 UTC (permalink / raw)
To: julien.grall
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, sstabellini,
Meng Xu, xen-devel, nd
[-- Attachment #1: Type: text/plain, Size: 693 bytes --]
On Thu, Oct 25, 2018 at 1:30 PM Julien Grall <julien.grall@arm.com> wrote:
>
> Hi Milan,
Hi Julien,
> Sorry if it was already asked. Can you provide your .config for your
> test?
Yes of course, bare-metal's .cfg file is in it's in attachment (if
that is what you asked :) ).
> Do you have DEBUG enabled?
I'm not sure where exactly should I disable it. If you check line 18
in xl dmesg file in attachment it says debug=n, it's output of xl
dmesg. I'm not sure if that is the DEBUG you are talking about.
Also if I add prints somewhere in the code, I can see them, does that
mean that DEBUG is enabled? If yes, can you tell me where exactly
should I disable it?
Thanks in advance!
Milan
[-- Attachment #2: timer.cfg.txt --]
[-- Type: text/plain, Size: 196 bytes --]
name = "test"
kernel = "only_timer.bin"
memory = 8
vcpus = 1
cpus = [1]
irqs = [ 48, 54, 68, 69, 70 ]
iomem = [ "0xff010,1", "0xff110,1", "0xff120,1", "0xff130,1", "0xff140,1", "0xff0a0,1" ]
[-- Attachment #3: xl dmesg.txt --]
[-- Type: text/plain, Size: 5037 bytes --]
(XEN) Checking for initrd in /chosen
(XEN) Initrd 0000000002bd7000-0000000005fffd6d
(XEN) RAM: 0000000000000000 - 000000007fefffff
(XEN)
(XEN) MODULE[0]: 0000000007ff4000 - 0000000007ffc080 Device Tree
(XEN) MODULE[1]: 0000000002bd7000 - 0000000005fffd6d Ramdisk
(XEN) MODULE[2]: 0000000000080000 - 0000000003180000 Kernel
(XEN) RESVD[0]: 0000000007ff4000 - 0000000007ffc000
(XEN) RESVD[1]: 0000000002bd7000 - 0000000005fffd6d
(XEN)
(XEN) Command line: console=dtuart dtuart=serial0 dom0_mem=1024M bootscrub=0 dom0_max_vcpus=1 dom0_vcpus_pin=true timer_slop=0 sched=null vwfi=native serrors=panic
(XEN) Placing Xen at 0x000000007fc00000-0x000000007fe00000
(XEN) Update BOOTMOD_XEN from 0000000006000000-0000000006108d81 => 000000007fc00000-000000007fd08d81
(XEN) Domain heap initialised
(XEN) Booting using Device Tree
(XEN) Looking for dtuart at "serial0", options ""
Xen 4.11.1-pre
(XEN) Xen version 4.11.1-pre (milan@) (aarch64-xilinx-linux-gcc (GCC) 7.2.0) debug=n Wed Oct 24 10:11:47 CEST 2018
(XEN) Latest ChangeSet: Mon Sep 24 16:07:33 2018 -0700 git:8610a91abc-dirty
(XEN) Processor: 410fd034: "ARM Limited", variant: 0x0, part 0xd03, rev 0x4
(XEN) 64-bit Execution:
(XEN) Processor Features: 0000000000002222 0000000000000000
(XEN) Exception Levels: EL3:64+32 EL2:64+32 EL1:64+32 EL0:64+32
(XEN) Extensions: FloatingPoint AdvancedSIMD
(XEN) Debug Features: 0000000010305106 0000000000000000
(XEN) Auxiliary Features: 0000000000000000 0000000000000000
(XEN) Memory Model Features: 0000000000001122 0000000000000000
(XEN) ISA Features: 0000000000011120 0000000000000000
(XEN) 32-bit Execution:
(XEN) Processor Features: 00000131:00011011
(XEN) Instruction Sets: AArch32 A32 Thumb Thumb-2 Jazelle
(XEN) Extensions: GenericTimer Security
(XEN) Debug Features: 03010066
(XEN) Auxiliary Features: 00000000
(XEN) Memory Model Features: 10201105 40000000 01260000 02102211
(XEN) ISA Features: 02101110 13112111 21232042 01112131 00011142 00011121
(XEN) Generic Timer IRQ: phys=30 hyp=26 virt=27 Freq: 99999 KHz
(XEN) GICv2 initialization:
(XEN) gic_dist_addr=00000000f9010000
(XEN) gic_cpu_addr=00000000f9020000
(XEN) gic_hyp_addr=00000000f9040000
(XEN) gic_vcpu_addr=00000000f9060000
(XEN) gic_maintenance_irq=25
(XEN) GICv2: Adjusting CPU interface base to 0xf902f000
(XEN) GICv2: 192 lines, 4 cpus, secure (IID 0200143b).
(XEN) Using scheduler: null Scheduler (null)
(XEN) Initializing null scheduler
(XEN) WARNING: This is experimental software in development.
(XEN) Use at your own risk.
(XEN) Allocated console ring of 16 KiB.
(XEN) Bringing up CPU1
(XEN) Bringing up CPU2
(XEN) Bringing up CPU3
(XEN) Brought up 4 CPUs
(XEN) P2M: 40-bit IPA with 40-bit PA and 8-bit VMID
(XEN) P2M: 3 levels with order-1 root, VTCR 0x80023558
(XEN) I/O virtualisation enabled
(XEN) - Dom0 mode: Relaxed
(XEN) Interrupt remapping enabled
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Loading kernel from boot module @ 0000000000080000
(XEN) Loading ramdisk from boot module @ 0000000002bd7000
(XEN) Allocating 1:1 mappings totalling 1024MB for dom0:
(XEN) BANK[0] 0x00000020000000-0x00000060000000 (1024MB)
(XEN) Grant table range: 0x0000007fc00000-0x0000007fc40000
(XEN) Allocating PPI 16 for event channel interrupt
(XEN) Loading zImage from 0000000000080000 to 0000000020080000-0000000023180000
(XEN) Loading dom0 initrd from 0000000002bd7000 to 0x0000000028200000-0x000000002b628d6d
(XEN) Loading dom0 DTB to 0x0000000028000000-0x0000000028006e46
(XEN) Initial low memory virq threshold set at 0x4000 pages.
(XEN) Std. Loglevel: Errors and warnings
(XEN) Guest Loglevel: Nothing (Rate-limited: Errors and warnings)
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen)
(XEN) Freed 280kB init memory.
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER4
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER8
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER12
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER16
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER20
(XEN) d0v0: vGICD: unhandled word write 0xffffffff to ICACTIVER0
(XEN) d1v0 No valid vCPU found for vIRQ32 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ33 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ34 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ35 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ36 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ37 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ38 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ39 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ40 in the target list (0x2). Skip it
(XEN) d1v0 No valid vCPU found for vIRQ41 in the target list (0x2). Skip it
[-- Attachment #4: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 12:36 ` Milan Boberic
@ 2018-10-25 13:44 ` Dario Faggioli
2018-10-25 14:00 ` Julien Grall
2018-10-25 14:04 ` Julien Grall
1 sibling, 1 reply; 70+ messages in thread
From: Dario Faggioli @ 2018-10-25 13:44 UTC (permalink / raw)
To: Milan Boberic, julien.grall
Cc: stefano.stabellini, andrii_anisov, sstabellini, Meng Xu, xen-devel, nd
[-- Attachment #1.1: Type: text/plain, Size: 1365 bytes --]
On Thu, 2018-10-25 at 14:36 +0200, Milan Boberic wrote:
> On Thu, Oct 25, 2018 at 1:30 PM Julien Grall <julien.grall@arm.com>
> wrote:
> > Do you have DEBUG enabled?
>
> I'm not sure where exactly should I disable it. If you check line 18
> in xl dmesg file in attachment it says debug=n, it's output of xl
> dmesg. I'm not sure if that is the DEBUG you are talking about.
>
Yes, this mean debug is *not* enabled. Which is the correct setup for
doing performance/latency evaluation.
It might, OTOH, be wise to turn it on when investigating the system
behavior (but that's a general remark, I don't know to what Julien was
referring to in this specific case).
To turn it on, in a recent enough Xen, which I think is what you're
using, you can use Kconfig (e.g., `make -C xen/ menuconfig').
> Also if I add prints somewhere in the code, I can see them, does that
> mean that DEBUG is enabled? If yes, can you tell me where exactly
> should I disable it?
>
It depends on the "print". If you add 'printk("bla");', it is correct
that you see "bla" in the log, even with debug=n.
Regards,
Dario
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 13:44 ` Dario Faggioli
@ 2018-10-25 14:00 ` Julien Grall
0 siblings, 0 replies; 70+ messages in thread
From: Julien Grall @ 2018-10-25 14:00 UTC (permalink / raw)
To: Dario Faggioli, Milan Boberic
Cc: stefano.stabellini, andrii_anisov, sstabellini, Meng Xu, xen-devel, nd
Hi Dario,
On 10/25/18 2:44 PM, Dario Faggioli wrote:
> On Thu, 2018-10-25 at 14:36 +0200, Milan Boberic wrote:
>> On Thu, Oct 25, 2018 at 1:30 PM Julien Grall <julien.grall@arm.com>
>> wrote:
>>> Do you have DEBUG enabled?
>>
>> I'm not sure where exactly should I disable it. If you check line 18
>> in xl dmesg file in attachment it says debug=n, it's output of xl
>> dmesg. I'm not sure if that is the DEBUG you are talking about.
>>
> Yes, this mean debug is *not* enabled. Which is the correct setup for
> doing performance/latency evaluation.
>
> It might, OTOH, be wise to turn it on when investigating the system
> behavior (but that's a general remark, I don't know to what Julien was
> referring to in this specific case).
The narrow down the discrepancies during the measurement, I wanted to
check whether Milan were doing the performance measurement with debug
enabled.
Now I can tick off DEBUG been a potential cause of the latency/performance.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 12:36 ` Milan Boberic
2018-10-25 13:44 ` Dario Faggioli
@ 2018-10-25 14:04 ` Julien Grall
2018-10-25 14:47 ` Milan Boberic
1 sibling, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-25 14:04 UTC (permalink / raw)
To: Milan Boberic
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, sstabellini,
Meng Xu, xen-devel, nd
On 10/25/18 1:36 PM, Milan Boberic wrote:
> On Thu, Oct 25, 2018 at 1:30 PM Julien Grall <julien.grall@arm.com> wrote:
>>
>> Hi Milan,
>
> Hi Julien,
>
>> Sorry if it was already asked. Can you provide your .config for your
>> test?
>
> Yes of course, bare-metal's .cfg file is in it's in attachment (if
> that is what you asked :) ).
I was asking the Xen configuration (xen/.config) to know what you have
enabled in Xen.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 14:04 ` Julien Grall
@ 2018-10-25 14:47 ` Milan Boberic
2018-10-25 14:51 ` Julien Grall
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-25 14:47 UTC (permalink / raw)
To: julien.grall
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, sstabellini,
Meng Xu, xen-devel, nd
> I was asking the Xen configuration (xen/.config) to know what you have
> enabled in Xen.
Oh, sorry, because I'm building xen from git repository here is the
link to it where you can check the file you mentioned.
https://github.com/Xilinx/xen/tree/xilinx/versal/xen
> It might, OTOH, be wise to turn it on when investigating the system
> behavior (but that's a general remark, I don't know to what Julien was
> referring to in this specific case).
I will definitely try to enable DEBUG.
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 14:47 ` Milan Boberic
@ 2018-10-25 14:51 ` Julien Grall
2018-10-25 16:18 ` Xen optimizationcy Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-25 14:51 UTC (permalink / raw)
To: Milan Boberic
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, sstabellini,
Meng Xu, xen-devel, nd
On 10/25/18 3:47 PM, Milan Boberic wrote:
>> I was asking the Xen configuration (xen/.config) to know what you have
>> enabled in Xen.
>
> Oh, sorry, because I'm building xen from git repository here is the
> link to it where you can check the file you mentioned.
>
> https://github.com/Xilinx/xen/tree/xilinx/versal/xen
I am afraid no. .config is generated during building time. So can you
paste here please.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 11:09 ` Xen optimization Julien Grall
@ 2018-10-25 16:15 ` Stefano Stabellini
2018-10-26 19:12 ` Julien Grall
0 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-25 16:15 UTC (permalink / raw)
To: Julien Grall
Cc: Stefano Stabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
sstabellini, Meng Xu, xen-devel, nd
On Thu, 25 Oct 2018, Julien Grall wrote:
> Hi Stefano,
>
> On 10/24/18 1:24 AM, Stefano Stabellini wrote:
> > On Tue, 23 Oct 2018, Milan Boberic wrote:
> > I don't have any other things to suggest right now. You should be able
> > to measure an overall 2.5us IRQ latency (if the interrupt rate is not
> > too high).
>
> Is it number you measured on Xen 4.11 flavored Xilinx? Or are they coming from
> the blog post [1] which is based on Xen 4.9?
>
> If the latter, then I can't rule out we may have introduce a slowdown for good
> or bad reason...
>
> To rule out this possibility, I would recommend to try and reproduce the same
> number on Xen 4.9 and then try with Xen 4.11.
>
> Cheers,
>
> [1] https://blog.xenproject.org/2017/03/20/xen-on-arm-interrupt-latency/
I was talking about the old numbers from Xen 4.9. You are right, we
cannot rule out the possibility that we introduced a slowdown.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimizationcy
2018-10-25 14:51 ` Julien Grall
@ 2018-10-25 16:18 ` Stefano Stabellini
0 siblings, 0 replies; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-25 16:18 UTC (permalink / raw)
To: Julien Grall
Cc: stefano.stabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
sstabellini, Meng Xu, xen-devel, nd
On Thu, 25 Oct 2018, Julien Grall wrote:
> On 10/25/18 3:47 PM, Milan Boberic wrote:
> > > I was asking the Xen configuration (xen/.config) to know what you have
> > > enabled in Xen.
> >
> > Oh, sorry, because I'm building xen from git repository here is the
> > link to it where you can check the file you mentioned.
> >
> > https://github.com/Xilinx/xen/tree/xilinx/versal/xen
>
> I am afraid no. .config is generated during building time. So can you paste
> here please.
It most probably is the default kconfig for Xen 4.11.
Milan,
Julien was asking for the file named ".config" you can find under the
xen/ directory.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-25 16:15 ` Stefano Stabellini
@ 2018-10-26 19:12 ` Julien Grall
2018-10-26 20:41 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-26 19:12 UTC (permalink / raw)
To: Stefano Stabellini
Cc: sstabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
Meng Xu, xen-devel, nd
Hi Stefano,
On 10/25/18 5:15 PM, Stefano Stabellini wrote:
> On Thu, 25 Oct 2018, Julien Grall wrote:
>> Hi Stefano,
>>
>> On 10/24/18 1:24 AM, Stefano Stabellini wrote:
>>> On Tue, 23 Oct 2018, Milan Boberic wrote:
>>> I don't have any other things to suggest right now. You should be able
>>> to measure an overall 2.5us IRQ latency (if the interrupt rate is not
>>> too high).
>>
>> Is it number you measured on Xen 4.11 flavored Xilinx? Or are they coming from
>> the blog post [1] which is based on Xen 4.9?
>>
>> If the latter, then I can't rule out we may have introduce a slowdown for good
>> or bad reason...
>>
>> To rule out this possibility, I would recommend to try and reproduce the same
>> number on Xen 4.9 and then try with Xen 4.11.
>>
>> Cheers,
>>
>> [1] https://blog.xenproject.org/2017/03/20/xen-on-arm-interrupt-latency/
>
> I was talking about the old numbers from Xen 4.9. You are right, we
> cannot rule out the possibility that we introduced a slowdown.
Can you try to reproduce those number with your setup on Xen 4.11?
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-26 19:12 ` Julien Grall
@ 2018-10-26 20:41 ` Stefano Stabellini
2018-10-29 12:29 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-10-26 20:41 UTC (permalink / raw)
To: Julien Grall
Cc: Stefano Stabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
sstabellini, Meng Xu, xen-devel, nd
On Fri, 26 Oct 2018, Julien Grall wrote:
> Hi Stefano,
>
> On 10/25/18 5:15 PM, Stefano Stabellini wrote:
> > On Thu, 25 Oct 2018, Julien Grall wrote:
> > > Hi Stefano,
> > >
> > > On 10/24/18 1:24 AM, Stefano Stabellini wrote:
> > > > On Tue, 23 Oct 2018, Milan Boberic wrote:
> > > > I don't have any other things to suggest right now. You should be able
> > > > to measure an overall 2.5us IRQ latency (if the interrupt rate is not
> > > > too high).
> > >
> > > Is it number you measured on Xen 4.11 flavored Xilinx? Or are they coming
> > > from
> > > the blog post [1] which is based on Xen 4.9?
> > >
> > > If the latter, then I can't rule out we may have introduce a slowdown for
> > > good
> > > or bad reason...
> > >
> > > To rule out this possibility, I would recommend to try and reproduce the
> > > same
> > > number on Xen 4.9 and then try with Xen 4.11.
> > >
> > > Cheers,
> > >
> > > [1] https://blog.xenproject.org/2017/03/20/xen-on-arm-interrupt-latency/
> >
> > I was talking about the old numbers from Xen 4.9. You are right, we
> > cannot rule out the possibility that we introduced a slowdown.
>
> Can you try to reproduce those number with your setup on Xen 4.11?
Yes, I intend to, it is on my TODO.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-26 20:41 ` Stefano Stabellini
@ 2018-10-29 12:29 ` Milan Boberic
2018-10-31 18:59 ` Julien Grall
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-29 12:29 UTC (permalink / raw)
To: stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, julien.grall,
Meng Xu, xen-devel, nd
[-- Attachment #1: Type: text/plain, Size: 277 bytes --]
Sorry for late reply,
> I am afraid no. .config is generated during building time. So can you
> paste here please.
".config" file is in attachment.
I also tried Xen 4.9 and I got almost same numbers, jitter is smaller
by 150ns which isn't significant change at all.
Milan
[-- Attachment #2: .config.txt --]
[-- Type: text/plain, Size: 1996 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Xen/arm 4.11.1-pre Configuration
#
CONFIG_64BIT=y
CONFIG_ARM_64=y
CONFIG_ARM=y
CONFIG_ARCH_DEFCONFIG="arch/arm/configs/arm64_defconfig"
#
# Architecture Features
#
CONFIG_NR_CPUS=128
# CONFIG_ACPI is not set
CONFIG_GICV3=y
# CONFIG_HAS_ITS is not set
# CONFIG_NEW_VGIC is not set
CONFIG_SBSA_VUART_CONSOLE=y
#
# ARM errata workaround via the alternative framework
#
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_834220=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_ARM64_HARDEN_BRANCH_PREDICTOR=y
CONFIG_ALL_PLAT=y
# CONFIG_QEMU is not set
# CONFIG_RCAR3 is not set
# CONFIG_MPSOC is not set
CONFIG_ALL64_PLAT=y
# CONFIG_ALL32_PLAT is not set
CONFIG_MPSOC_PLATFORM=y
#
# Common Features
#
CONFIG_HAS_ALTERNATIVE=y
CONFIG_HAS_DEVICE_TREE=y
# CONFIG_MEM_ACCESS is not set
CONFIG_HAS_PDX=y
CONFIG_TMEM=y
# CONFIG_XSM is not set
#
# Schedulers
#
CONFIG_SCHED_CREDIT=y
CONFIG_SCHED_CREDIT2=y
CONFIG_SCHED_RTDS=y
# CONFIG_SCHED_ARINC653 is not set
CONFIG_SCHED_NULL=y
CONFIG_SCHED_CREDIT_DEFAULT=y
# CONFIG_SCHED_CREDIT2_DEFAULT is not set
# CONFIG_SCHED_RTDS_DEFAULT is not set
# CONFIG_SCHED_NULL_DEFAULT is not set
CONFIG_SCHED_DEFAULT="credit"
# CONFIG_LIVEPATCH is not set
CONFIG_SUPPRESS_DUPLICATE_SYMBOL_WARNINGS=y
CONFIG_CMDLINE=""
#
# Device Drivers
#
CONFIG_HAS_NS16550=y
CONFIG_HAS_CADENCE_UART=y
CONFIG_HAS_MVEBU=y
CONFIG_HAS_PL011=y
CONFIG_HAS_SCIF=y
CONFIG_HAS_PASSTHROUGH=y
CONFIG_ARM_SMMU=y
CONFIG_VIDEO=y
CONFIG_HAS_ARM_HDLCD=y
CONFIG_DEFCONFIG_LIST="$ARCH_DEFCONFIG"
#
# Debugging Options
#
# CONFIG_DEBUG is not set
# CONFIG_FRAME_POINTER is not set
# CONFIG_COVERAGE is not set
# CONFIG_LOCK_PROFILE is not set
# CONFIG_PERF_COUNTERS is not set
# CONFIG_VERBOSE_DEBUG is not set
# CONFIG_DEVICE_TREE_DEBUG is not set
# CONFIG_SCRUB_DEBUG is not set
[-- Attachment #3: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-29 12:29 ` Milan Boberic
@ 2018-10-31 18:59 ` Julien Grall
2018-10-31 20:35 ` Milan Boberic
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-31 18:59 UTC (permalink / raw)
To: Milan Boberic, stefano.stabellini
Cc: sstabellini, andrii_anisov, Dario Faggioli, Meng Xu, xen-devel, nd
Hi Milan,
On 10/29/18 12:29 PM, Milan Boberic wrote:
> Sorry for late reply,
Don't worry, thank you for the testing and sending the .config.
>
>> I am afraid no. .config is generated during building time. So can you
>> paste here please.
>
>
> ".config" file is in attachment.
>
> I also tried Xen 4.9 and I got almost same numbers, jitter is smaller
> by 150ns which isn't significant change at all.
Interesting. Could you confirm the commit you were using (or the point
release)?
Stefano's number were based on commit "fuzz: update README.afl example"
55a04feaa1f8ab6ef7d723fbb1d39c6b96ad184a which is an unreleased version
of Xen.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-31 18:59 ` Julien Grall
@ 2018-10-31 20:35 ` Milan Boberic
2018-10-31 21:16 ` Julien Grall
0 siblings, 1 reply; 70+ messages in thread
From: Milan Boberic @ 2018-10-31 20:35 UTC (permalink / raw)
To: julien.grall
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, sstabellini,
Meng Xu, xen-devel, nd
Hi,
> Interesting. Could you confirm the commit you were using (or the point
> release)?
> Stefano's number were based on commit "fuzz: update README.afl example"
> 55a04feaa1f8ab6ef7d723fbb1d39c6b96ad184a which is an unreleased version
> of Xen.
All Xens I used are from Xilinx git repository because I have
UltraZed-EG board which has Zynq UltraScale SoC.
Under branches you can find Xen 4.8, 4.9, etc.
I always used latest commit: c227fe68589bdfb36b85f7b78c034a40c95b9a30
Here is link to it:
https://github.com/Xilinx/xen/tree/xilinx/stable-4.9
Best regards.
Milan
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-31 20:35 ` Milan Boberic
@ 2018-10-31 21:16 ` Julien Grall
2018-11-01 20:20 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-10-31 21:16 UTC (permalink / raw)
To: Milan Boberic
Cc: stefano.stabellini, andrii_anisov, Dario Faggioli, sstabellini,
Meng Xu, xen-devel, nd
On 10/31/18 8:35 PM, Milan Boberic wrote:
> Hi,
>
>> Interesting. Could you confirm the commit you were using (or the point
>> release)?
>> Stefano's number were based on commit "fuzz: update README.afl example"
>> 55a04feaa1f8ab6ef7d723fbb1d39c6b96ad184a which is an unreleased version
>> of Xen.
>
> All Xens I used are from Xilinx git repository because I have
> UltraZed-EG board which has Zynq UltraScale SoC.
> Under branches you can find Xen 4.8, 4.9, etc.
> I always used latest commit: c227fe68589bdfb36b85f7b78c034a40c95b9a30
> Here is link to it:
> https://github.com/Xilinx/xen/tree/xilinx/stable-4.9
This branch is quite ahead of the branch Stefano's used. There are 94
commits more just for Arm specific code.
What I am interested is to see if we are able to reproduce Stefano's
number with the same branch. So we can have a clue whether there are a
slow down introduce in new code.
Stefano, you mention you will look at reproducing the numbers. Do you
have any update on this?
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-31 21:16 ` Julien Grall
@ 2018-11-01 20:20 ` Stefano Stabellini
2018-11-01 20:35 ` Julien Grall
2018-11-20 11:33 ` Andrii Anisov
0 siblings, 2 replies; 70+ messages in thread
From: Stefano Stabellini @ 2018-11-01 20:20 UTC (permalink / raw)
To: Julien Grall
Cc: stefano.stabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
sstabellini, Meng Xu, xen-devel, nd
On Wed, 31 Oct 2018, Julien Grall wrote:
> On 10/31/18 8:35 PM, Milan Boberic wrote:
> > Hi,
> >
> > > Interesting. Could you confirm the commit you were using (or the point
> > > release)?
> > > Stefano's number were based on commit "fuzz: update README.afl example"
> > > 55a04feaa1f8ab6ef7d723fbb1d39c6b96ad184a which is an unreleased version
> > > of Xen.
> >
> > All Xens I used are from Xilinx git repository because I have
> > UltraZed-EG board which has Zynq UltraScale SoC.
> > Under branches you can find Xen 4.8, 4.9, etc.
> > I always used latest commit: c227fe68589bdfb36b85f7b78c034a40c95b9a30
> > Here is link to it:
> > https://github.com/Xilinx/xen/tree/xilinx/stable-4.9
>
> This branch is quite ahead of the branch Stefano's used. There are 94 commits
> more just for Arm specific code.
>
> What I am interested is to see if we are able to reproduce Stefano's number
> with the same branch. So we can have a clue whether there are a slow down
> introduce in new code.
>
> Stefano, you mention you will look at reproducing the numbers. Do you have any
> update on this?
No, I haven't had any time. Aside from the Xen version, another
difference is the interrupt source. I used the physical timer for
testing.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-11-01 20:20 ` Stefano Stabellini
@ 2018-11-01 20:35 ` Julien Grall
2018-11-20 11:33 ` Andrii Anisov
1 sibling, 0 replies; 70+ messages in thread
From: Julien Grall @ 2018-11-01 20:35 UTC (permalink / raw)
To: Stefano Stabellini
Cc: sstabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
Meng Xu, xen-devel, nd
Hi Stefano,
On 11/1/18 8:20 PM, Stefano Stabellini wrote:
> On Wed, 31 Oct 2018, Julien Grall wrote:
>> On 10/31/18 8:35 PM, Milan Boberic wrote:
>>> Hi,
>>>
>>>> Interesting. Could you confirm the commit you were using (or the point
>>>> release)?
>>>> Stefano's number were based on commit "fuzz: update README.afl example"
>>>> 55a04feaa1f8ab6ef7d723fbb1d39c6b96ad184a which is an unreleased version
>>>> of Xen.
>>>
>>> All Xens I used are from Xilinx git repository because I have
>>> UltraZed-EG board which has Zynq UltraScale SoC.
>>> Under branches you can find Xen 4.8, 4.9, etc.
>>> I always used latest commit: c227fe68589bdfb36b85f7b78c034a40c95b9a30
>>> Here is link to it:
>>> https://github.com/Xilinx/xen/tree/xilinx/stable-4.9
>>
>> This branch is quite ahead of the branch Stefano's used. There are 94 commits
>> more just for Arm specific code.
>>
>> What I am interested is to see if we are able to reproduce Stefano's number
>> with the same branch. So we can have a clue whether there are a slow down
>> introduce in new code.
>>
>> Stefano, you mention you will look at reproducing the numbers. Do you have any
>> update on this?
>
> No, I haven't had any time. Aside from the Xen version, another
> difference is the interrupt source. I used the physical timer for
> testing.
I would be actually surprised that the interrupt latency varies with
virtualization depending on the interrupts...
If that were the case, then doing the latency on the physical interrupt
(unlikely going to be used by virtualized guest) was quite pointless.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-10-09 16:46 ` Dario Faggioli
2018-10-10 11:22 ` Milan Boberic
@ 2018-11-07 13:14 ` Julien Grall
1 sibling, 0 replies; 70+ messages in thread
From: Julien Grall @ 2018-11-07 13:14 UTC (permalink / raw)
To: Dario Faggioli, Milan Boberic, xen-devel
Cc: Meng Xu, sstabellini, Andrii Anisov
Hi Dario,
On 09/10/2018 17:46, Dario Faggioli wrote:
> On Tue, 2018-10-09 at 12:59 +0200, Milan Boberic wrote:
>> Hi,
>>
> Hi Milan,
>
>> I'm testing Xen Hypervisor 4.10 performance on UltraZed-EG board with
>> carrier card.
>> I created bare-metal application in Xilinx SDK.
>> In bm application I:
>> - start triple timer counter (ttc) which generates
>> interrupt every 1us
>> - turn on PS LED
>> - call function 100 times in for loop (function that sets
>> some values)
>> - turn off LED
>> - stop triple timer counter
>> - reset counter value
>>
> Ok, I'm adding Stefano, Julien, and a couple of other people interested
> in RT/lowlat on Xen.
>
>> I ran this bare-metal application under Xen Hypervisor with following
>> settings:
>> - used null scheduler (sched=null) and vwfi=native
>> - bare-metal application have one vCPU and it is pinned for pCPU1
>> - domain which is PetaLinux also have one vCPU pinned for pCPU0,
>> other pCPUs are unused.
>> Under Xen Hypervisor I can see 3us jitter on oscilloscope.
>>
> So, this is probably me not being familiar with Xen on Xilinx (and with
> Xen on ARM as a whole), but there's a few things I'm not sure I
> understand:
> - you say you use sched=null _and_ pinning? That should not be
> necessary (although, it shouldn't hurt either)
> - "domain which is PetaLinux", is that dom0?
>
> IAC, if it's not terrible hard to run this kind of test, I'd say, try
> without 'vwfi=native', and also with another scheduler, like Credit,
> (but then do make sure you use pinning).
>
>> When I ran same bm application with JTAG from Xilinx SDK (without Xen
>> Hypervisor, directly on the board) there is no jitter.
>>
> Here, when you say "without Xen", do you also mean without any
> baremetal OS at all?
>
>> I'm curios what causes this 3us jitter in Xen (which isn't small
>> jitter at all) and is there any way of decreasing it?
>>
> Right. So, I'm not sure I've understood the test scenario either. But
> yeah, 3us jitter seems significant. Still, if we're comparing with
> bare-hw, without even an OS at all, I think it could have been expected
> for latency and jitter to be higher in the Xen case.
>
> Anyway, I am not sure anyone has done a kind of analysis that could
> help us identify accurately from where things like that come, and in
> what proportions.
>
> It would be really awesome to have something like that, so do go ahead
> if you feel like it. :-)
>
> I think tracing could help a little (although we don't have a super-
> sophisticated tracing infrastructure like Linux's perf and such), but
> sadly enough, that's still not available on ARM, I think. :-/
FWIW, I just posted a series to add xentrace support on Arm. Hopefully we can
get this merged for Xen 4.12.
Cheers,
[1] https://lists.xenproject.org/archives/html/xen-devel/2018-11/msg00563.html
>
> Regards,
> Dario
>
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-11-01 20:20 ` Stefano Stabellini
2018-11-01 20:35 ` Julien Grall
@ 2018-11-20 11:33 ` Andrii Anisov
2018-11-27 21:27 ` Stefano Stabellini
1 sibling, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-11-20 11:33 UTC (permalink / raw)
To: Stefano Stabellini
Cc: sstabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
Julien Grall, Meng Xu, xen-devel, nd
Hello Stefano,
On 01.11.18 22:20, Stefano Stabellini wrote:
> No, I haven't had any time. Aside from the Xen version, another
> difference is the interrupt source. I used the physical timer for
> testing.
Could you share your approach for interrupts latency measurement? Are
you using any HW specifics or it is SoC independent?
I would like to get more evidences for optimizations of gic/vgic/gic-v2
code I did for our customer (its about old vgic, we are still on xen 4.10).
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-11-20 11:33 ` Andrii Anisov
@ 2018-11-27 21:27 ` Stefano Stabellini
2018-11-29 8:19 ` Andrii Anisov
2018-12-10 10:58 ` Andrii Anisov
0 siblings, 2 replies; 70+ messages in thread
From: Stefano Stabellini @ 2018-11-27 21:27 UTC (permalink / raw)
To: Andrii Anisov
Cc: nd, sstabellini, andrii_anisov, Milan Boberic, Dario Faggioli,
Julien Grall, Meng Xu, xen-devel, Stefano Stabellini
On Tue, 20 Nov 2018, Andrii Anisov wrote:
> Hello Stefano,
>
> On 01.11.18 22:20, Stefano Stabellini wrote:
> > No, I haven't had any time. Aside from the Xen version, another
> > difference is the interrupt source. I used the physical timer for
> > testing.
>
> Could you share your approach for interrupts latency measurement? Are you
> using any HW specifics or it is SoC independent?
>
> I would like to get more evidences for optimizations of gic/vgic/gic-v2 code I
> did for our customer (its about old vgic, we are still on xen 4.10).
Hi Andrii,
See the following:
https://marc.info/?l=xen-devel&m=148668817704668
The numbers have improved now thanks to vwfi=native and other
optimizations but the mechanism to setup the experiment are the same.
Cheers,
Stefano
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-11-27 21:27 ` Stefano Stabellini
@ 2018-11-29 8:19 ` Andrii Anisov
2018-12-10 10:58 ` Andrii Anisov
1 sibling, 0 replies; 70+ messages in thread
From: Andrii Anisov @ 2018-11-29 8:19 UTC (permalink / raw)
To: Stefano Stabellini
Cc: nd, andrii_anisov, Milan Boberic, Dario Faggioli, Julien Grall,
Meng Xu, xen-devel, Stefano Stabellini
Hello Stefano,
On 27.11.18 23:27, Stefano Stabellini wrote:
> Hi Andrii,
>
> See the following:
>
> https://marc.info/?l=xen-devel&m=148668817704668
Thank you for the point. I remember this email, but missed it also gives
details to setup the experiment. It looks that bare-metal app is not SoC
specific, so going to take it in use.
> The numbers have improved now thanks to vwfi=native and other
> optimizations but the mechanism to setup the experiment are the same.I know about `vwfi=native` but it does not fit our requirements :(
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-11-27 21:27 ` Stefano Stabellini
2018-11-29 8:19 ` Andrii Anisov
@ 2018-12-10 10:58 ` Andrii Anisov
2018-12-10 11:54 ` Julien Grall
1 sibling, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-10 10:58 UTC (permalink / raw)
To: Stefano Stabellini
Cc: nd, andrii_anisov, Milan Boberic, Dario Faggioli, Julien Grall,
Meng Xu, xen-devel, Stefano Stabellini
Hello All,
On 27.11.18 23:27, Stefano Stabellini wrote:
> See the following:
>
> https://marc.info/?l=xen-devel&m=148668817704668
So I did port that stuff to the current staging [1].
Also, the correspondent tbm, itself is here [2].
Having 4 big cores on my SoC I run XEN with the following command line:
dom0_mem=3G console=dtuart dtuart=serial0 dom0_max_vcpus=2 bootscrub=0 loglvl=all cpufreq=none tbuf_size=8192 loglvl=all/none guest_loglvl=all/none
The TBM's domain configuration file is as following:
seclabel='system_u:system_r:domU_t'
name = "DomP"
kernel = "/home/root/ctest-bare.bin"
extra = "console=hvc0 rw"
memory = 128
vcpus = 1
cpus = "3"
This gives me setup where Domain-0 runs on cores 0 and 1 solely and TBM runs exclusively on core 3. So that we can rely that it shows us a pure IRQ latency of hypervisor.
My board is Renesas Salvator-X with H3 ES3.0 SoC and 8GB RAM. Generic timer runs at 8.333 MHz freq, what gives my 120ns resolution for measurements.
XEN hypervisor is build without debug and TBM does wfi in the idle loop for all experiments.
With that setup IRQ latency numbers are (in ns):
Old vgic:
AVG MIN MAX WARM MAX
credit, vwfi=trap 7706 7560 9480 8400
credit, vwfi=native 2908 2880 3120 4800
credit2, vwfi=trap 7221 7200 9240 7440
credit2, vwfi=native 2906 2880 3120 5040
New vgic:
AVG MIN MAX WARM MAX
credit, vwfi=trap 8481 8040 10200 8880
credit, vwfi=native 4115 3960 4800 4200
credit2, vwfi=trap 8425 8400 9600 9000
credit2, vwfi=native 4227 3960 5040 4680
Here we can see that the new vgic underperforms the old one in a trivial use-case modeled with TBM.
Old vgic with optimizations [3] (without [4], because it breaks the setup):
AVG MIN MAX WARM MAX
credit, vwfi=trap 7309 7080 8760 7680
credit, vwfi=native 3007 3000 4320 3120
credit2, vwfi=trap 6877 6720 8880 7200
credit2, vwfi=native 2680 2640 4440 2880
[1] https://github.com/aanisov/xen/tree/4tbm
[2] https://github.com/aanisov/tbm/commits/4xen
[3] https://lists.xenproject.org/archives/html/xen-devel/2018-11/msg03328.html
[4] https://lists.xenproject.org/archives/html/xen-devel/2018-11/msg03288.html
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-10 10:58 ` Andrii Anisov
@ 2018-12-10 11:54 ` Julien Grall
2018-12-10 12:23 ` Andrii Anisov
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-12-10 11:54 UTC (permalink / raw)
To: Andrii Anisov
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Dario Faggioli, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
[-- Attachment #1.1: Type: text/plain, Size: 3456 bytes --]
(sorry for the formatting)
On Mon, 10 Dec 2018, 12:00 Andrii Anisov, <andrii.anisov@gmail.com> wrote:
> Hello All,
>
> On 27.11.18 23:27, Stefano Stabellini wrote:
> > See the following:
> >
> > https://marc.info/?l=xen-devel&m=148668817704668
> So I did port that stuff to the current staging [1].
> Also, the correspondent tbm, itself is here [2].
> Having 4 big cores on my SoC I run XEN with the following command line:
>
> dom0_mem=3G console=dtuart dtuart=serial0 dom0_max_vcpus=2
> bootscrub=0 loglvl=all cpufreq=none tbuf_size=8192 loglvl=all/none
> guest_loglvl=all/none
>
> The TBM's domain configuration file is as following:
>
> seclabel='system_u:system_r:domU_t'
> name = "DomP"
> kernel = "/home/root/ctest-bare.bin"
> extra = "console=hvc0 rw"
> memory = 128
> vcpus = 1
> cpus = "3"
>
> This gives me setup where Domain-0 runs on cores 0 and 1 solely and TBM
> runs exclusively on core 3. So that we can rely that it shows us a pure IRQ
> latency of hypervisor.
> My board is Renesas Salvator-X with H3 ES3.0 SoC and 8GB RAM. Generic
> timer runs at 8.333 MHz freq, what gives my 120ns resolution for
> measurements.
> XEN hypervisor is build without debug and TBM does wfi in the idle loop
> for all experiments.
> With that setup IRQ latency numbers are (in ns):
>
What are the numbers without Xen? Which version of Xen are you using?
> Old vgic:
> AVG MIN MAX WARM MAX
> credit, vwfi=trap 7706 7560 9480 8400
> credit, vwfi=native 2908 2880 3120 4800
> credit2, vwfi=trap 7221 7200 9240 7440
> credit2, vwfi=native 2906 2880 3120 5040
>
> New vgic:
> AVG MIN MAX WARM MAX
> credit, vwfi=trap 8481 8040 10200 8880
> credit, vwfi=native 4115 3960 4800 4200
> credit2, vwfi=trap 8425 8400 9600 9000
> credit2, vwfi=native 4227 3960 5040 4680
>
> Here we can see that the new vgic underperforms the old one in a trivial
> use-case modeled with TBM.
>
The vwfi=trap does not look so bad (10%) but indeed the vwfi=native adds a
bigger overhead.
This also tells you that in the trap case the vGIC is not the bigger
overhead.
I am pretty sure that this can be optimized because we mostly focused on
reliability and specification compliance for the first draft.
So yes the old vGIC performs better but at the price of unreliability and
non-compliance.
> Old vgic with optimizations [3] (without [4], because it breaks the setup):
> AVG MIN MAX WARM MAX
> credit, vwfi=trap 7309 7080 8760 7680
> credit, vwfi=native 3007 3000 4320 3120
> credit2, vwfi=trap 6877 6720 8880 7200
> credit2, vwfi=native 2680 2640 4440 2880
>
This is with all your series applied but [4], correct? Did you try to see
the perfomance improvement patch by patch?
Cheers
>
>
> [1] https://github.com/aanisov/xen/tree/4tbm
> [2] https://github.com/aanisov/tbm/commits/4xen
> [3]
> https://lists.xenproject.org/archives/html/xen-devel/2018-11/msg03328.html
> [4]
> https://lists.xenproject.org/archives/html/xen-devel/2018-11/msg03288.html
>
> --
> Sincerely,
> Andrii Anisov.
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xenproject.org
> https://lists.xenproject.org/mailman/listinfo/xen-devel
[-- Attachment #1.2: Type: text/html, Size: 5496 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-10 11:54 ` Julien Grall
@ 2018-12-10 12:23 ` Andrii Anisov
2018-12-11 12:27 ` Julien Grall
0 siblings, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-10 12:23 UTC (permalink / raw)
To: Julien Grall
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Dario Faggioli, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
Hello Julien,
On 10.12.18 13:54, Julien Grall wrote:
> What are the numbers without Xen?
Good question. Didn't try. At least putchar should be implemented for that.
> Which version of Xen are you using?
This morning's staging, commit-id 58eb90a9650a8ea73533bc2b87c13b8ca7bbe35a.
> This also tells you that in the trap case the vGIC is not the bigger overhead.
Indeed, not the bigger. But significant even in this trivial case (receiving an interrupt twice a second).
> This is with all your series applied but [4], correct?
Right.
> Did you try to see the perfomance improvement patch by patch?
No. Not yet.
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-10 12:23 ` Andrii Anisov
@ 2018-12-11 12:27 ` Julien Grall
2018-12-11 16:56 ` Dario Faggioli
` (2 more replies)
0 siblings, 3 replies; 70+ messages in thread
From: Julien Grall @ 2018-12-11 12:27 UTC (permalink / raw)
To: Andrii Anisov, Julien Grall
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Dario Faggioli, Meng Xu, xen-devel, Stefano Stabellini
On 10/12/2018 12:23, Andrii Anisov wrote:
> Hello Julien,
>
> On 10.12.18 13:54, Julien Grall wrote:
>> What are the numbers without Xen?
> Good question. Didn't try. At least putchar should be implemented for that.
I think we need the baremetal numbers to be able to compare properly the old and
new vGIC.
>
>> Which version of Xen are you using?
> This morning's staging, commit-id 58eb90a9650a8ea73533bc2b87c13b8ca7bbe35a.
>
>> This also tells you that in the trap case the vGIC is not the bigger overhead.
> Indeed, not the bigger. But significant even in this trivial case (receiving an
> interrupt twice a second).
To confirm, in your use-case you have the interrupt firing every 500ms, right?
But I am not sure what you are trying to argue here... I never said it was
insignificant, I only pointed out that the context switch/trap has a strong
impact. This means that focusing on optimizing context/switch is probably more
worth it at the moment than trying to micro-optimizing the vGIC.
What matters at the end is the overhead of virtualization (i.e Xen). Without
those baremetal numbers, it is quite difficult to make an idea whether this is
significant.
>
>> This is with all your series applied but [4], correct?
> Right.
>
>> Did you try to see the perfomance improvement patch by patch?
> No. Not yet.
I would like to have performance per patch so we can make the decisions whether
the implementation cost is worth it for upstream.
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 12:27 ` Julien Grall
@ 2018-12-11 16:56 ` Dario Faggioli
2018-12-12 9:39 ` Andrii Anisov
2018-12-11 18:39 ` Stefano Stabellini
2018-12-12 9:34 ` Andrii Anisov
2 siblings, 1 reply; 70+ messages in thread
From: Dario Faggioli @ 2018-12-11 16:56 UTC (permalink / raw)
To: Julien Grall, Andrii Anisov, Julien Grall
Cc: Stefano Stabellini, andrii_anisov, Stefano Stabellini,
Milan Boberic, Meng Xu, xen-devel, nd
[-- Attachment #1.1: Type: text/plain, Size: 782 bytes --]
On Tue, 2018-12-11 at 12:27 +0000, Julien Grall wrote:
> On 10/12/2018 12:23, Andrii Anisov wrote:
> > On 10.12.18 13:54, Julien Grall wrote:
> > > What are the numbers without Xen?
> > Good question. Didn't try. At least putchar should be implemented
> > for that.
>
> I think we need the baremetal numbers to be able to compare properly
> the old and
> new vGIC.
>
Agreed.
Also, what about Xen numbers, sched=null.
I don't expect much improvement, considering pinning is in-place
already. Still...
Regards,
Dario
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 12:27 ` Julien Grall
2018-12-11 16:56 ` Dario Faggioli
@ 2018-12-11 18:39 ` Stefano Stabellini
2018-12-11 19:05 ` Julien Grall
2018-12-12 9:34 ` Andrii Anisov
2 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-12-11 18:39 UTC (permalink / raw)
To: Julien Grall
Cc: nd, Stefano Stabellini, andrii_anisov, Stefano Stabellini,
Milan Boberic, Dario Faggioli, Julien Grall, Meng Xu, xen-devel,
Andrii Anisov
On Tue, 11 Dec 2018, Julien Grall wrote:
> On 10/12/2018 12:23, Andrii Anisov wrote:
> > Hello Julien,
> >
> > On 10.12.18 13:54, Julien Grall wrote:
> > > What are the numbers without Xen?
> > Good question. Didn't try. At least putchar should be implemented for that.
>
> I think we need the baremetal numbers to be able to compare properly the old
> and new vGIC.
That might prove very hard for Andrii to do because TBM is made to run
on Xilinx hardware and Xen VMs only. It is probably lacking necessary
drivers to run on other boards natively.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 18:39 ` Stefano Stabellini
@ 2018-12-11 19:05 ` Julien Grall
2018-12-11 19:29 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Julien Grall @ 2018-12-11 19:05 UTC (permalink / raw)
To: Stefano Stabellini
Cc: Andrii Anisov, nd, andrii_anisov, Milan Boberic, Dario Faggioli,
Julien Grall, Meng Xu, xen-devel, Stefano Stabellini
On 11/12/2018 18:39, Stefano Stabellini wrote:
> On Tue, 11 Dec 2018, Julien Grall wrote:
>> On 10/12/2018 12:23, Andrii Anisov wrote:
>>> Hello Julien,
>>>
>>> On 10.12.18 13:54, Julien Grall wrote:
>>>> What are the numbers without Xen?
>>> Good question. Didn't try. At least putchar should be implemented for that.
>>
>> I think we need the baremetal numbers to be able to compare properly the old
>> and new vGIC.
>
> That might prove very hard for Andrii to do because TBM is made to run
> on Xilinx hardware and Xen VMs only. It is probably lacking necessary
> drivers to run on other boards natively.
Really? What sort of platform specific driver do you need? Shouldn't the UART be
sufficient?
When you speak about interrupt latency, you need to compare to baremetal.
Otherwise it has no meaning at all. So what is your solution?
Cheers,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 19:05 ` Julien Grall
@ 2018-12-11 19:29 ` Stefano Stabellini
2018-12-12 9:46 ` Andrii Anisov
0 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-12-11 19:29 UTC (permalink / raw)
To: Julien Grall
Cc: nd, Stefano Stabellini, andrii_anisov, Stefano Stabellini,
Milan Boberic, Dario Faggioli, Julien Grall, Meng Xu, xen-devel,
Andrii Anisov
On Tue, 11 Dec 2018, Julien Grall wrote:
> On 11/12/2018 18:39, Stefano Stabellini wrote:
> > On Tue, 11 Dec 2018, Julien Grall wrote:
> > > On 10/12/2018 12:23, Andrii Anisov wrote:
> > > > Hello Julien,
> > > >
> > > > On 10.12.18 13:54, Julien Grall wrote:
> > > > > What are the numbers without Xen?
> > > > Good question. Didn't try. At least putchar should be implemented for
> > > > that.
> > >
> > > I think we need the baremetal numbers to be able to compare properly the
> > > old
> > > and new vGIC.
> >
> > That might prove very hard for Andrii to do because TBM is made to run
> > on Xilinx hardware and Xen VMs only. It is probably lacking necessary
> > drivers to run on other boards natively.
>
> Really? What sort of platform specific driver do you need? Shouldn't the UART be sufficient?
Yes, I think the uart driver could be sufficient, but it has only the
Xilinx uart, the pl011 and the Xen emergency console. If I recall
correctly, Renesas needs a different driver. Any platform specific
initialization would also need to be added to it.
> When you speak about interrupt latency, you need to compare to baremetal.
> Otherwise it has no meaning at all. So what is your solution?
When I used it, I ran on Xilinx hardware, that was my solution :-D
Andrii would have to port a uart driver to it. Maybe the early_printk
trivial driver could be easy enough to port.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 12:27 ` Julien Grall
2018-12-11 16:56 ` Dario Faggioli
2018-12-11 18:39 ` Stefano Stabellini
@ 2018-12-12 9:34 ` Andrii Anisov
2 siblings, 0 replies; 70+ messages in thread
From: Andrii Anisov @ 2018-12-12 9:34 UTC (permalink / raw)
To: Julien Grall, Julien Grall
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Dario Faggioli, Meng Xu, xen-devel, Stefano Stabellini
Hello Julien,
On 11.12.18 14:27, Julien Grall wrote:
> I would like to have performance per patch so we can make the decisions whether the implementation cost is worth it for upstream.
I'll check baremetal numbers first. Then will get numbers per patch.
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 16:56 ` Dario Faggioli
@ 2018-12-12 9:39 ` Andrii Anisov
2018-12-12 17:10 ` Dario Faggioli
0 siblings, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-12 9:39 UTC (permalink / raw)
To: Dario Faggioli, Julien Grall, Julien Grall
Cc: Stefano Stabellini, andrii_anisov, Stefano Stabellini,
Milan Boberic, Meng Xu, xen-devel, nd
Hello Dario,
On 11.12.18 18:56, Dario Faggioli wrote:
> Also, what about Xen numbers, sched=null.
Didn't check, will put on the list.
> I don't expect much improvement, considering pinning is in-place
> already.
Actually, I faced a strange issue with explicit pinning of Dom0. Didn't sort out the cause yet. And Julien says it is not reproducible on his desk.
But yes, with VCPU number less than PCPUs - there is no migration of Dom0 VCPUs.
[1] https://lists.xenproject.org/archives/html/xen-devel/2018-12/msg00435.html
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-11 19:29 ` Stefano Stabellini
@ 2018-12-12 9:46 ` Andrii Anisov
2018-12-12 10:41 ` Andrii Anisov
0 siblings, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-12 9:46 UTC (permalink / raw)
To: Stefano Stabellini, Julien Grall
Cc: nd, andrii_anisov, Milan Boberic, Dario Faggioli, Julien Grall,
Meng Xu, xen-devel, Stefano Stabellini
On 11.12.18 21:29, Stefano Stabellini wrote:
> Yes, I think the uart driver could be sufficient, but it has only the
> Xilinx uart, the pl011 and the Xen emergency console. If I recall
> correctly, Renesas needs a different driver. Any platform specific
> initialization would also need to be added to it.
Actually the console driver (putchar) is really trivial in TBM, and for platform initialization I rely on u-boot's remainings.
But I faced a strange issue with a timer interrupt. Despite the fact the TBM sets MMU, exception handlers table and VBAR, the interrupt does not cause TBMs code being called. But I see the interrupt fired and become active in GIC registers.
Digging into that now.
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 9:46 ` Andrii Anisov
@ 2018-12-12 10:41 ` Andrii Anisov
2018-12-12 17:39 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-12 10:41 UTC (permalink / raw)
To: Stefano Stabellini, Julien Grall
Cc: nd, andrii_anisov, Milan Boberic, Dario Faggioli, Julien Grall,
Meng Xu, xen-devel, Stefano Stabellini
On 12.12.18 11:46, Andrii Anisov wrote:
> Digging into that now.
I got it. My u-boot starts TBM in hyp mode. But them both miss setting HCR_EL2.IMO, so no interrupt exception was taken in hyp.
OK, for my baremetal TBM in hyp, numbers are:
max=840 warm_max=120 min=120 avg=127
I guess, warm_max and min are one tick of the system timer. And it seems to me that one tick of the system timer is the lower limit of the irq latency by HW design.
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 9:39 ` Andrii Anisov
@ 2018-12-12 17:10 ` Dario Faggioli
2018-12-12 17:32 ` Andrii Anisov
0 siblings, 1 reply; 70+ messages in thread
From: Dario Faggioli @ 2018-12-12 17:10 UTC (permalink / raw)
To: Andrii Anisov, Julien Grall, Julien Grall
Cc: Stefano Stabellini, andrii_anisov, Stefano Stabellini,
Milan Boberic, Meng Xu, xen-devel, nd
[-- Attachment #1.1: Type: text/plain, Size: 1570 bytes --]
On Wed, 2018-12-12 at 11:39 +0200, Andrii Anisov wrote:
> Hello Dario,
>
Hi,
> On 11.12.18 18:56, Dario Faggioli wrote:
> > Also, what about Xen numbers, sched=null.
> Didn't check, will put on the list.
>
:-)
> > I don't expect much improvement, considering pinning is in-place
> > already.
> Actually, I faced a strange issue with explicit pinning of Dom0.
> Didn't sort out the cause yet. And Julien says it is not reproducible
> on his desk.
>
Ah, yes... I've seen the thread. I haven't commented, as it is really,
really weird, and I don't know what to think/say.
I think only bisection could shed some light on this. And it would be
wonderful if you could do that, but I understand that it takes time. :-
/
> But yes, with VCPU number less than PCPUs - there is no migration of
> Dom0 VCPUs.
>
Are you absolutely sure about that? That is, are you "just" assuming
the scheduler won't move stuff, or have you put some debugging or
printing in place to verify that to be the case?
I'm asking because, yet, in theory that is what one would expect. But,
as I think you know very well, although in theory there is no
difference between theory and practice, in practice, there is. :-)
Regards,
Dario
> [1]https://lists.xenproject.org/archives/html/xen-devel/2018-12/msg00435.html
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 17:10 ` Dario Faggioli
@ 2018-12-12 17:32 ` Andrii Anisov
2018-12-12 17:59 ` Dario Faggioli
0 siblings, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-12 17:32 UTC (permalink / raw)
To: Dario Faggioli
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Julien Grall, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
Hello Dario,
On 12.12.18 19:10, Dario Faggioli wrote:
> Ah, yes... I've seen the thread. I haven't commented, as it is really,
> really weird, and I don't know what to think/say.
>
> I think only bisection could shed some light on this. And it would be
> wonderful if you could do that, but I understand that it takes time. :-
> /
Well, bisect might help. But I'm really confused why MemTotal may be reduced.
> Are you absolutely sure about that? That is, are you "just" assuming
> the scheduler won't move stuff, or have you put some debugging or
> printing in place to verify that to be the case?Being honest, I did not check for exactly this setup. I verified it for 4.10.
> I'm asking because, yet, in theory that is what one would expect. But,
> as I think you know very well, although in theory there is no
> difference between theory and practice, in practice, there is. :-)
I know it very well :)
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 10:41 ` Andrii Anisov
@ 2018-12-12 17:39 ` Stefano Stabellini
2018-12-12 17:47 ` Andrii Anisov
0 siblings, 1 reply; 70+ messages in thread
From: Stefano Stabellini @ 2018-12-12 17:39 UTC (permalink / raw)
To: Andrii Anisov
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Dario Faggioli, Julien Grall, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
On Wed, 12 Dec 2018, Andrii Anisov wrote:
> On 12.12.18 11:46, Andrii Anisov wrote:
> > Digging into that now.
> I got it. My u-boot starts TBM in hyp mode. But them both miss setting
> HCR_EL2.IMO, so no interrupt exception was taken in hyp.
> OK, for my baremetal TBM in hyp, numbers are:
>
> max=840 warm_max=120 min=120 avg=127
>
> I guess, warm_max and min are one tick of the system timer. And it seems to me
> that one tick of the system timer is the lower limit of the irq latency by HW
> design.
Thanks for the good work, Andrii!
The WARM_MAX improvements for vwfi=native with your optimizations are impressive.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 17:39 ` Stefano Stabellini
@ 2018-12-12 17:47 ` Andrii Anisov
2018-12-12 18:01 ` Stefano Stabellini
0 siblings, 1 reply; 70+ messages in thread
From: Andrii Anisov @ 2018-12-12 17:47 UTC (permalink / raw)
To: Stefano Stabellini
Cc: nd, andrii_anisov, Milan Boberic, Dario Faggioli, Julien Grall,
Julien Grall, Meng Xu, xen-devel, Stefano Stabellini
Hello Stefano,
On 12.12.18 19:39, Stefano Stabellini wrote:
> Thanks for the good work, Andrii!
>
> The WARM_MAX improvements for vwfi=native with your optimizations are impressive.
I really hope you are not speaking about these numbers:
>> max=840 warm_max=120 min=120 avg=127
Those are TBM baremetal numbers in hyp mode.
Did you try my RFC on your HW?
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 17:32 ` Andrii Anisov
@ 2018-12-12 17:59 ` Dario Faggioli
2018-12-13 7:48 ` Andrii Anisov
0 siblings, 1 reply; 70+ messages in thread
From: Dario Faggioli @ 2018-12-12 17:59 UTC (permalink / raw)
To: Andrii Anisov
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Julien Grall, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
[-- Attachment #1.1: Type: text/plain, Size: 1689 bytes --]
On Wed, 2018-12-12 at 19:32 +0200, Andrii Anisov wrote:
> On 12.12.18 19:10, Dario Faggioli wrote:
> > I think only bisection could shed some light on this. And it would
> > be
> > wonderful if you could do that, but I understand that it takes
> > time. :-
> > /
> Well, bisect might help. But I'm really confused why MemTotal may be
> reduced.
>
Yeah, and although difficult to admit/see the reason why, I think this
looks like it is coming from something we do in Xen. And since you say
you have an old Xen version that works, I really see bisection as the
way to go...
> > Are you absolutely sure about that? That is, are you "just"
> > assuming
> > the scheduler won't move stuff, or have you put some debugging or
> > printing in place to verify that to be the case?
> Being honest, I did not check for exactly this setup. I verified it
> for 4.10.
>
Not sure I'm getting. Are you saying that you somehow verified that on
4.10 vcpus don't move? But on 4.10 you have pinning that works, don't
you?
Or are you saying you've verified that vcpus don't move, on 4.10, even
without doing the pinning? If yes, can I ask how?
As for staging, I really can't tell, as indeed there would be no need
for them to move, but they actually could, for a number of reasons.
So, unless you, like, put printk()-s (if you can) or ASSERTS() when v-
>processor changes, I wouldn't take that for granted. :-(
Regards,
Dario
--
<<This happens because I choose it to happen!>> (Raistlin Majere)
-----------------------------------------------------------------
Dario Faggioli, Ph.D, http://about.me/dario.faggioli
Software Engineer @ SUSE https://www.suse.com/
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 157 bytes --]
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 17:47 ` Andrii Anisov
@ 2018-12-12 18:01 ` Stefano Stabellini
0 siblings, 0 replies; 70+ messages in thread
From: Stefano Stabellini @ 2018-12-12 18:01 UTC (permalink / raw)
To: Andrii Anisov
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Dario Faggioli, Julien Grall, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
On Wed, 12 Dec 2018, Andrii Anisov wrote:
> Hello Stefano,
>
> On 12.12.18 19:39, Stefano Stabellini wrote:
> > Thanks for the good work, Andrii!
> >
> > The WARM_MAX improvements for vwfi=native with your optimizations are
> > impressive.
>
> I really hope you are not speaking about these numbers:
>
> > > max=840 warm_max=120 min=120 avg=127
>
> Those are TBM baremetal numbers in hyp mode.
I know, I was referring to your older results, sorry for the confusion.
> Did you try my RFC on your HW?
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
* Re: Xen optimization
2018-12-12 17:59 ` Dario Faggioli
@ 2018-12-13 7:48 ` Andrii Anisov
0 siblings, 0 replies; 70+ messages in thread
From: Andrii Anisov @ 2018-12-13 7:48 UTC (permalink / raw)
To: Dario Faggioli
Cc: nd, Stefano Stabellini, andrii_anisov, Milan Boberic,
Julien Grall, Julien Grall, Meng Xu, xen-devel,
Stefano Stabellini
On 12.12.18 19:59, Dario Faggioli wrote:
> Yeah, and although difficult to admit/see the reason why, I think this
> looks like it is coming from something we do in Xen. And since you say
> you have an old Xen version that works, I really see bisection as the
> way to go...
> Not sure I'm getting. Are you saying that you somehow verified that on
> 4.10 vcpus don't move? But on 4.10 you have pinning that works, don't
> you?
Yes, the pinning works (and is reasonably used) in our setup we are providing to a customer. That setup is based on 4.10 release.
For my IRQ latency work, I used a simplified setup with the only Dom0 and the same XEN as in the customer's setup.
I was too lazy to set up pinning for my experimental setup from the beginning and later I found out that VCPUs were not migrating.
> Or are you saying you've verified that vcpus don't move, on 4.10, even
> without doing the pinning? If yes, can I ask how?
Yeh, it took me some time to recall that from my memory:)
When I tried using xentrace to profile interrupt path, I noticed that `current` non-idle VCPU is not changed for a particular PCPU.
--
Sincerely,
Andrii Anisov.
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
^ permalink raw reply [flat|nested] 70+ messages in thread
end of thread, other threads:[~2018-12-13 7:48 UTC | newest]
Thread overview: 70+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-09 10:59 Xen optimization Milan Boberic
2018-10-09 16:46 ` Dario Faggioli
2018-10-10 11:22 ` Milan Boberic
2018-10-10 11:25 ` Milan Boberic
2018-10-10 16:41 ` Meng Xu
2018-10-11 7:36 ` Milan Boberic
2018-10-11 12:17 ` Milan Boberic
2018-10-11 17:05 ` Dario Faggioli
2018-10-11 15:39 ` Meng Xu
2018-10-11 22:29 ` Stefano Stabellini
2018-10-12 15:33 ` Milan Boberic
2018-10-12 16:36 ` Julien Grall
2018-10-12 17:43 ` Stefano Stabellini
2018-10-13 16:01 ` Milan Boberic
2018-10-14 22:46 ` Stefano Stabellini
2018-10-15 12:27 ` Milan Boberic
2018-10-16 7:13 ` Stefano Stabellini
2018-10-15 8:14 ` Julien Grall
2018-10-15 12:50 ` Julien Grall
2018-10-15 13:01 ` Milan Boberic
2018-10-15 13:03 ` Julien Grall
2018-10-17 15:19 ` Milan Boberic
2018-10-19 21:02 ` Stefano Stabellini
2018-10-19 22:41 ` Dario Faggioli
2018-10-22 15:02 ` Milan Boberic
2018-10-22 17:52 ` Stefano Stabellini
2018-10-23 8:58 ` Milan Boberic
2018-10-24 0:24 ` Stefano Stabellini
2018-10-25 10:09 ` Milan Boberic
2018-10-25 11:30 ` Julien Grall
2018-10-25 12:36 ` Milan Boberic
2018-10-25 13:44 ` Dario Faggioli
2018-10-25 14:00 ` Julien Grall
2018-10-25 14:04 ` Julien Grall
2018-10-25 14:47 ` Milan Boberic
2018-10-25 14:51 ` Julien Grall
2018-10-25 16:18 ` Xen optimizationcy Stefano Stabellini
2018-10-25 11:09 ` Xen optimization Julien Grall
2018-10-25 16:15 ` Stefano Stabellini
2018-10-26 19:12 ` Julien Grall
2018-10-26 20:41 ` Stefano Stabellini
2018-10-29 12:29 ` Milan Boberic
2018-10-31 18:59 ` Julien Grall
2018-10-31 20:35 ` Milan Boberic
2018-10-31 21:16 ` Julien Grall
2018-11-01 20:20 ` Stefano Stabellini
2018-11-01 20:35 ` Julien Grall
2018-11-20 11:33 ` Andrii Anisov
2018-11-27 21:27 ` Stefano Stabellini
2018-11-29 8:19 ` Andrii Anisov
2018-12-10 10:58 ` Andrii Anisov
2018-12-10 11:54 ` Julien Grall
2018-12-10 12:23 ` Andrii Anisov
2018-12-11 12:27 ` Julien Grall
2018-12-11 16:56 ` Dario Faggioli
2018-12-12 9:39 ` Andrii Anisov
2018-12-12 17:10 ` Dario Faggioli
2018-12-12 17:32 ` Andrii Anisov
2018-12-12 17:59 ` Dario Faggioli
2018-12-13 7:48 ` Andrii Anisov
2018-12-11 18:39 ` Stefano Stabellini
2018-12-11 19:05 ` Julien Grall
2018-12-11 19:29 ` Stefano Stabellini
2018-12-12 9:46 ` Andrii Anisov
2018-12-12 10:41 ` Andrii Anisov
2018-12-12 17:39 ` Stefano Stabellini
2018-12-12 17:47 ` Andrii Anisov
2018-12-12 18:01 ` Stefano Stabellini
2018-12-12 9:34 ` Andrii Anisov
2018-11-07 13:14 ` Julien Grall
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.