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From: Vince Weaver <vincent.weaver@maine.edu>
To: linux-perf-users@vger.kernel.org
Cc: Michael Petlan <mpetlan@redhat.com>,
	Yuanfang Chen <cyfmxc@gmail.com>, Andi Kleen <ak@linux.intel.com>
Subject: Re: event group without multiplexing
Date: Thu, 12 Nov 2015 13:00:09 -0500 (EST)	[thread overview]
Message-ID: <alpine.DEB.2.20.1511121257380.7597@vincent-weaver-1.umelst.maine.edu> (raw)
In-Reply-To: <alpine.DEB.2.20.1511121248050.7597@vincent-weaver-1.umelst.maine.edu>


ccing Andi Kleen as he's the one who introduced the Haswell constraint 
code in 3a632cb229bfb18b6d09822cc842451ea46c013e so maybe he knows why
it is contraining all L1D_PEND_MISS.* events rather than just 
L1D_PEND_MISS.PENDING on IVB and BDW.

On Thu, 12 Nov 2015, Vince Weaver wrote:

> On Thu, 12 Nov 2015, Michael Petlan wrote:
> 
> > But I can't find any reference about the r1000248 event
> > in the Intel Manual. Vince, am I missing something?
> > 
> > Anyway, shouldn't it behave the same on IVB and HSW?
> 
> I am going off the code in
> 	arch/x86/kernel/cpu/perf_event_intel.c
> (current git tree)
> 
> SNB and HSW have as a constraint
> 	INTEL_EVENT_CONSTRAINT(0x48, 0x4), /* L1D_PEND_MISS.* */
> 
> IVB has as a constraint
> 	INTEL_UEVENT_CONSTRAINT(0x0148, 0x4), /* L1D_PEND_MISS.PENDING */
> 	
> Notice the difference.  Not sure if this is a bug in the kernel or what, 
> but that's what's there and I think it's what's causing the issue.
> 
> Vince

  reply	other threads:[~2015-11-12 17:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-11 22:05 event group without multiplexing Yuanfang Chen
2015-11-12 14:58 ` Yuanfang Chen
2015-11-12 15:02   ` Yuanfang Chen
2015-11-12 16:51     ` Vince Weaver
2015-11-12 17:40     ` Michael Petlan
2015-11-12 17:51       ` Vince Weaver
2015-11-12 18:00         ` Vince Weaver [this message]
2015-11-12 18:12           ` Yuanfang Chen
2015-11-17  0:39           ` Andi Kleen
2015-11-17  3:03             ` Yuanfang Chen
2015-11-21  0:58               ` Andi Kleen

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