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From: Thomas Gleixner <tglx@linutronix.de>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>,
	Ingo Molnar <mingo@elte.hu>, Tony Luck <tony.luck@intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Stephane Eranian <eranian@google.com>,
	Borislav Petkov <bp@suse.de>, Dave Hansen <dave.hansen@intel.com>,
	Nilay Vaish <nilayvaish@gmail.com>, Shaohua Li <shli@fb.com>,
	David Carrillo-Cisneros <davidcc@google.com>,
	Ravi V Shankar <ravi.v.shankar@intel.com>,
	Sai Prakhya <sai.praneeth.prakhya@intel.com>,
	Vikas Shivappa <vikas.shivappa@linux.intel.com>,
	linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource based on cache topology
Date: Wed, 26 Oct 2016 23:18:38 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.20.1610262314180.5013@nanos> (raw)
In-Reply-To: <20161026211442.GB1752@linux.intel.com>

On Wed, 26 Oct 2016, Fenghua Yu wrote:
> On Wed, Oct 26, 2016 at 03:02:56PM +0200, Thomas Gleixner wrote:
> > > +	list_for_each(l, &r->domains) {
> > > +		d = list_entry(l, struct rdt_domain, list);
> > 
> > So above you converted to list_for_each_entry(). Is there a sensible
> > reason, aside of being sloppy, why is this still using list_for_each()?
> 
> We use list_for_each() because we want to get the list_head "l". The l
> is used to find the position that the new domain will be inserted.

Sorry. I completely missed that position information thingy. No change
required then.

> The following patch #10 is supposed to fix issues you pointed out above.
> 
> Is it good now?

Looks fine. 

Thanks,

	tglx

  reply	other threads:[~2016-10-26 21:21 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-22 13:19 [PATCH v5 00/18] Intel Cache Allocation Technology Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 01/18] Documentation, ABI: Add a document entry for cache id Fenghua Yu
2016-10-26 21:25   ` [tip:x86/cache] Documentation, ABI: Document the new sysfs files for cpu cache ids tip-bot for Tony Luck
2016-10-22 13:19 ` [PATCH v5 02/18] cacheinfo: Introduce cache id Fenghua Yu
2016-10-26 21:25   ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 03/18] x86/intel_cacheinfo: Enable cache id in cache info Fenghua Yu
2016-10-26 21:26   ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 04/18] x86/intel_rdt: Feature discovery Fenghua Yu
2016-10-26 14:15   ` Borislav Petkov
2016-10-26 14:28     ` Thomas Gleixner
2016-10-26 21:26   ` [tip:x86/cache] x86/cpufeature: Add RDT CPUID feature bits tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 05/18] Documentation, x86: Documentation for Intel resource allocation user interface Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization Fenghua Yu
2016-10-26 20:43   ` Thomas Gleixner
2016-10-26 21:27   ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 07/18] x86/intel_rdt: Add Haswell feature discovery Fenghua Yu
2016-10-26 21:27   ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 08/18] x86/intel_rdt: Pick up L3/L2 RDT parameters from CPUID Fenghua Yu
2016-10-26 21:28   ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 09/18] x86/cqm: Move PQR_ASSOC management code into generic code used by both CQM and CAT Fenghua Yu
2016-10-26 21:29   ` [tip:x86/cache] x86/cqm: Share PQR_ASSOC related data between " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource based on cache topology Fenghua Yu
2016-10-26 13:02   ` Thomas Gleixner
2016-10-26 16:06     ` Luck, Tony
2016-10-26 17:31       ` Thomas Gleixner
2016-10-26 21:14     ` Fenghua Yu
2016-10-26 21:18       ` Thomas Gleixner [this message]
2016-10-22 13:19 ` [PATCH v5 11/18] x86/intel_rdt: Add basic resctrl filesystem support Fenghua Yu
2016-10-26 13:52   ` Thomas Gleixner
2016-10-22 13:19 ` [PATCH v5 12/18] x86/intel_rdt: Add "info" files to resctrl file system Fenghua Yu
2016-10-26 14:45   ` Thomas Gleixner
2016-10-26 15:48     ` Luck, Tony
2016-10-26 17:33       ` Thomas Gleixner
2016-10-27 18:17     ` Fenghua Yu
2016-10-27 18:25       ` Thomas Gleixner
2016-10-27 18:35         ` Fenghua Yu
2016-10-22 13:20 ` [PATCH v5 13/18] x86/intel_rdt: Add mkdir " Fenghua Yu
2016-10-26 15:01   ` Thomas Gleixner
2016-10-28 17:51     ` Fenghua Yu
2016-10-28 18:41       ` Thomas Gleixner
2016-10-22 13:20 ` [PATCH v5 14/18] x86/intel_rdt: Add cpus file Fenghua Yu
2016-10-26 17:57   ` Thomas Gleixner
2016-10-22 13:20 ` [PATCH v5 15/18] x86/intel_rdt: Add tasks files Fenghua Yu
2016-10-26 15:27   ` Thomas Gleixner
2016-10-22 13:20 ` [PATCH v5 16/18] x86/intel_rdt: Add schemata file Fenghua Yu
2016-10-22 13:20 ` [PATCH v5 17/18] x86/intel_rdt: Add scheduler hook Fenghua Yu
2016-10-22 13:20 ` [PATCH v5 18/18] MAINTAINERS: Add maintainer for Intel RDT resource allocation Fenghua Yu
2016-10-26 21:39 ` [PATCH v5 00/18] Intel Cache Allocation Technology Thomas Gleixner
2016-10-26 21:54   ` Fenghua Yu

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