From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38961) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzuCd-0001dz-2o for qemu-devel@nongnu.org; Thu, 27 Oct 2016 19:35:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzuCZ-0006fT-3x for qemu-devel@nongnu.org; Thu, 27 Oct 2016 19:35:19 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:41627) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bzuCY-0006fA-UY for qemu-devel@nongnu.org; Thu, 27 Oct 2016 19:35:15 -0400 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=svr-ies-mbx-01.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1bzuCX-00032n-6d from joseph_myers@mentor.com for qemu-devel@nongnu.org; Thu, 27 Oct 2016 16:35:13 -0700 Received: from jsm28 (helo=localhost) by digraph.polyomino.org.uk with local-esmtp (Exim 4.86_2) (envelope-from ) id 1bzuCO-0001Vw-VB for qemu-devel@nongnu.org; Thu, 27 Oct 2016 23:35:05 +0000 Date: Thu, 27 Oct 2016 23:35:04 +0000 From: Joseph Myers Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Subject: [Qemu-devel] [PATCH] tcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org The version of tcg_gen_ld8s_i64 for 32-bit systems does a load into the low part of the return value - then attempts a sign extension into the high part, but wrongly sets the high part to a sign extension of itself rather than of the low part. This results in TCG internal errors from the use of the uninitialized high part (in some GCC tests of AArch64 NEON shift intrinsics, in particular). This patch corrects the sign-extension logic, making it match other functions such as tcg_gen_ld16s_i64. Signed-off-by: Joseph Myers --- diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index bb2bfee..43d34ea 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -790,7 +790,7 @@ void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) { tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset); - tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31); + tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); } void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) -- Joseph S. Myers joseph@codesourcery.com