From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932311AbeAHKJ3 (ORCPT + 1 other); Mon, 8 Jan 2018 05:09:29 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:49038 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932157AbeAHKJ0 (ORCPT ); Mon, 8 Jan 2018 05:09:26 -0500 Date: Mon, 8 Jan 2018 11:08:55 +0100 (CET) From: Thomas Gleixner To: bp@alien8.de, dwmw@amazon.co.uk, gregkh@linux-foundation.org, thomas.lendacky@amd.com, pjt@google.com, mingo@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com, tim.c.chen@linux.intel.com, torvalds@linux-foundation.org, peterz@infradead.org, dave.hansen@intel.com cc: linux-tip-commits@vger.kernel.org Subject: Re: [tip:x86/pti] x86/cpu/AMD: Use LFENCE_RDTSC instead of MFENCE_RDTSC In-Reply-To: Message-ID: References: <20180105160756.23786.4220.stgit@tlendack-t1.amdoffice.net> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Sat, 6 Jan 2018, tip-bot for Tom Lendacky wrote: > Commit-ID: 0bf17c102177d5da9363bf8b1e4704b9996d5079 > Gitweb: https://git.kernel.org/tip/0bf17c102177d5da9363bf8b1e4704b9996d5079 > Author: Tom Lendacky > AuthorDate: Fri, 5 Jan 2018 10:07:56 -0600 > Committer: Thomas Gleixner > CommitDate: Sat, 6 Jan 2018 21:57:40 +0100 > > x86/cpu/AMD: Use LFENCE_RDTSC instead of MFENCE_RDTSC > > With LFENCE now a serializing instruction, set the LFENCE_RDTSC > feature since the LFENCE instruction has less overhead than the > MFENCE instruction. Second thoughts on that. As pointed out by someone in one of the insane long threads: What happens if the kernel runs as a guest and - the hypervisor did not set the LFENCE to serializing on the host - the hypervisor does not allow writing MSR_AMD64_DE_CFG That would bring the guest into a pretty bad state or am I missing something essential here? I'm dropping these patches until this question is answered. Thanks, tglx